1116 lines
24 KiB
C
1116 lines
24 KiB
C
/* $NetBSD: dca.c,v 1.36 1997/10/04 09:59:42 thorpej Exp $ */
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/*-
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* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1982, 1986, 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)dca.c 8.2 (Berkeley) 1/12/94
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*/
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/*
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* Driver for the 98626/98644/internal serial interface on hp300/hp400,
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* based on the National Semiconductor INS8250/NS16550AF/WD16C552 UARTs.
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*
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* N.B. On the hp700 and some hp300s, there is a "secret bit" with
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* undocumented behavior. The third bit of the Modem Control Register
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* (MCR_IEN == 0x08) must be set to enable interrupts. Failure to do
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* so can result in deadlock on those machines, whereas the don't seem to
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* be any harmful side-effects from setting this bit on non-affected
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* machines.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/ioctl.h>
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#include <sys/proc.h>
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#include <sys/tty.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/uio.h>
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#include <sys/kernel.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <machine/autoconf.h>
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#include <machine/cpu.h>
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#include <machine/intr.h>
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#include <dev/cons.h>
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#include <hp300/dev/dioreg.h>
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#include <hp300/dev/diovar.h>
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#include <hp300/dev/diodevs.h>
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#include <hp300/dev/dcareg.h>
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struct dca_softc {
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struct device sc_dev; /* generic device glue */
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struct dcadevice *sc_dca; /* pointer to hardware */
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struct tty *sc_tty; /* our tty instance */
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int sc_oflows; /* overflow counter */
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short sc_flags; /* state flags */
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/*
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* Bits for sc_flags.
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*/
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#define DCA_ACTIVE 0x0001 /* indicates live unit */
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#define DCA_SOFTCAR 0x0002 /* indicates soft-carrier */
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#define DCA_HASFIFO 0x0004 /* indicates unit has FIFO */
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#define DCA_ISCONSOLE 0x0008 /* indicates unit is console */
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};
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int dcamatch __P((struct device *, struct cfdata *, void *));
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void dcaattach __P((struct device *, struct device *, void *));
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struct cfattach dca_ca = {
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sizeof(struct dca_softc), dcamatch, dcaattach
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};
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struct cfdriver dca_cd = {
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NULL, "dca", DV_TTY
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};
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int dcadefaultrate = TTYDEF_SPEED;
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int dcamajor;
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cdev_decl(dca);
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int dcaintr __P((void *));
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void dcaeint __P((struct dca_softc *, int));
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void dcamint __P((struct dca_softc *));
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int dcaparam __P((struct tty *, struct termios *));
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void dcastart __P((struct tty *));
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void dcastop __P((struct tty *, int));
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int dcamctl __P((struct dca_softc *, int, int));
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void dcainit __P((struct dcadevice *, int));
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int dca_console_scan __P((int, caddr_t, void *));
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void dcacnprobe __P((struct consdev *));
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void dcacninit __P((struct consdev *));
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int dcacngetc __P((dev_t));
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void dcacnputc __P((dev_t, int));
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/*
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* Stuff for DCA console support.
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*/
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static struct dcadevice *dca_cn = NULL; /* pointer to hardware */
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static int dcaconsinit; /* has been initialized */
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struct speedtab dcaspeedtab[] = {
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{ 0, 0 },
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{ 50, DCABRD(50) },
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{ 75, DCABRD(75) },
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{ 110, DCABRD(110) },
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{ 134, DCABRD(134) },
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{ 150, DCABRD(150) },
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{ 200, DCABRD(200) },
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{ 300, DCABRD(300) },
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{ 600, DCABRD(600) },
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{ 1200, DCABRD(1200) },
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{ 1800, DCABRD(1800) },
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{ 2400, DCABRD(2400) },
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{ 4800, DCABRD(4800) },
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{ 9600, DCABRD(9600) },
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{ 19200, DCABRD(19200) },
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{ 38400, DCABRD(38400) },
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{ -1, -1 },
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};
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#ifdef KGDB
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#include <machine/remote-sl.h>
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extern dev_t kgdb_dev;
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extern int kgdb_rate;
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extern int kgdb_debug_init;
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#endif
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#define DCAUNIT(x) minor(x)
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#ifdef DEBUG
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long fifoin[17];
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long fifoout[17];
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long dcaintrcount[16];
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long dcamintcount[16];
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#endif
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void dcainit __P((struct dcadevice *, int));
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int
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dcamatch(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct dio_attach_args *da = aux;
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switch (da->da_id) {
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case DIO_DEVICE_ID_DCA0:
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case DIO_DEVICE_ID_DCA0REM:
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case DIO_DEVICE_ID_DCA1:
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case DIO_DEVICE_ID_DCA1REM:
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return (1);
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}
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return (0);
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}
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void
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dcaattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct dca_softc *sc = (struct dca_softc *)self;
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struct dio_attach_args *da = aux;
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struct dcadevice *dca;
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int unit = self->dv_unit;
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int scode = da->da_scode;
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int ipl;
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if (scode == conscode) {
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dca = (struct dcadevice *)conaddr;
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sc->sc_flags |= DCA_ISCONSOLE;
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DELAY(100000);
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/*
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* We didn't know which unit this would be during
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* the console probe, so we have to fixup cn_dev here.
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*/
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cn_tab->cn_dev = makedev(dcamajor, unit);
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} else {
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dca = (struct dcadevice *)iomap(dio_scodetopa(da->da_scode),
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da->da_size);
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if (dca == NULL) {
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printf("\n%s: can't map registers\n",
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sc->sc_dev.dv_xname);
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return;
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}
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}
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sc->sc_dca = dca;
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ipl = DIO_IPL(dca);
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printf(" ipl %d", ipl);
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dca->dca_reset = 0xFF;
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DELAY(100);
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/* look for a NS 16550AF UART with FIFOs */
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dca->dca_fifo = FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_14;
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DELAY(100);
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if ((dca->dca_iir & IIR_FIFO_MASK) == IIR_FIFO_MASK)
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sc->sc_flags |= DCA_HASFIFO;
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/* Establish interrupt handler. */
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(void) dio_intr_establish(dcaintr, sc, ipl,
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(sc->sc_flags & DCA_HASFIFO) ? IPL_TTY : IPL_TTYNOBUF);
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sc->sc_flags |= DCA_ACTIVE;
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if (self->dv_cfdata->cf_flags)
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sc->sc_flags |= DCA_SOFTCAR;
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/* Enable interrupts. */
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dca->dca_ic = IC_IE;
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/*
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* Need to reset baud rate, etc. of next print so reset dcaconsinit.
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* Also make sure console is always "hardwired."
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*/
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if (sc->sc_flags & DCA_ISCONSOLE) {
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dcaconsinit = 0;
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sc->sc_flags |= DCA_SOFTCAR;
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printf(": console, ");
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} else
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printf(": ");
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if (sc->sc_flags & DCA_HASFIFO)
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printf("working fifo\n");
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else
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printf("no fifo\n");
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#ifdef KGDB
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if (kgdb_dev == makedev(dcamajor, unit)) {
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if (sc->sc_flags & DCA_ISCONSOLE)
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kgdb_dev = NODEV; /* can't debug over console port */
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else {
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dcainit(dca, kgdb_rate);
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dcaconsinit = 1; /* don't re-init in dcaputc */
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if (kgdb_debug_init) {
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/*
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* Print prefix of device name,
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* let kgdb_connect print the rest.
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*/
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printf("%s: ", sc->sc_dev.dv_xname);
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kgdb_connect(1);
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} else
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printf("%s: kgdb enabled\n",
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sc->sc_dev.dv_xname);
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}
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}
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#endif
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}
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/* ARGSUSED */
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int
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dcaopen(dev, flag, mode, p)
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dev_t dev;
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int flag, mode;
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struct proc *p;
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{
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int unit = DCAUNIT(dev);
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struct dca_softc *sc;
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struct tty *tp;
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struct dcadevice *dca;
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u_char code;
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int s, error = 0;
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if (unit >= dca_cd.cd_ndevs ||
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(sc = dca_cd.cd_devs[unit]) == NULL)
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return (ENXIO);
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if ((sc->sc_flags & DCA_ACTIVE) == 0)
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return (ENXIO);
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dca = sc->sc_dca;
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if (sc->sc_tty == NULL) {
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tp = sc->sc_tty = ttymalloc();
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tty_attach(tp);
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} else
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tp = sc->sc_tty;
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tp->t_oproc = dcastart;
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tp->t_param = dcaparam;
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tp->t_dev = dev;
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if ((tp->t_state & TS_ISOPEN) == 0) {
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/*
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* Sanity clause: reset the card on first open.
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* The card might be left in an inconsistent state
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* if card memory is read inadvertently.
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*/
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dcainit(dca, dcadefaultrate);
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tp->t_state |= TS_WOPEN;
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ttychars(tp);
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tp->t_iflag = TTYDEF_IFLAG;
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tp->t_oflag = TTYDEF_OFLAG;
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tp->t_cflag = TTYDEF_CFLAG;
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tp->t_lflag = TTYDEF_LFLAG;
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tp->t_ispeed = tp->t_ospeed = dcadefaultrate;
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s = spltty();
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dcaparam(tp, &tp->t_termios);
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ttsetwater(tp);
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/* Set the FIFO threshold based on the receive speed. */
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if (sc->sc_flags & DCA_HASFIFO)
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dca->dca_fifo = FIFO_ENABLE | FIFO_RCV_RST |
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FIFO_XMT_RST |
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(tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 :
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FIFO_TRIGGER_14);
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/* Flush any pending I/O */
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while ((dca->dca_iir & IIR_IMASK) == IIR_RXRDY)
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code = dca->dca_data;
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} else if (tp->t_state&TS_XCLUDE && p->p_ucred->cr_uid != 0)
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return (EBUSY);
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else
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s = spltty();
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/* Set modem control state. */
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(void) dcamctl(sc, MCR_DTR | MCR_RTS, DMSET);
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/* Set soft-carrier if so configured. */
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if ((sc->sc_flags & DCA_SOFTCAR) || (dcamctl(sc, 0, DMGET) & MSR_DCD))
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tp->t_state |= TS_CARR_ON;
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/* Wait for carrier if necessary. */
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if ((flag & O_NONBLOCK) == 0)
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while ((tp->t_cflag & CLOCAL) == 0 &&
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(tp->t_state & TS_CARR_ON) == 0) {
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tp->t_state |= TS_WOPEN;
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error = ttysleep(tp, (caddr_t)&tp->t_rawq,
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TTIPRI | PCATCH, ttopen, 0);
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if (error) {
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splx(s);
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return (error);
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}
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}
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splx(s);
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if (error == 0)
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error = (*linesw[tp->t_line].l_open)(dev, tp);
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return (error);
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}
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/*ARGSUSED*/
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int
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dcaclose(dev, flag, mode, p)
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dev_t dev;
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int flag, mode;
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struct proc *p;
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{
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struct dca_softc *sc;
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struct tty *tp;
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struct dcadevice *dca;
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int unit;
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int s;
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unit = DCAUNIT(dev);
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sc = dca_cd.cd_devs[unit];
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dca = sc->sc_dca;
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tp = sc->sc_tty;
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(*linesw[tp->t_line].l_close)(tp, flag);
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s = spltty();
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dca->dca_cfcr &= ~CFCR_SBREAK;
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#ifdef KGDB
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/* do not disable interrupts if debugging */
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if (dev != kgdb_dev)
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#endif
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dca->dca_ier = 0;
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if (tp->t_cflag & HUPCL && (sc->sc_flags & DCA_SOFTCAR) == 0) {
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/* XXX perhaps only clear DTR */
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(void) dcamctl(sc, 0, DMSET);
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}
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tp->t_state &= ~(TS_BUSY | TS_FLUSH);
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splx(s);
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ttyclose(tp);
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#if 0
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tty_detach(tp);
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ttyfree(tp);
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sc->sc_tty = NULL;
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#endif
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return (0);
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}
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int
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dcaread(dev, uio, flag)
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dev_t dev;
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struct uio *uio;
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int flag;
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{
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int unit = DCAUNIT(dev);
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struct dca_softc *sc;
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struct tty *tp;
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int error, of;
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sc = dca_cd.cd_devs[unit];
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tp = sc->sc_tty;
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of = sc->sc_oflows;
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error = (*linesw[tp->t_line].l_read)(tp, uio, flag);
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/*
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* XXX hardly a reasonable thing to do, but reporting overflows
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* at interrupt time just exacerbates the problem.
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*/
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if (sc->sc_oflows != of)
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log(LOG_WARNING, "%s: silo overflow\n", sc->sc_dev.dv_xname);
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return (error);
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}
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int
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dcawrite(dev, uio, flag)
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dev_t dev;
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struct uio *uio;
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int flag;
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{
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struct dca_softc *sc = dca_cd.cd_devs[DCAUNIT(dev)];
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struct tty *tp = sc->sc_tty;
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return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
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}
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struct tty *
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dcatty(dev)
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dev_t dev;
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{
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struct dca_softc *sc = dca_cd.cd_devs[DCAUNIT(dev)];
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return (sc->sc_tty);
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}
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int
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dcaintr(arg)
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void *arg;
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{
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struct dca_softc *sc = arg;
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#ifdef KGDB
|
|
int unit = sc->sc_dev.dv_unit;
|
|
#endif
|
|
struct dcadevice *dca = sc->sc_dca;
|
|
struct tty *tp = sc->sc_tty;
|
|
u_char code;
|
|
int iflowdone = 0;
|
|
|
|
/*
|
|
* If interrupts aren't enabled, then the interrupt can't
|
|
* be for us.
|
|
*/
|
|
if ((dca->dca_ic & (IC_IR|IC_IE)) != (IC_IR|IC_IE))
|
|
return (0);
|
|
|
|
for (;;) {
|
|
code = dca->dca_iir;
|
|
#ifdef DEBUG
|
|
dcaintrcount[code & IIR_IMASK]++;
|
|
#endif
|
|
switch (code & IIR_IMASK) {
|
|
case IIR_NOPEND:
|
|
return (1);
|
|
case IIR_RXTOUT:
|
|
case IIR_RXRDY:
|
|
/* do time-critical read in-line */
|
|
/*
|
|
* Process a received byte. Inline for speed...
|
|
*/
|
|
#ifdef KGDB
|
|
#define RCVBYTE() \
|
|
code = dca->dca_data; \
|
|
if ((tp->t_state & TS_ISOPEN) == 0) { \
|
|
if (code == FRAME_END && \
|
|
kgdb_dev == makedev(dcamajor, unit)) \
|
|
kgdb_connect(0); /* trap into kgdb */ \
|
|
} else \
|
|
(*linesw[tp->t_line].l_rint)(code, tp)
|
|
#else
|
|
#define RCVBYTE() \
|
|
code = dca->dca_data; \
|
|
if ((tp->t_state & TS_ISOPEN) != 0) \
|
|
(*linesw[tp->t_line].l_rint)(code, tp)
|
|
#endif
|
|
RCVBYTE();
|
|
if (sc->sc_flags & DCA_HASFIFO) {
|
|
#ifdef DEBUG
|
|
int fifocnt = 1;
|
|
#endif
|
|
while ((code = dca->dca_lsr) & LSR_RCV_MASK) {
|
|
if (code == LSR_RXRDY) {
|
|
RCVBYTE();
|
|
} else
|
|
dcaeint(sc, code);
|
|
#ifdef DEBUG
|
|
fifocnt++;
|
|
#endif
|
|
}
|
|
#ifdef DEBUG
|
|
if (fifocnt > 16)
|
|
fifoin[0]++;
|
|
else
|
|
fifoin[fifocnt]++;
|
|
#endif
|
|
}
|
|
if (!iflowdone && (tp->t_cflag&CRTS_IFLOW) &&
|
|
tp->t_rawq.c_cc > TTYHOG/2) {
|
|
dca->dca_mcr &= ~MCR_RTS;
|
|
iflowdone = 1;
|
|
}
|
|
break;
|
|
case IIR_TXRDY:
|
|
tp->t_state &=~ (TS_BUSY|TS_FLUSH);
|
|
if (tp->t_line)
|
|
(*linesw[tp->t_line].l_start)(tp);
|
|
else
|
|
dcastart(tp);
|
|
break;
|
|
case IIR_RLS:
|
|
dcaeint(sc, dca->dca_lsr);
|
|
break;
|
|
default:
|
|
if (code & IIR_NOPEND)
|
|
return (1);
|
|
log(LOG_WARNING, "%s: weird interrupt: 0x%x\n",
|
|
sc->sc_dev.dv_xname, code);
|
|
/* fall through */
|
|
case IIR_MLSC:
|
|
dcamint(sc);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
void
|
|
dcaeint(sc, stat)
|
|
struct dca_softc *sc;
|
|
int stat;
|
|
{
|
|
struct tty *tp = sc->sc_tty;
|
|
struct dcadevice *dca = sc->sc_dca;
|
|
int c;
|
|
|
|
c = dca->dca_data;
|
|
if ((tp->t_state & TS_ISOPEN) == 0) {
|
|
#ifdef KGDB
|
|
/* we don't care about parity errors */
|
|
if (((stat & (LSR_BI|LSR_FE|LSR_PE)) == LSR_PE) &&
|
|
kgdb_dev == makedev(dcamajor, sc->sc_hd->hp_unit)
|
|
&& c == FRAME_END)
|
|
kgdb_connect(0); /* trap into kgdb */
|
|
#endif
|
|
return;
|
|
}
|
|
if (stat & (LSR_BI | LSR_FE))
|
|
c |= TTY_FE;
|
|
else if (stat & LSR_PE)
|
|
c |= TTY_PE;
|
|
else if (stat & LSR_OE)
|
|
sc->sc_oflows++;
|
|
(*linesw[tp->t_line].l_rint)(c, tp);
|
|
}
|
|
|
|
void
|
|
dcamint(sc)
|
|
struct dca_softc *sc;
|
|
{
|
|
struct tty *tp = sc->sc_tty;
|
|
struct dcadevice *dca = sc->sc_dca;
|
|
u_char stat;
|
|
|
|
stat = dca->dca_msr;
|
|
#ifdef DEBUG
|
|
dcamintcount[stat & 0xf]++;
|
|
#endif
|
|
if ((stat & MSR_DDCD) &&
|
|
(sc->sc_flags & DCA_SOFTCAR) == 0) {
|
|
if (stat & MSR_DCD)
|
|
(void)(*linesw[tp->t_line].l_modem)(tp, 1);
|
|
else if ((*linesw[tp->t_line].l_modem)(tp, 0) == 0)
|
|
dca->dca_mcr &= ~(MCR_DTR | MCR_RTS);
|
|
}
|
|
/*
|
|
* CTS change.
|
|
* If doing HW output flow control start/stop output as appropriate.
|
|
*/
|
|
if ((stat & MSR_DCTS) &&
|
|
(tp->t_state & TS_ISOPEN) && (tp->t_cflag & CCTS_OFLOW)) {
|
|
if (stat & MSR_CTS) {
|
|
tp->t_state &=~ TS_TTSTOP;
|
|
dcastart(tp);
|
|
} else {
|
|
tp->t_state |= TS_TTSTOP;
|
|
}
|
|
}
|
|
}
|
|
|
|
int
|
|
dcaioctl(dev, cmd, data, flag, p)
|
|
dev_t dev;
|
|
u_long cmd;
|
|
caddr_t data;
|
|
int flag;
|
|
struct proc *p;
|
|
{
|
|
int unit = DCAUNIT(dev);
|
|
struct dca_softc *sc = dca_cd.cd_devs[unit];
|
|
struct tty *tp = sc->sc_tty;
|
|
struct dcadevice *dca = sc->sc_dca;
|
|
int error;
|
|
|
|
error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
|
|
if (error >= 0)
|
|
return (error);
|
|
error = ttioctl(tp, cmd, data, flag, p);
|
|
if (error >= 0)
|
|
return (error);
|
|
|
|
switch (cmd) {
|
|
case TIOCSBRK:
|
|
dca->dca_cfcr |= CFCR_SBREAK;
|
|
break;
|
|
|
|
case TIOCCBRK:
|
|
dca->dca_cfcr &= ~CFCR_SBREAK;
|
|
break;
|
|
|
|
case TIOCSDTR:
|
|
(void) dcamctl(sc, MCR_DTR | MCR_RTS, DMBIS);
|
|
break;
|
|
|
|
case TIOCCDTR:
|
|
(void) dcamctl(sc, MCR_DTR | MCR_RTS, DMBIC);
|
|
break;
|
|
|
|
case TIOCMSET:
|
|
(void) dcamctl(sc, *(int *)data, DMSET);
|
|
break;
|
|
|
|
case TIOCMBIS:
|
|
(void) dcamctl(sc, *(int *)data, DMBIS);
|
|
break;
|
|
|
|
case TIOCMBIC:
|
|
(void) dcamctl(sc, *(int *)data, DMBIC);
|
|
break;
|
|
|
|
case TIOCMGET:
|
|
*(int *)data = dcamctl(sc, 0, DMGET);
|
|
break;
|
|
|
|
case TIOCGFLAGS: {
|
|
int bits = 0;
|
|
|
|
if (sc->sc_flags & DCA_SOFTCAR)
|
|
bits |= TIOCFLAG_SOFTCAR;
|
|
|
|
if (tp->t_cflag & CLOCAL)
|
|
bits |= TIOCFLAG_CLOCAL;
|
|
|
|
*(int *)data = bits;
|
|
break;
|
|
}
|
|
|
|
case TIOCSFLAGS: {
|
|
int userbits;
|
|
|
|
error = suser(p->p_ucred, &p->p_acflag);
|
|
if (error)
|
|
return (EPERM);
|
|
|
|
userbits = *(int *)data;
|
|
|
|
if ((userbits & TIOCFLAG_SOFTCAR) ||
|
|
(sc->sc_flags & DCA_ISCONSOLE))
|
|
sc->sc_flags |= DCA_SOFTCAR;
|
|
|
|
if (userbits & TIOCFLAG_CLOCAL)
|
|
tp->t_cflag |= CLOCAL;
|
|
|
|
break;
|
|
}
|
|
|
|
default:
|
|
return (ENOTTY);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
dcaparam(tp, t)
|
|
struct tty *tp;
|
|
struct termios *t;
|
|
{
|
|
int unit = DCAUNIT(tp->t_dev);
|
|
struct dca_softc *sc = dca_cd.cd_devs[unit];
|
|
struct dcadevice *dca = sc->sc_dca;
|
|
int cfcr, cflag = t->c_cflag;
|
|
int ospeed = ttspeedtab(t->c_ospeed, dcaspeedtab);
|
|
int s;
|
|
|
|
/* check requested parameters */
|
|
if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
|
|
return (EINVAL);
|
|
|
|
switch (cflag & CSIZE) {
|
|
case CS5:
|
|
cfcr = CFCR_5BITS;
|
|
break;
|
|
|
|
case CS6:
|
|
cfcr = CFCR_6BITS;
|
|
break;
|
|
|
|
case CS7:
|
|
cfcr = CFCR_7BITS;
|
|
break;
|
|
|
|
case CS8:
|
|
default: /* XXX gcc whines about cfcr being unitialized... */
|
|
cfcr = CFCR_8BITS;
|
|
break;
|
|
}
|
|
if (cflag & PARENB) {
|
|
cfcr |= CFCR_PENAB;
|
|
if ((cflag & PARODD) == 0)
|
|
cfcr |= CFCR_PEVEN;
|
|
}
|
|
if (cflag & CSTOPB)
|
|
cfcr |= CFCR_STOPB;
|
|
|
|
s = spltty();
|
|
|
|
if (ospeed == 0)
|
|
(void) dcamctl(sc, 0, DMSET); /* hang up line */
|
|
|
|
/*
|
|
* Set the FIFO threshold based on the recieve speed, if we
|
|
* are changing it.
|
|
*/
|
|
if (tp->t_ispeed != t->c_ispeed) {
|
|
if (sc->sc_flags & DCA_HASFIFO)
|
|
dca->dca_fifo = FIFO_ENABLE |
|
|
(t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 :
|
|
FIFO_TRIGGER_14);
|
|
}
|
|
|
|
if (ospeed != 0) {
|
|
dca->dca_cfcr |= CFCR_DLAB;
|
|
dca->dca_data = ospeed & 0xFF;
|
|
dca->dca_ier = ospeed >> 8;
|
|
dca->dca_cfcr = cfcr;
|
|
} else
|
|
dca->dca_cfcr = cfcr;
|
|
|
|
/* and copy to tty */
|
|
tp->t_ispeed = t->c_ispeed;
|
|
tp->t_ospeed = t->c_ospeed;
|
|
tp->t_cflag = cflag;
|
|
|
|
dca->dca_ier = IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC;
|
|
dca->dca_mcr |= MCR_IEN;
|
|
|
|
splx(s);
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
dcastart(tp)
|
|
struct tty *tp;
|
|
{
|
|
int s, c, unit = DCAUNIT(tp->t_dev);
|
|
struct dca_softc *sc = dca_cd.cd_devs[unit];
|
|
struct dcadevice *dca = sc->sc_dca;
|
|
|
|
s = spltty();
|
|
|
|
if (tp->t_state & (TS_TIMEOUT|TS_TTSTOP))
|
|
goto out;
|
|
if (tp->t_outq.c_cc <= tp->t_lowat) {
|
|
if (tp->t_state & TS_ASLEEP) {
|
|
tp->t_state &= ~TS_ASLEEP;
|
|
wakeup((caddr_t)&tp->t_outq);
|
|
}
|
|
if (tp->t_outq.c_cc == 0)
|
|
goto out;
|
|
selwakeup(&tp->t_wsel);
|
|
}
|
|
if (dca->dca_lsr & LSR_TXRDY) {
|
|
tp->t_state |= TS_BUSY;
|
|
if (sc->sc_flags & DCA_HASFIFO) {
|
|
for (c = 0; c < 16 && tp->t_outq.c_cc; ++c)
|
|
dca->dca_data = getc(&tp->t_outq);
|
|
#ifdef DEBUG
|
|
if (c > 16)
|
|
fifoout[0]++;
|
|
else
|
|
fifoout[c]++;
|
|
#endif
|
|
} else
|
|
dca->dca_data = getc(&tp->t_outq);
|
|
}
|
|
|
|
out:
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Stop output on a line.
|
|
*/
|
|
/*ARGSUSED*/
|
|
void
|
|
dcastop(tp, flag)
|
|
struct tty *tp;
|
|
int flag;
|
|
{
|
|
int s;
|
|
|
|
s = spltty();
|
|
if (tp->t_state & TS_BUSY)
|
|
if ((tp->t_state & TS_TTSTOP) == 0)
|
|
tp->t_state |= TS_FLUSH;
|
|
splx(s);
|
|
}
|
|
|
|
int
|
|
dcamctl(sc, bits, how)
|
|
struct dca_softc *sc;
|
|
int bits, how;
|
|
{
|
|
struct dcadevice *dca = sc->sc_dca;
|
|
int s;
|
|
|
|
/*
|
|
* Always make sure MCR_IEN is set (unless setting to 0)
|
|
*/
|
|
#ifdef KGDB
|
|
if (how == DMSET && kgdb_dev == makedev(dcamajor, sc->sc_hd->hp_unit))
|
|
bits |= MCR_IEN;
|
|
else
|
|
#endif
|
|
if (how == DMBIS || (how == DMSET && bits))
|
|
bits |= MCR_IEN;
|
|
else if (how == DMBIC)
|
|
bits &= ~MCR_IEN;
|
|
s = spltty();
|
|
|
|
switch (how) {
|
|
case DMSET:
|
|
dca->dca_mcr = bits;
|
|
break;
|
|
|
|
case DMBIS:
|
|
dca->dca_mcr |= bits;
|
|
break;
|
|
|
|
case DMBIC:
|
|
dca->dca_mcr &= ~bits;
|
|
break;
|
|
|
|
case DMGET:
|
|
bits = dca->dca_msr;
|
|
break;
|
|
}
|
|
(void) splx(s);
|
|
return (bits);
|
|
}
|
|
|
|
void
|
|
dcainit(dca, rate)
|
|
struct dcadevice *dca;
|
|
int rate;
|
|
{
|
|
int s;
|
|
short stat;
|
|
|
|
s = splhigh();
|
|
|
|
dca->dca_reset = 0xFF;
|
|
DELAY(100);
|
|
dca->dca_ic = IC_IE;
|
|
|
|
dca->dca_cfcr = CFCR_DLAB;
|
|
rate = ttspeedtab(rate, dcaspeedtab);
|
|
dca->dca_data = rate & 0xFF;
|
|
dca->dca_ier = rate >> 8;
|
|
dca->dca_cfcr = CFCR_8BITS;
|
|
dca->dca_ier = IER_ERXRDY | IER_ETXRDY;
|
|
dca->dca_fifo =
|
|
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1;
|
|
dca->dca_mcr = MCR_DTR | MCR_RTS;
|
|
DELAY(100);
|
|
stat = dca->dca_iir;
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Following are all routines needed for DCA to act as console
|
|
*/
|
|
|
|
int
|
|
dca_console_scan(scode, va, arg)
|
|
int scode;
|
|
caddr_t va;
|
|
void *arg;
|
|
{
|
|
struct dcadevice *dca = (struct dcadevice *)va;
|
|
struct consdev *cp = arg;
|
|
u_char *dioiidev;
|
|
int force = 0, pri;
|
|
|
|
switch (dca->dca_id) {
|
|
case DCAID0:
|
|
case DCAID1:
|
|
pri = CN_NORMAL;
|
|
break;
|
|
|
|
case DCAREMID0:
|
|
case DCAREMID1:
|
|
pri = CN_REMOTE;
|
|
break;
|
|
|
|
default:
|
|
return (0);
|
|
}
|
|
|
|
#ifdef CONSCODE
|
|
/*
|
|
* Raise our priority, if appropriate.
|
|
*/
|
|
if (scode == CONSCODE) {
|
|
pri = CN_REMOTE;
|
|
force = conforced = 1;
|
|
}
|
|
#endif
|
|
|
|
/* Only raise priority. */
|
|
if (pri > cp->cn_pri)
|
|
cp->cn_pri = pri;
|
|
|
|
/*
|
|
* If our priority is higher than the currently-remembered
|
|
* console, stash our priority, for the benefit of dcacninit().
|
|
*/
|
|
if (((cn_tab == NULL) || (cp->cn_pri > cn_tab->cn_pri)) || force) {
|
|
cn_tab = cp;
|
|
if (scode >= 132) {
|
|
dioiidev = (u_char *)va;
|
|
return ((dioiidev[0x101] + 1) * 0x100000);
|
|
}
|
|
return (DIOCSIZE);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
dcacnprobe(cp)
|
|
struct consdev *cp;
|
|
{
|
|
|
|
/* locate the major number */
|
|
for (dcamajor = 0; dcamajor < nchrdev; dcamajor++)
|
|
if (cdevsw[dcamajor].d_open == dcaopen)
|
|
break;
|
|
|
|
/* initialize required fields */
|
|
cp->cn_dev = makedev(dcamajor, 0); /* XXX */
|
|
cp->cn_pri = CN_DEAD;
|
|
|
|
/* Abort early if console is already forced. */
|
|
if (conforced)
|
|
return;
|
|
|
|
console_scan(dca_console_scan, cp);
|
|
|
|
#ifdef KGDB
|
|
/* XXX this needs to be fixed. */
|
|
if (major(kgdb_dev) == 1) /* XXX */
|
|
kgdb_dev = makedev(dcamajor, minor(kgdb_dev));
|
|
#endif
|
|
}
|
|
|
|
/* ARGSUSED */
|
|
void
|
|
dcacninit(cp)
|
|
struct consdev *cp;
|
|
{
|
|
|
|
dca_cn = (struct dcadevice *)conaddr;
|
|
dcainit(dca_cn, dcadefaultrate);
|
|
dcaconsinit = 1;
|
|
}
|
|
|
|
/* ARGSUSED */
|
|
int
|
|
dcacngetc(dev)
|
|
dev_t dev;
|
|
{
|
|
u_char stat;
|
|
int c, s;
|
|
|
|
#ifdef lint
|
|
stat = dev; if (stat) return (0);
|
|
#endif
|
|
|
|
s = splhigh();
|
|
while (((stat = dca_cn->dca_lsr) & LSR_RXRDY) == 0)
|
|
;
|
|
c = dca_cn->dca_data;
|
|
stat = dca_cn->dca_iir;
|
|
splx(s);
|
|
return (c);
|
|
}
|
|
|
|
/*
|
|
* Console kernel output character routine.
|
|
*/
|
|
/* ARGSUSED */
|
|
void
|
|
dcacnputc(dev, c)
|
|
dev_t dev;
|
|
int c;
|
|
{
|
|
int timo;
|
|
u_char stat;
|
|
int s = splhigh();
|
|
|
|
#ifdef lint
|
|
stat = dev; if (stat) return;
|
|
#endif
|
|
|
|
if (dcaconsinit == 0) {
|
|
dcainit(dca_cn, dcadefaultrate);
|
|
dcaconsinit = 1;
|
|
}
|
|
/* wait for any pending transmission to finish */
|
|
timo = 50000;
|
|
while (((stat = dca_cn->dca_lsr) & LSR_TXRDY) == 0 && --timo)
|
|
;
|
|
dca_cn->dca_data = c;
|
|
/* wait for this transmission to complete */
|
|
timo = 1500000;
|
|
while (((stat = dca_cn->dca_lsr) & LSR_TXRDY) == 0 && --timo)
|
|
;
|
|
/* clear any interrupts generated by this transmission */
|
|
stat = dca_cn->dca_iir;
|
|
splx(s);
|
|
}
|