85 lines
3.6 KiB
C
85 lines
3.6 KiB
C
/* $NetBSD: rgephyreg.h,v 1.9 2015/08/21 16:29:48 jmcneill Exp $ */
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/*
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* Copyright (c) 2003
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* Bill Paul <wpaul@windriver.com>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD: /repoman/r/ncvs/src/sys/dev/mii/rgephyreg.h,v 1.1 2003/09/11 03:53:46 wpaul Exp $
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*/
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#ifndef _DEV_MII_RGEPHYREG_H_
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#define _DEV_MII_RGEPHYREG_H_
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/*
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* RealTek 8169S/8110S gigE PHY registers
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*/
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/* RTL8211B(L)/RTL8211C(L) */
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#define RGEPHY_MII_SSR 0x11 /* PHY Specific status register */
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#define RGEPHY_SSR_S1000 0x8000 /* 1000Mbps */
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#define RGEPHY_SSR_S100 0x4000 /* 100Mbps */
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#define RGEPHY_SSR_S10 0x0000 /* 10Mbps */
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#define RGEPHY_SSR_SPD_MASK 0xc000
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#define RGEPHY_SSR_FDX 0x2000 /* full duplex */
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#define RGEPHY_SSR_PAGE_RECEIVED 0x1000 /* new page received */
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#define RGEPHY_SSR_SPD_DPLX_RESOLVED 0x0800 /* speed/duplex resolved */
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#define RGEPHY_SSR_LINK 0x0400 /* link up */
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#define RGEPHY_SSR_MDI_XOVER 0x0040 /* MDI crossover */
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#define RGEPHY_SSR_ALDPS 0x0008 /* RTL8211C(L) only */
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#define RGEPHY_SSR_JABBER 0x0001 /* Jabber */
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/* RTL8211F */
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#define RGEPHY_MII_PHYCR1 0x18 /* PHY Specific control register 1 */
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#define RGEPHY_PHYCR1_MDI_MMCE __BIT(9)
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#define RGEPHY_PHYCR1_ALDPS_EN __BIT(2)
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#define RGEPHY_MII_MACR 0x0d /* MMD Access control register */
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#define RGEPHY_MACR_FUNCTION __BITS(15,14)
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#define RGEPHY_MACR_DEVAD __BITS(4,0)
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#define RGEPHY_MII_MAADR 0x0e /* MMD Access address data register */
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#define RGEPHY_MII_PHYSR 0x1a /* PHY Specific status register */
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#define RGEPHY_PHYSR_ALDPS __BIT(14)
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#define RGEPHY_PHYSR_MDI_PLUG __BIT(13)
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#define RGEPHY_PHYSR_NWAY_EN __BIT(12)
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#define RGEPHY_PHYSR_MASTER __BIT(11)
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#define RGEPHY_PHYSR_EEE __BIT(8)
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#define RGEPHY_PHYSR_RXFLOW_EN __BIT(7)
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#define RGEPHY_PHYSR_TXFLOW_EN __BIT(6)
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#define RGEPHY_PHYSR_SPEED __BITS(5,4)
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#define RGEPHY_PHYSR_SPEED_10 0
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#define RGEPHY_PHYSR_SPEED_100 1
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#define RGEPHY_PHYSR_SPEED_1000 2
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#define RGEPHY_PHYSR_DUPLEX __BIT(3)
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#define RGEPHY_PHYSR_LINK __BIT(2)
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#define RGEPHY_PHYSR_MDI_XOVER __BIT(1)
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#define RGEPHY_PHYSR_JABBER __BIT(0)
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#endif /* _DEV_MII_RGEPHYREG_H_ */
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