84 lines
3.8 KiB
C
84 lines
3.8 KiB
C
/* $NetBSD: gti2creg.h,v 1.3 2005/12/11 12:22:16 christos Exp $ */
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/*
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* Copyright (c) 2005 Brocade Communcations, inc.
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* All rights reserved.
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*
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* Written by Matt Thomas for Brocade Communcations, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Brocade Communications, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_MARVELL_GTI2CREG_H_
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#define _DEV_MARVELL_GTI2CREG_H_
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#define I2C_REG_SlaveAddr 0xc000
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#define I2C_REG_ExtSlaveAddr 0xc010
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#define I2C_REG_Data 0xc004
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#define I2C_REG_Control 0xc008
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#define I2C_REG_Status 0xc00c
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#define I2C_REG_BaudRate 0xc00c
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#define I2C_REG_SoftReset 0xc01c
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#define I2C_SlaveAddr_GCE 0x0001 /* Act as Slave */
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#define I2C_SlaveAddr_SAddr 0x7E
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#define I2C_Control_ACK 0x04
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#define I2C_Control_IFlg 0x08
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#define I2C_Control_Stop 0x10
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#define I2C_Control_Start 0x20
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#define I2C_Control_TWSIEn 0x40
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#define I2C_Control_IntEn 0x80
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/*
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* F(I2C) = F(Tclk) / ( 10 * (M + 1) * (2^(N+1)))
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* For Tclk = 100MHz, M = 4, N = 4: F = 62.5KHz
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* For Tclk = 100MHz, M = 13, N = 3: F = 96.2KHz
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*/
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#define I2C_BaudRate(M, N) (((M) << 3) | (N))
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#define I2C_BaudRate_62_5K I2C_BaudRate(4, 4)
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#define I2C_BaudRate_96_2K I2C_BaudRate(13, 3)
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#define I2C_Status_BusError 0x00 /* Bus error */
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#define I2C_Status_Started 0x08 /* Start condition xmitted */
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#define I2C_Status_ReStarted 0x10 /* Repeated start condition xmitted */
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#define I2C_Status_AddrWriteAck 0x18 /* Adr + wr bit xmtd, ack rcvd */
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#define I2C_Status_AddrWriteNoAck 0x20 /* Adr + wr bit xmtd, NO ack rcvd */
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#define I2C_Status_MasterWriteAck 0x28 /* Master xmtd data byte, ack rcvd */
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#define I2C_Status_MasterWriteNoAck 0x30 /* Master xmtd data byte, NO ack rcvd*/
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#define I2C_Status_MasterLostArb 0x38 /* Master lost arbitration during
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address or data transfer */
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#define I2C_Status_AddrReadAck 0x40 /* Adr + rd bit xmtd, ack rcvd */
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#define I2C_Status_AddrReadNoAck 0x48 /* Adr + rd bit xmtd, NO ack rcvd */
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#define I2C_Status_MasterReadAck 0x50 /* Master rcvd data bye, ack rcvd */
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#define I2C_Status_MasterReadNoAck 0x58 /* Master rcvd data bye, NO ack rcvd */
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#define I2C_Status_2ndAddrWriteAck 0xd0 /* 2nd adr + wr bit xmid, ack rcvd */
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#define I2C_Status_2ndAddrWriteNoAck 0xd8 /* 2nd adr + wr bit xmid, NO ack rcvd */
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#define I2C_Status_2ndAddrReadAck 0xe0 /* 2nd adr + rd bit xmid, ack rcvd */
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#define I2C_Status_2ndAddrReadNoAck 0xe8 /* 2nd adr + rd bit xmtd, NO ack rcvd */
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#define I2C_Status_Idle 0xf8 /* Idle */
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#endif /* _DEV_MARVELL_GTI2CREG_H_ */
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