134 lines
4.2 KiB
Groff
134 lines
4.2 KiB
Groff
.\" $NetBSD: hifn.4,v 1.6 2004/04/29 19:42:29 jonathan Exp $
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.\" $OpenBSD: hifn.4,v 1.32 2002/09/26 07:55:40 miod Exp $
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.\" $FreeBSD: src/share/man/man4/hifn.4,v 1.1.2.2 2003/10/08 23:57:50 sam Exp $
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.\"
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.\" Copyright (c) 2000 Theo de Raadt
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\" 3. The name of the author may not be used to endorse or promote products
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.\" derived from this software without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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.\" POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd October 8, 2003
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.Dt HIFN 4
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.Os
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.Sh NAME
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.Nm hifn
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.Nd Hifn 7751/7951/7811/7955/7956 crypto accelerator
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.Sh SYNOPSIS
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.Cd "hifn* at pci? dev ? function ?"
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.Sh DESCRIPTION
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The
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.Nm
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driver supports various cards containing the Hifn 7751, 7951,
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7811, 7955, and 7956
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chipsets, such as
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.Bl -tag -width namenamenamena -offset indent
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.It Invertex AEON
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No longer being made.
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Came as 128KB SRAM model, or 2MB DRAM model.
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.It Hifn 7751
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Reference board with 512KB SRAM.
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.It PowerCrypt
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See
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.Pa http://www.powercrypt.com/ .
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Comes with 512KB SRAM.
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.It XL-Crypt
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See
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.Pa http://www.powercrypt.com/ .
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Only board based on 7811 (which is faster than 7751 and has
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a random number generator).
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.It NetSec 7751
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See
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.Pa http://www.netsec.net/ .
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Supports the most IPsec sessions, with 1MB SRAM.
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.It Soekris Engineering vpn1201 and vpn1211
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See
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.Pa http://www.soekris.com/ .
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Contains a 7951 and supports symmetric and random number operations.
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.It Soekris Engineering vpn1401 and vpn1411
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See
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.Pa http://www.soekris.com/ .
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Contains a 7955 and supports symmetric and random number operations.
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.El
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.Pp
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The
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.Nm
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driver registers itself to accelerate DES, Triple-DES,
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AES (7955 and 7956 only), ARC4, MD5,
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MD5-HMAC, SHA1, and SHA1-HMAC operations for
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.Xr opencrypto 9 ,
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and thus for
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.Xr fast_ipsec 4
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and
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.Xr crypto 4 .
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.Pp
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The Hifn
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.Tn 7951 ,
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.Tn 7811 ,
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.Tn 7955 ,
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and
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.Tn 7956
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may also supply data to the kernel
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.Xr rnd 4
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subsystem.
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.Sh SEE ALSO
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.Xr crypto 4 ,
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.Xr fast_ipsec 4 ,
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.Xr intro 4 ,
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.Xr rnd 4 ,
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.Xr opencrypto 9
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.Sh HISTORY
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The
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.Nm
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device driver appeared in
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.Ox 2.7 .
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The
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.Nm
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device driver was imported to
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.Fx 5.0 ,
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back-ported to
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.Fx 4.8 ,
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and subsequently imported into
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.Nx 2.0 .
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.Sh CAVEATS
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The Hifn 9751 shares the same PCI ID.
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This chip is basically a 7751, but with the cryptographic functions missing.
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Instead, the 9751 is only capable of doing compression.
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Since we do not currently attempt to use any of these chips to do
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compression, the 9751-based cards are not useful.
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.Pp
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Support for the 7955 and 7956 is incomplete; the asymmetric crypto
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facilities are to be added and the performance is suboptimal.
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.Pp
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Supplying data to the kernel
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.Xr rnd 4
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subsystem has been disabled, pending verification that the on-chip
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RNG is statistically adequate.
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.Sh BUGS
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The 7751 chip starts out at initialization by only supporting compression.
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A proprietary algorithm, which has been reverse engineered, is required to
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unlock the cryptographic functionality of the chip.
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It is possible for vendors to make boards which have a lock ID not known
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to the driver, but all vendors currently just use the obvious ID which is
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13 bytes of 0.
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