2ecdd552dc
registers are registers that overlap with others on many controllers, but which may actually be distinct on some controllers. Right now, the two shadows are: - wd_status (usually overlaps wd_command) - wd_features (usually overlaps wd_error) Add a new helper function, wdc_init_shadow_regs(), used to initialize the shadow register handles on controllers where they do actually overlap. Partially from Jordan Rhody @ Wasabi Systems, Inc.
286 lines
8.2 KiB
C
286 lines
8.2 KiB
C
/* $NetBSD: wdc_isa.c,v 1.41 2004/05/25 20:42:41 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum and by Onno van der Linden.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: wdc_isa.c,v 1.41 2004/05/25 20:42:41 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/ic/wdcreg.h>
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#include <dev/ata/atavar.h>
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#include <dev/ic/wdcvar.h>
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#define WDC_ISA_REG_NPORTS 8
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#define WDC_ISA_AUXREG_OFFSET 0x206
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#define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */
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/* options passed via the 'flags' config keyword */
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#define WDC_OPTIONS_32 0x01 /* try to use 32bit data I/O */
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#define WDC_OPTIONS_ATA_NOSTREAM 0x04
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#define WDC_OPTIONS_ATAPI_NOSTREAM 0x08
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struct wdc_isa_softc {
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struct wdc_softc sc_wdcdev;
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struct wdc_channel *wdc_chanlist[1];
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struct wdc_channel wdc_channel;
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struct ata_queue wdc_chqueue;
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isa_chipset_tag_t sc_ic;
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void *sc_ih;
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int sc_drq;
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};
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int wdc_isa_probe __P((struct device *, struct cfdata *, void *));
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void wdc_isa_attach __P((struct device *, struct device *, void *));
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CFATTACH_DECL(wdc_isa, sizeof(struct wdc_isa_softc),
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wdc_isa_probe, wdc_isa_attach, NULL, NULL);
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#if 0
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static void wdc_isa_dma_setup __P((struct wdc_isa_softc *));
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static int wdc_isa_dma_init __P((void*, int, int, void *, size_t, int));
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static void wdc_isa_dma_start __P((void*, int, int));
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static int wdc_isa_dma_finish __P((void*, int, int, int));
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#endif
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int
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wdc_isa_probe(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct wdc_channel ch;
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struct isa_attach_args *ia = aux;
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int result = 0, i;
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if (ia->ia_nio < 1)
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return (0);
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if (ia->ia_nirq < 1)
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return (0);
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if (ISA_DIRECT_CONFIG(ia))
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return (0);
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if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT)
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return (0);
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if (ia->ia_irq[0].ir_irq == ISACF_IRQ_DEFAULT)
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return (0);
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if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq == ISACF_DRQ_DEFAULT)
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ia->ia_ndrq = 0;
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memset(&ch, 0, sizeof(ch));
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ch.cmd_iot = ia->ia_iot;
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if (bus_space_map(ch.cmd_iot, ia->ia_io[0].ir_addr,
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WDC_ISA_REG_NPORTS, 0, &ch.cmd_baseioh))
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goto out;
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for (i = 0; i < WDC_ISA_REG_NPORTS; i++) {
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if (bus_space_subregion(ch.cmd_iot, ch.cmd_baseioh, i,
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i == 0 ? 4 : 1, &ch.cmd_iohs[i]) != 0)
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goto outunmap;
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}
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wdc_init_shadow_regs(&ch);
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ch.ctl_iot = ia->ia_iot;
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if (bus_space_map(ch.ctl_iot, ia->ia_io[0].ir_addr +
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WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS, 0, &ch.ctl_ioh))
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goto outunmap;
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result = wdcprobe(&ch);
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if (result) {
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ia->ia_nio = 1;
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ia->ia_io[0].ir_size = WDC_ISA_REG_NPORTS;
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ia->ia_nirq = 1;
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ia->ia_niomem = 0;
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}
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bus_space_unmap(ch.ctl_iot, ch.ctl_ioh, WDC_ISA_AUXREG_NPORTS);
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outunmap:
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bus_space_unmap(ch.cmd_iot, ch.cmd_baseioh, WDC_ISA_REG_NPORTS);
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out:
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return (result);
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}
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void
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wdc_isa_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct wdc_isa_softc *sc = (void *)self;
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struct isa_attach_args *ia = aux;
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int wdc_cf_flags = self->dv_cfdata->cf_flags;
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int i;
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sc->wdc_channel.cmd_iot = ia->ia_iot;
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sc->wdc_channel.ctl_iot = ia->ia_iot;
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sc->sc_ic = ia->ia_ic;
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if (bus_space_map(sc->wdc_channel.cmd_iot, ia->ia_io[0].ir_addr,
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WDC_ISA_REG_NPORTS, 0, &sc->wdc_channel.cmd_baseioh) ||
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bus_space_map(sc->wdc_channel.ctl_iot,
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ia->ia_io[0].ir_addr + WDC_ISA_AUXREG_OFFSET,
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WDC_ISA_AUXREG_NPORTS, 0, &sc->wdc_channel.ctl_ioh)) {
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printf(": couldn't map registers\n");
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return;
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}
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for (i = 0; i < WDC_ISA_REG_NPORTS; i++) {
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if (bus_space_subregion(sc->wdc_channel.cmd_iot,
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sc->wdc_channel.cmd_baseioh, i, i == 0 ? 4 : 1,
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&sc->wdc_channel.cmd_iohs[i]) != 0) {
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printf(": couldn't subregion registers\n");
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return;
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}
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}
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wdc_init_shadow_regs(&sc->wdc_channel);
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sc->wdc_channel.data32iot = sc->wdc_channel.cmd_iot;
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sc->wdc_channel.data32ioh = sc->wdc_channel.cmd_iohs[0];
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sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq,
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IST_EDGE, IPL_BIO, wdcintr, &sc->wdc_channel);
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#if 0
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if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq != ISACF_DRQ_DEFAULT) {
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sc->sc_drq = ia->ia_drq[0].ir_drq;
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
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sc->sc_wdcdev.dma_arg = sc;
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sc->sc_wdcdev.dma_init = wdc_isa_dma_init;
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sc->sc_wdcdev.dma_start = wdc_isa_dma_start;
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sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish;
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wdc_isa_dma_setup(sc);
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}
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#endif
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_PREATA;
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if (wdc_cf_flags & WDC_OPTIONS_32)
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA32;
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if (wdc_cf_flags & WDC_OPTIONS_ATA_NOSTREAM)
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_ATA_NOSTREAM;
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if (wdc_cf_flags & WDC_OPTIONS_ATAPI_NOSTREAM)
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_ATAPI_NOSTREAM;
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sc->sc_wdcdev.PIO_cap = 0;
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sc->wdc_chanlist[0] = &sc->wdc_channel;
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sc->sc_wdcdev.channels = sc->wdc_chanlist;
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sc->sc_wdcdev.nchannels = 1;
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sc->wdc_channel.ch_channel = 0;
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sc->wdc_channel.ch_wdc = &sc->sc_wdcdev;
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sc->wdc_channel.ch_queue = &sc->wdc_chqueue;
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printf("\n");
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wdcattach(&sc->wdc_channel);
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}
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#if 0
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static void
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wdc_isa_dma_setup(sc)
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struct wdc_isa_softc *sc;
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{
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bus_size_t maxsize;
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if ((maxsize = isa_dmamaxsize(sc->sc_ic, sc->sc_drq)) < MAXPHYS) {
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printf("%s: max DMA size %lu is less than required %d\n",
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sc->sc_wdcdev.sc_dev.dv_xname, (u_long)maxsize, MAXPHYS);
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sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA;
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return;
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}
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if (isa_drq_alloc(sc->sc_ic, sc->sc_drq) != 0) {
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printf("%s: can't reserve drq %d\n",
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sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq);
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sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA;
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return;
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}
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if (isa_dmamap_create(sc->sc_ic, sc->sc_drq,
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MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
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printf("%s: can't create map for drq %d\n",
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sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq);
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sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA;
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}
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}
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static int
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wdc_isa_dma_init(v, channel, drive, databuf, datalen, read)
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void *v;
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void *databuf;
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size_t datalen;
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int read;
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{
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struct wdc_isa_softc *sc = v;
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isa_dmastart(sc->sc_ic, sc->sc_drq, databuf, datalen, NULL,
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(read ? DMAMODE_READ : DMAMODE_WRITE) | DMAMODE_DEMAND,
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BUS_DMA_NOWAIT);
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return 0;
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}
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static void
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wdc_isa_dma_start(v, channel, drive)
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void *v;
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int channel, drive;
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{
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/* nothing to do */
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}
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static int
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wdc_isa_dma_finish(v, channel, drive, read)
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void *v;
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int channel, drive;
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int read;
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{
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struct wdc_isa_softc *sc = v;
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isa_dmadone(sc->sc_ic, sc->sc_drq);
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return 0;
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}
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#endif
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