607 lines
20 KiB
C
607 lines
20 KiB
C
/* $NetBSD: if_lmcvar.h,v 1.1 1999/03/25 03:32:43 explorer Exp $ */
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/*-
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* Copyright (c) 1997-1999 LAN Media Corporation (LMC)
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* All rights reserved. www.lanmedia.com
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*
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* This code is written by Michael Graff <graff@vix.com> for LMC.
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* The code is derived from permitted modifications to software created
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* by Matt Thomas (matt@3am-software.com).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following disclaimer
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* in the documentation and/or other materials provided with the
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* distribution.
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* 3. All marketing or advertising materials mentioning features or
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* use of this software must display the following acknowledgement:
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* This product includes software developed by LAN Media Corporation
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* and its contributors.
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* 4. Neither the name of LAN Media Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY LAN MEDIA CORPORATION AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1994-1997 Matt Thomas (matt@3am-software.com)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software withough specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#if !defined(_DEVAR_H)
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#define _DEVAR_H
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#define LMC_MTU 1500
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#define PPP_HEADER_LEN 4
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#define BIG_PACKET
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/*
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* Intel CPUs should use I/O mapped access. XXXMLG Is this true on NetBSD
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* too?
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*/
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#if defined(__i386__)
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#define LMC_IOMAPPED
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#endif
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/*
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* This turns on all sort of debugging stuff and make the
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* driver much larger.
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*/
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#if 0
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#define LMC_DEBUG
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#define DP(x) printf x
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#else
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#define DP(x)
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#endif
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/*
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* the dec chip has its own idea of what a receive error is, but we don't
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* want to use it, as it will get the crc error wrong when 16-bit
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* crcs are used. So, we only care about certain conditions.
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*/
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#ifndef TULIP_DSTS_RxMIIERR
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#define TULIP_DSTS_RxMIIERR 0x00000008
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#endif
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#define LMC_DSTS_ERRSUM (TULIP_DSTS_RxMIIERR)
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/*
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* This is the PCI configuration support.
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*/
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#define PCI_CFID 0x00 /* Configuration ID */
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#define PCI_CFCS 0x04 /* Configurtion Command/Status */
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#define PCI_CFRV 0x08 /* Configuration Revision */
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#define PCI_CFLT 0x0c /* Configuration Latency Timer */
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#define PCI_CBIO 0x10 /* Configuration Base IO Address */
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#define PCI_CBMA 0x14 /* Configuration Base Memory Address */
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#define PCI_SSID 0x2c /* subsystem config register */
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#define PCI_CFIT 0x3c /* Configuration Interrupt */
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#define PCI_CFDA 0x40 /* Configuration Driver Area */
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#define LMC_HZ 10
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#ifndef TULIP_GP_PINSET
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#define TULIP_GP_PINSET 0x00000100L
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#endif
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#ifndef TULIP_BUSMODE_READMULTIPLE
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#define TULIP_BUSMODE_READMULTIPLE 0x00200000L
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#endif
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#if defined(__NetBSD__)
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#include "rnd.h"
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#if NRND > 0
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#include <sys/rnd.h>
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#endif
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#define LMC_CSR_READ(sc, csr) \
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bus_space_read_4((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr)
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#define LMC_CSR_WRITE(sc, csr, val) \
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bus_space_write_4((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr, (val))
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#define LMC_CSR_READBYTE(sc, csr) \
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bus_space_read_1((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr)
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#define LMC_CSR_WRITEBYTE(sc, csr, val) \
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bus_space_write_1((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr, (val))
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#endif /* __NetBSD__ */
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#ifdef LMC_IOMAPPED
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#define LMC_EISA_CSRSIZE 16
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#define LMC_EISA_CSROFFSET 0
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#define LMC_PCI_CSRSIZE 8
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#define LMC_PCI_CSROFFSET 0
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#if !defined(__NetBSD__)
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#define LMC_CSR_READ(sc, csr) (inl((sc)->lmc_csrs.csr))
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#define LMC_CSR_WRITE(sc, csr, val) outl((sc)->lmc_csrs.csr, val)
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#define LMC_CSR_READBYTE(sc, csr) (inb((sc)->lmc_csrs.csr))
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#define LMC_CSR_WRITEBYTE(sc, csr, val) outb((sc)->lmc_csrs.csr, val)
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#endif /* __NetBSD__ */
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#else /* LMC_IOMAPPED */
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#define LMC_PCI_CSRSIZE 8
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#define LMC_PCI_CSROFFSET 0
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#if !defined(__NetBSD__)
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/*
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* macros to read and write CSRs. Note that the "0 +" in
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* READ_CSR is to prevent the macro from being an lvalue
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* and WRITE_CSR shouldn't be assigned from.
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*/
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#define LMC_CSR_READ(sc, csr) (0 + *(sc)->lmc_csrs.csr)
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#define LMC_CSR_WRITE(sc, csr, val) ((void)(*(sc)->lmc_csrs.csr = (val)))
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#endif /* __NetBSD__ */
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#endif /* LMC_IOMAPPED */
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/*
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* This structure contains "pointers" for the registers on
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* the various 21x4x chips. CSR0 through CSR8 are common
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* to all chips. After that, it gets messy...
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*/
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typedef struct {
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lmc_csrptr_t csr_busmode; /* CSR0 */
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lmc_csrptr_t csr_txpoll; /* CSR1 */
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lmc_csrptr_t csr_rxpoll; /* CSR2 */
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lmc_csrptr_t csr_rxlist; /* CSR3 */
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lmc_csrptr_t csr_txlist; /* CSR4 */
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lmc_csrptr_t csr_status; /* CSR5 */
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lmc_csrptr_t csr_command; /* CSR6 */
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lmc_csrptr_t csr_intr; /* CSR7 */
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lmc_csrptr_t csr_missed_frames; /* CSR8 */
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lmc_csrptr_t csr_9; /* CSR9 */
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lmc_csrptr_t csr_10; /* CSR10 */
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lmc_csrptr_t csr_11; /* CSR11 */
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lmc_csrptr_t csr_12; /* CSR12 */
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lmc_csrptr_t csr_13; /* CSR13 */
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lmc_csrptr_t csr_14; /* CSR14 */
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lmc_csrptr_t csr_15; /* CSR15 */
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} lmc_regfile_t;
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#define csr_enetrom csr_9 /* 21040 */
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#define csr_reserved csr_10 /* 21040 */
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#define csr_full_duplex csr_11 /* 21040 */
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#define csr_bootrom csr_10 /* 21041/21140A/?? */
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#define csr_gp csr_12 /* 21140* */
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#define csr_watchdog csr_15 /* 21140* */
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#define csr_gp_timer csr_11 /* 21041/21140* */
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#define csr_srom_mii csr_9 /* 21041/21140* */
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#define csr_sia_status csr_12 /* 2104x */
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#define csr_sia_connectivity csr_13 /* 2104x */
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#define csr_sia_tx_rx csr_14 /* 2104x */
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#define csr_sia_general csr_15 /* 2104x */
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/*
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* While 21x4x allows chaining of its descriptors, this driver
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* doesn't take advantage of it. We keep the descriptors in a
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* traditional FIFO ring.
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*/
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struct lmc_ringinfo {
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tulip_desc_t *ri_first; /* first entry in ring */
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tulip_desc_t *ri_last; /* one after last entry */
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tulip_desc_t *ri_nextin; /* next to processed by host */
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tulip_desc_t *ri_nextout; /* next to processed by adapter */
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int ri_max;
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int ri_free;
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};
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/*
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* The 21040 has a stupid restriction in that the receive
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* buffers must be longword aligned. But since Ethernet
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* headers are not a multiple of longwords in size this forces
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* the data to non-longword aligned. Since IP requires the
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* data to be longword aligned, we need to copy it after it has
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* been DMA'ed in our memory.
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*
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* Since we have to copy it anyways, we might as well as allocate
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* dedicated receive space for the input. This allows to use a
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* small receive buffer size and more ring entries to be able to
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* better keep with a flood of tiny Ethernet packets.
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*
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* The receive space MUST ALWAYS be a multiple of the page size.
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* And the number of receive descriptors multiplied by the size
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* of the receive buffers must equal the recevive space. This
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* is so that we can manipulate the page tables so that even if a
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* packet wraps around the end of the receive space, we can
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* treat it as virtually contiguous.
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*
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* The above used to be true (the stupid restriction is still true)
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* but we gone to directly DMA'ing into MBUFs (unless it's on an
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* architecture which can't handle unaligned accesses) because with
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* 100Mb/s cards the copying is just too much of a hit.
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*/
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#define LMC_RXDESCS 48
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#define LMC_TXDESCS 128
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#define LMC_RXQ_TARGET 32
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#if LMC_RXQ_TARGET >= LMC_RXDESCS
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#error LMC_RXQ_TARGET must be less than LMC_RXDESCS
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#endif
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#define LMC_RX_BUFLEN ((MCLBYTES < 2048 ? MCLBYTES : 2048) - 16)
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/*
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* The various controllers support. Technically the DE425 is just
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* a 21040 on EISA. But since it remarkably difference from normal
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* 21040s, we give it its own chip id.
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*/
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typedef enum {
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LMC_21140, LMC_21140A,
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LMC_CHIPID_UNKNOWN
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} lmc_chipid_t;
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#define LMC_BIT(b) (1L << ((int)(b)))
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typedef struct {
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/*
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* Transmit Statistics
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*/
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u_int32_t dot3StatsSingleCollisionFrames;
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u_int32_t dot3StatsMultipleCollisionFrames;
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u_int32_t dot3StatsSQETestErrors;
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u_int32_t dot3StatsDeferredTransmissions;
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u_int32_t dot3StatsLateCollisions;
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u_int32_t dot3StatsExcessiveCollisions;
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u_int32_t dot3StatsCarrierSenseErrors;
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u_int32_t dot3StatsInternalMacTransmitErrors;
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u_int32_t dot3StatsInternalTransmitUnderflows; /* not in rfc1650! */
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u_int32_t dot3StatsInternalTransmitBabbles; /* not in rfc1650! */
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/*
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* Receive Statistics
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*/
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u_int32_t dot3StatsMissedFrames; /* not in rfc1650! */
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u_int32_t dot3StatsAlignmentErrors;
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u_int32_t dot3StatsFCSErrors;
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u_int32_t dot3StatsFrameTooLongs;
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u_int32_t dot3StatsInternalMacReceiveErrors;
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} lmc_dot3_stats_t;
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/*
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* Now to important stuff. This is softc structure (where does softc
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* come from??? No idea) for the tulip device.
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*
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*/
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struct lmc___softc {
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#if defined(__bsdi__)
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struct device lmc_dev; /* base device */
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struct isadev lmc_id; /* ISA device */
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struct intrhand lmc_ih; /* intrrupt vectoring */
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struct atshutdown lmc_ats; /* shutdown hook */
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struct p2pcom lmc_p2pcom; /* point-to-point common stuff */
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#define lmc_if lmc_p2pcom.p2p_if /* network-visible interface */
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#endif /* __bsdi__ */
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#if defined(__NetBSD__)
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struct device lmc_dev; /* base device */
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void *lmc_ih; /* intrrupt vectoring */
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void *lmc_ats; /* shutdown hook */
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bus_space_tag_t lmc_bustag;
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bus_space_handle_t lmc_bushandle; /* CSR region handle */
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pci_chipset_tag_t lmc_pc;
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#endif
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#if defined(__NetBSD__) || defined(__FreeBSD__)
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struct sppp lmc_sppp;
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#define lmc_if lmc_sppp.pp_if
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#endif
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u_int8_t lmc_enaddr[6]; /* yes, a small hack... */
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lmc_regfile_t lmc_csrs;
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volatile u_int32_t lmc_txtick;
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volatile u_int32_t lmc_rxtick;
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u_int32_t lmc_flags;
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u_int32_t lmc_features; /* static bits indicating features of chip */
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u_int32_t lmc_intrmask; /* our copy of csr_intr */
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u_int32_t lmc_cmdmode; /* our copy of csr_cmdmode */
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u_int32_t lmc_last_system_error : 3; /* last system error (only value is LMC_SYSTEMERROR is also set) */
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u_int32_t lmc_system_errors; /* number of system errors encountered */
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u_int32_t lmc_statusbits; /* status bits from CSR5 that may need to be printed */
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u_int8_t lmc_revinfo; /* revision of chip */
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u_int8_t lmc_cardtype; /* LMC_CARDTYPE_HSSI or ..._DS3 */
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u_int32_t lmc_gpio_io; /* state of in/out settings */
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u_int32_t lmc_gpio; /* state of outputs */
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u_int8_t lmc_gp;
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lmc_chipid_t lmc_chipid; /* type of chip we are using */
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u_int32_t lmc_miireg16;
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struct ifqueue lmc_txq;
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struct ifqueue lmc_rxq;
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lmc_dot3_stats_t lmc_dot3stats;
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lmc_ringinfo_t lmc_rxinfo;
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lmc_ringinfo_t lmc_txinfo;
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u_int8_t lmc_rombuf[128];
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lmc_media_t *lmc_media;
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lmc_ctl_t ictl;
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#if defined(__NetBSD__)
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struct device *lmc_pci_busno; /* needed for multiport boards */
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#else
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u_int8_t lmc_pci_busno; /* needed for multiport boards */
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#endif
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u_int8_t lmc_pci_devno; /* needed for multiport boards */
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#if defined(__FreeBSD__)
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tulip_desc_t *lmc_rxdescs;
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tulip_desc_t *lmc_txdescs;
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#else
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tulip_desc_t lmc_rxdescs[LMC_RXDESCS];
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tulip_desc_t lmc_txdescs[LMC_TXDESCS];
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#endif
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#if defined(__NetBSD__) && NRND > 0
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rndsource_element_t lmc_rndsource;
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#endif
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};
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/*
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* lmc_flags
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*/
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#define LMC_IFUP 0x00000001
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#define LMC_00000002 0x00000002
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#define LMC_00000004 0x00000004
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#define LMC_00000008 0x00000008
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#define LMC_00000010 0x00000010
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#define LMC_MODEMOK 0x00000020
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#define LMC_00000040 0x00000040
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#define LMC_00000080 0x00000080
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#define LMC_RXACT 0x00000100
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#define LMC_INRESET 0x00000200
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#define LMC_NEEDRESET 0x00000400
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#define LMC_00000800 0x00000800
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#define LMC_00001000 0x00001000
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#define LMC_00002000 0x00002000
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#define LMC_WANTTXSTART 0x00004000
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#define LMC_NEWTXTHRESH 0x00008000
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#define LMC_NOAUTOSENSE 0x00010000
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#define LMC_PRINTLINKUP 0x00020000
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#define LMC_LINKUP 0x00040000
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#define LMC_RXBUFSLOW 0x00080000
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#define LMC_NOMESSAGES 0x00100000
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#define LMC_SYSTEMERROR 0x00200000
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#define LMC_TIMEOUTPENDING 0x00400000
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#define LMC_00800000 0x00800000
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#define LMC_01000000 0x01000000
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#define LMC_02000000 0x02000000
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#define LMC_RXIGNORE 0x04000000
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#define LMC_08000000 0x08000000
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#define LMC_10000000 0x10000000
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#define LMC_20000000 0x20000000
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#define LMC_40000000 0x40000000
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#define LMC_80000000 0x80000000
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/*
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* lmc_features
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*/
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#define LMC_HAVE_GPR 0x00000001 /* have gp register (140[A]) */
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#define LMC_HAVE_RXBADOVRFLW 0x00000002 /* RX corrupts on overflow */
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#define LMC_HAVE_POWERMGMT 0x00000004 /* Snooze/sleep modes */
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#define LMC_HAVE_MII 0x00000008 /* Some medium on MII */
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#define LMC_HAVE_SIANWAY 0x00000010 /* SIA does NWAY */
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#define LMC_HAVE_DUALSENSE 0x00000020 /* SIA senses both AUI & TP */
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#define LMC_HAVE_SIAGP 0x00000040 /* SIA has a GP port */
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#define LMC_HAVE_BROKEN_HASH 0x00000080 /* Broken Multicast Hash */
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#define LMC_HAVE_ISVSROM 0x00000100 /* uses ISV SROM Format */
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#define LMC_HAVE_BASEROM 0x00000200 /* Board ROM can be cloned */
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#define LMC_HAVE_SLAVEDROM 0x00000400 /* Board ROM cloned */
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#define LMC_HAVE_SLAVEDINTR 0x00000800 /* Board slaved interrupt */
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#define LMC_HAVE_SHAREDINTR 0x00001000 /* Board shares interrupts */
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#define LMC_HAVE_OKROM 0x00002000 /* ROM was recognized */
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#define LMC_HAVE_NOMEDIA 0x00004000 /* did not detect any media */
|
|
#define LMC_HAVE_STOREFWD 0x00008000 /* have CMD_STOREFWD */
|
|
#define LMC_HAVE_SIA100 0x00010000 /* has LS100 in SIA status */
|
|
|
|
static const char * const lmc_system_errors[] = {
|
|
"parity error",
|
|
"master abort",
|
|
"target abort",
|
|
"reserved #3",
|
|
"reserved #4",
|
|
"reserved #5",
|
|
"reserved #6",
|
|
"reserved #7",
|
|
};
|
|
|
|
static const char * const lmc_status_bits[] = {
|
|
NULL,
|
|
"transmit process stopped",
|
|
NULL,
|
|
"transmit jabber timeout",
|
|
|
|
NULL,
|
|
"transmit underflow",
|
|
NULL,
|
|
"receive underflow",
|
|
|
|
"receive process stopped",
|
|
"receive watchdog timeout",
|
|
NULL,
|
|
NULL,
|
|
|
|
"link failure",
|
|
NULL,
|
|
NULL,
|
|
};
|
|
|
|
/*
|
|
* This driver supports a maximum of 32 tulip boards.
|
|
* This should be enough for the forseeable future.
|
|
*/
|
|
#define LMC_MAX_DEVICES 32
|
|
|
|
#if defined(__FreeBSD__)
|
|
typedef void ifnet_ret_t;
|
|
typedef int ioctl_cmd_t;
|
|
static lmc_softc_t *tulips[LMC_MAX_DEVICES];
|
|
#if BSD >= 199506
|
|
#define LMC_IFP_TO_SOFTC(ifp) ((lmc_softc_t *)((ifp)->if_softc))
|
|
#if NBPFILTER > 0
|
|
#define LMC_BPF_MTAP(sc, m) bpf_mtap(&(sc)->lmc_sppp.pp_if, m)
|
|
#define LMC_BPF_TAP(sc, p, l) bpf_tap(&(sc)->lmc_sppp.pp_if, p, l)
|
|
#define LMC_BPF_ATTACH(sc) bpfattach(&(sc)->lmc_sppp.pp_if, DLT_PPP, PPP_HEADER_LEN)
|
|
#endif
|
|
#define LMC_VOID_INTRFUNC
|
|
#define IFF_NOTRAILERS 0
|
|
#define CLBYTES PAGE_SIZE
|
|
#define LMC_EADDR_FMT "%6D"
|
|
#define LMC_EADDR_ARGS(addr) addr, ":"
|
|
#else
|
|
extern int bootverbose;
|
|
#define LMC_IFP_TO_SOFTC(ifp) (LMC_UNIT_TO_SOFTC((ifp)->if_unit))
|
|
#include <sys/devconf.h>
|
|
#define LMC_DEVCONF
|
|
#endif
|
|
#define LMC_UNIT_TO_SOFTC(unit) (tulips[unit])
|
|
#define LMC_BURSTSIZE(unit) pci_max_burst_len
|
|
#define loudprintf if (bootverbose) printf
|
|
#endif
|
|
|
|
#if defined(__bsdi__)
|
|
typedef int ifnet_ret_t;
|
|
typedef u_long ioctl_cmd_t;
|
|
extern struct cfdriver lmccd;
|
|
#define LMC_UNIT_TO_SOFTC(unit) ((lmc_softc_t *)lmccd.cd_devs[unit])
|
|
#define LMC_IFP_TO_SOFTC(ifp) (LMC_UNIT_TO_SOFTC((ifp)->if_unit))
|
|
#define loudprintf aprint_verbose
|
|
#define MCNT(x) (sizeof(x) / sizeof(struct ifmedia_entry))
|
|
#define lmc_unit lmc_dev.dv_unit
|
|
#define lmc_name lmc_p2pcom.p2p_if.if_name
|
|
#define LMC_BPF_MTAP(sc, m)
|
|
#define LMC_BPF_TAP(sc, p, l)
|
|
#define LMC_BPF_ATTACH(sc)
|
|
#endif /* __bsdi__ */
|
|
|
|
#if defined(__NetBSD__)
|
|
typedef void ifnet_ret_t;
|
|
typedef u_long ioctl_cmd_t;
|
|
extern struct cfattach de_ca;
|
|
extern struct cfdriver de_cd;
|
|
#define LMC_UNIT_TO_SOFTC(unit) ((lmc_softc_t *) de_cd.cd_devs[unit])
|
|
#define LMC_IFP_TO_SOFTC(ifp) ((lmc_softc_t *)((ifp)->if_softc))
|
|
#define lmc_unit lmc_dev.dv_unit
|
|
#define lmc_xname lmc_if.if_xname
|
|
#define LMC_RAISESPL() splnet()
|
|
#define LMC_RAISESOFTSPL() splsoftnet()
|
|
#define LMC_RESTORESPL(s) splx(s)
|
|
#define lmc_enaddr lmc_enaddr
|
|
#define loudprintf printf
|
|
#define LMC_PRINTF_FMT "%s"
|
|
#define LMC_PRINTF_ARGS sc->lmc_xname
|
|
#if defined(__alpha__)
|
|
/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
|
|
#define LMC_KVATOPHYS(sc, va) alpha_XXX_dmamap((vm_offset_t)(va))
|
|
#endif
|
|
#endif /* __NetBSD__ */
|
|
|
|
#ifndef LMC_PRINTF_FMT
|
|
#define LMC_PRINTF_FMT "%s%d"
|
|
#endif
|
|
#ifndef LMC_PRINTF_ARGS
|
|
#define LMC_PRINTF_ARGS sc->lmc_name, sc->lmc_unit
|
|
#endif
|
|
|
|
#ifndef LMC_BURSTSIZE
|
|
#define LMC_BURSTSIZE(unit) 3
|
|
#endif
|
|
|
|
#ifndef lmc_unit
|
|
#define lmc_unit lmc_sppp.pp_if.if_unit
|
|
#endif
|
|
|
|
#ifndef lmc_name
|
|
#define lmc_name lmc_sppp.pp_if.if_name
|
|
#endif
|
|
|
|
#if !defined(lmc_bpf)
|
|
#if defined(__NetBSD__) || defined(__FreeBSD__)
|
|
#define lmc_bpf lmc_sppp.pp_if.if_bpf
|
|
#endif
|
|
#if defined(__bsdi__)
|
|
#define lmc_bpf lmc_if.if_bpf
|
|
#endif
|
|
#endif
|
|
|
|
#if !defined(LMC_KVATOPHYS)
|
|
#define LMC_KVATOPHYS(sc, va) vtophys(va)
|
|
#endif
|
|
|
|
#ifndef LMC_RAISESPL
|
|
#define LMC_RAISESPL() splimp()
|
|
#endif
|
|
#ifndef LMC_RAISESOFTSPL
|
|
#define LMC_RAISESOFTSPL() splnet()
|
|
#endif
|
|
#ifndef TULUP_RESTORESPL
|
|
#define LMC_RESTORESPL(s) splx(s)
|
|
#endif
|
|
|
|
/*
|
|
* While I think FreeBSD's 2.2 change to the bpf is a nice simplification,
|
|
* it does add yet more conditional code to this driver. Sigh.
|
|
*/
|
|
#if !defined(LMC_BPF_MTAP) && NBPFILTER > 0
|
|
#define LMC_BPF_MTAP(sc, m) bpf_mtap((sc)->lmc_bpf, m)
|
|
#define LMC_BPF_TAP(sc, p, l) bpf_tap((sc)->lmc_bpf, p, l)
|
|
#define LMC_BPF_ATTACH(sc) bpfattach(&(sc)->lmc_bpf, &(sc)->lmc_sppp.pp_if, DLT_PPP, PPP_HEADER_LEN)
|
|
#endif
|
|
|
|
/*
|
|
* However, this change to FreeBSD I am much less enamored with.
|
|
*/
|
|
#if !defined(LMC_EADDR_FMT)
|
|
#define LMC_EADDR_FMT "%s"
|
|
#define LMC_EADDR_ARGS(addr) ether_sprintf(addr)
|
|
#endif
|
|
|
|
#define LMC_CRC32_POLY 0xEDB88320UL /* CRC-32 Poly -- Little Endian */
|
|
#define LMC_MAX_TXSEG 30
|
|
|
|
#define LMC_ADDREQUAL(a1, a2) \
|
|
(((u_int16_t *)a1)[0] == ((u_int16_t *)a2)[0] \
|
|
&& ((u_int16_t *)a1)[1] == ((u_int16_t *)a2)[1] \
|
|
&& ((u_int16_t *)a1)[2] == ((u_int16_t *)a2)[2])
|
|
#define LMC_ADDRBRDCST(a1) \
|
|
(((u_int16_t *)a1)[0] == 0xFFFFU \
|
|
&& ((u_int16_t *)a1)[1] == 0xFFFFU \
|
|
&& ((u_int16_t *)a1)[2] == 0xFFFFU)
|
|
|
|
typedef int lmc_spl_t;
|
|
|
|
#endif /* !defined(_DEVAR_H) */
|