365 lines
9.2 KiB
C
365 lines
9.2 KiB
C
/* $NetBSD: isr.c,v 1.6 1998/11/10 22:45:45 dbj Exp $ */
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/*
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* This file was taken from from mvme68k/mvme68k/isr.c
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* should probably be re-synced when needed.
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* Darrin B. Jewell <jewell@mit.edu> Tue Nov 10 05:07:16 1998
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* original cvs id: NetBSD: isr.c,v 1.12 1998/07/05 06:49:07 jonathan Exp
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*/
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Adam Glass, Gordon W. Ross, and Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Link and dispatch interrupts.
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*/
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#include "opt_inet.h"
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#include "opt_atalk.h"
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#include "opt_ccitt.h"
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#include "opt_iso.h"
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#include "opt_ns.h"
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#include "opt_uvm.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/vmmeter.h>
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#ifdef UVM
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#include <vm/vm.h>
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#include <uvm/uvm_extern.h>
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#endif
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#include <net/netisr.h>
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#include <machine/cpu.h>
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#include <next68k/next68k/isr.h>
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isr_autovec_list_t isr_autovec[NISRAUTOVEC];
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struct isr_vectored isr_vectored[NISRVECTORED];
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extern int intrcnt[]; /* from locore.s */
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extern void (*vectab[]) __P((void));
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extern void badtrap __P((void));
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extern void intrhand_vectored __P((void));
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extern int getsr __P((void)); /* in locore.s */
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void
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isrinit()
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{
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int i;
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/* Initialize the autovector lists. */
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for (i = 0; i < NISRAUTOVEC; ++i) {
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LIST_INIT(&isr_autovec[i]);
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}
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}
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/*
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* Establish an autovectored interrupt handler.
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* Called by driver attach functions.
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*/
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void
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isrlink_autovec(func, arg, ipl, priority)
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int (*func) __P((void *));
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void *arg;
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int ipl;
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int priority;
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{
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struct isr_autovec *newisr, *curisr;
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isr_autovec_list_t *list;
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if ((ipl < 0) || (ipl >= NISRAUTOVEC))
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panic("isrlink_autovec: bad ipl %d", ipl);
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newisr = (struct isr_autovec *)malloc(sizeof(struct isr_autovec),
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M_DEVBUF, M_NOWAIT);
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if (newisr == NULL)
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panic("isrlink_autovec: can't allocate space for isr");
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/* Fill in the new entry. */
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newisr->isr_func = func;
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newisr->isr_arg = arg;
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newisr->isr_ipl = ipl;
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newisr->isr_priority = priority;
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/*
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* Some devices are particularly sensitive to interrupt
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* handling latency. The SCC, for example, can lose many
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* characters if its interrupt isn't handled with reasonable
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* speed.
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*
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* To work around this problem, each device can give itself a
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* "priority". An unbuffered SCC would give itself a higher
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* priority than a SCSI device, for example.
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*
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* This solution was originally developed for the hp300, which
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* has a flat spl scheme (by necessity). Thankfully, the
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* MVME systems don't have this problem, though this may serve
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* a useful purpose in any case.
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*/
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/*
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* Get the appropriate ISR list. If the list is empty, no
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* additional work is necessary; we simply insert ourselves
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* at the head of the list.
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*/
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list = &isr_autovec[ipl];
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if (list->lh_first == NULL) {
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LIST_INSERT_HEAD(list, newisr, isr_link);
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return;
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}
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/*
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* A little extra work is required. We traverse the list
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* and place ourselves after any ISRs with our current (or
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* higher) priority.
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*/
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for (curisr = list->lh_first; curisr->isr_link.le_next != NULL;
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curisr = curisr->isr_link.le_next) {
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if (newisr->isr_priority > curisr->isr_priority) {
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LIST_INSERT_BEFORE(curisr, newisr, isr_link);
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return;
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}
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}
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/*
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* We're the least important entry, it seems. We just go
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* on the end.
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*/
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LIST_INSERT_AFTER(curisr, newisr, isr_link);
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}
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/*
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* Establish a vectored interrupt handler.
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* Called by bus interrupt establish functions.
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*/
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void
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isrlink_vectored(func, arg, ipl, vec)
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int (*func) __P((void *));
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void *arg;
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int ipl, vec;
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{
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struct isr_vectored *isr;
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if ((ipl < 0) || (ipl >= NISRAUTOVEC))
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panic("isrlink_vectored: bad ipl %d", ipl);
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if ((vec < ISRVECTORED) || (vec >= ISRVECTORED + NISRVECTORED))
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panic("isrlink_vectored: bad vec 0x%x", vec);
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isr = &isr_vectored[vec - ISRVECTORED];
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if ((vectab[vec] != badtrap) || (isr->isr_func != NULL))
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panic("isrlink_vectored: vec 0x%x not available", vec);
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/* Fill in the new entry. */
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isr->isr_func = func;
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isr->isr_arg = arg;
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isr->isr_ipl = ipl;
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/* Hook into the vector table. */
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vectab[vec] = intrhand_vectored;
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}
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/*
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* Unhook a vectored interrupt.
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*/
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void
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isrunlink_vectored(vec)
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int vec;
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{
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if ((vec < ISRVECTORED) || (vec >= ISRVECTORED + NISRVECTORED))
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panic("isrunlink_vectored: bad vec 0x%x", vec);
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if (vectab[vec] != intrhand_vectored)
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panic("isrunlink_vectored: not vectored interrupt");
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vectab[vec] = badtrap;
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bzero(&isr_vectored[vec - ISRVECTORED], sizeof(struct isr_vectored));
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}
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/*
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* This is the dispatcher called by the low-level
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* assembly language autovectored interrupt routine.
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*/
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void
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isrdispatch_autovec(pc, evec, frame)
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int pc;
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int evec; /* format | vector offset */
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void *frame;
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{
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struct isr_autovec *isr;
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isr_autovec_list_t *list;
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int handled, ipl, vec;
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static int straycount, unexpected;
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vec = (evec & 0xfff) >> 2;
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if ((vec < ISRAUTOVEC) || (vec >= (ISRAUTOVEC + NISRAUTOVEC)))
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panic("isrdispatch_autovec: bad vec 0x%x\n", vec);
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ipl = vec - ISRAUTOVEC;
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intrcnt[ipl]++;
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#ifdef UVM
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uvmexp.intrs++;
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#else
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cnt.v_intr++;
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#endif
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list = &isr_autovec[ipl];
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if (list->lh_first == NULL) {
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printf("isrdispatch_autovec: ipl %d unexpected\n", ipl);
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if (++unexpected > 10)
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panic("too many unexpected interrupts");
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return;
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}
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/* Give all the handlers a chance. */
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handled = 0;
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for (isr = list->lh_first ; isr != NULL; isr = isr->isr_link.le_next)
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handled |= (*isr->isr_func)(isr->isr_arg ? isr->isr_arg : frame);
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if (handled)
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straycount = 0;
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else if (++straycount > 50)
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panic("isr_dispatch_autovec: too many stray interrupts");
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else
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printf("isrdispatch_autovec: stray level %d interrupt\n", ipl);
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}
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/*
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* This is the dispatcher called by the low-level
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* assembly language vectored interrupt routine.
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*/
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void
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isrdispatch_vectored(pc, evec, frame)
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int pc, evec;
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void *frame;
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{
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struct isr_vectored *isr;
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int ipl, vec;
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vec = (evec & 0xfff) >> 2;
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ipl = (getsr() >> 8) & 7;
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intrcnt[ipl]++;
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#ifdef UVM
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uvmexp.intrs++;
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#else
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cnt.v_intr++;
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#endif
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if ((vec < ISRVECTORED) || (vec >= (ISRVECTORED + NISRVECTORED)))
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panic("isrdispatch_vectored: bad vec 0x%x\n", vec);
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isr = &isr_vectored[vec - ISRVECTORED];
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if (isr->isr_func == NULL) {
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printf("isrdispatch_vectored: no handler for vec 0x%x\n", vec);
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vectab[vec] = badtrap;
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return;
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}
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/*
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* Handler gets exception frame if argument is NULL.
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*/
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if ((*isr->isr_func)(isr->isr_arg ? isr->isr_arg : frame) == 0)
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printf("isrdispatch_vectored: vec 0x%x not claimed\n", vec);
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}
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/*
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* XXX Why on earth isn't this in a common file?!
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*/
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void netintr __P((void));
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void arpintr __P((void));
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void atintr __P((void));
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void ipintr __P((void));
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void nsintr __P((void));
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void clnlintr __P((void));
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void ccittintr __P((void));
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void pppintr __P((void));
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void
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netintr()
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{
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#ifdef INET
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#include "arp.h"
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#if NARP > 0
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if (netisr & (1 << NETISR_ARP)) {
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netisr &= ~(1 << NETISR_ARP);
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arpintr();
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}
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#endif
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if (netisr & (1 << NETISR_IP)) {
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netisr &= ~(1 << NETISR_IP);
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ipintr();
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}
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#endif
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#ifdef NETATALK
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if (netisr & (1 << NETISR_ATALK)) {
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netisr &= ~(1 << NETISR_ATALK);
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atintr();
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}
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#endif
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#ifdef NS
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if (netisr & (1 << NETISR_NS)) {
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netisr &= ~(1 << NETISR_NS);
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nsintr();
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}
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#endif
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#ifdef ISO
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if (netisr & (1 << NETISR_ISO)) {
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netisr &= ~(1 << NETISR_ISO);
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clnlintr();
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}
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#endif
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#ifdef CCITT
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if (netisr & (1 << NETISR_CCITT)) {
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netisr &= ~(1 << NETISR_CCITT);
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ccittintr();
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}
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#endif
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#include "ppp.h"
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#if NPPP > 0
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if (netisr & (1 << NETISR_PPP)) {
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netisr &= ~(1 << NETISR_PPP);
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pppintr();
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}
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#endif
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}
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