425 lines
10 KiB
C
425 lines
10 KiB
C
/* $NetBSD: asic.c,v 1.22 1997/07/21 05:39:40 jonathan Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/tc/tcvar.h>
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#include <dev/tc/ioasicvar.h>
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#include <machine/bus.h> /* wbflush() */
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#include <machine/autoconf.h>
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#if 0
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#include <machine/rpb.h>
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#include <alpha/tc/tc.h>
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#include <alpha/tc/asic.h>
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#endif
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#ifdef pmax
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#include <pmax/pmax/pmaxtype.h>
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#include <pmax/pmax/asic.h>
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#include <pmax/pmax/kn01.h>
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#include <pmax/pmax/kn02.h>
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#include <pmax/pmax/kmin.h>
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#include <pmax/pmax/maxine.h>
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#include <pmax/pmax/kn03.h>
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#include <pmax/pmax/turbochannel.h> /* interrupt enable declaration */
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#include <pmax/pmax/kn03.h>
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#include <pmax/pmax/kmin.h>
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#include <pmax/pmax/nameglue.h>
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extern int cputype;
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#endif
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struct asic_softc {
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struct device sc_dv;
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tc_addr_t sc_base;
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};
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/* Definition of the driver for autoconfig. */
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int asicmatch __P((struct device *, struct cfdata *, void *));
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void asicattach __P((struct device *, struct device *, void *));
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int asicprint(void *, const char *);
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/* Device locators. */
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#include "locators.h"
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#define ioasiccf_offset cf_loc[IOASICCF_OFFSET] /* offset */
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struct cfattach ioasic_ca = {
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sizeof(struct asic_softc), asicmatch, asicattach
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};
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struct cfdriver ioasic_cd = {
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NULL, "asic", DV_DULL
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};
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void asic_intr_establish __P((struct confargs *, intr_handler_t,
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intr_arg_t));
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void asic_intr_disestablish __P((struct confargs *));
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caddr_t ioasic_cvtaddr __P((struct confargs *));
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#ifndef pmax
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int asic_intr __P((void *));
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#endif
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int asic_intrnull __P((intr_arg_t));
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struct asic_slot {
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struct confargs as_ca;
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u_int as_bits;
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intr_handler_t as_handler;
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void *as_val;
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};
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#ifdef pmax
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/*#define IOASIC_DEBUG*/
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struct asic_slot *asic_slots;
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#include "ds-asic-conf.c"
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#endif /*pmax*/
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#ifdef IOASIC_DEBUG
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#define IOASIC_DPRINTF(x) printf x
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#else
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#define IOASIC_DPRINTF(x) do { if (0) printf x ; } while (0)
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#endif
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int
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asicmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct tc_attach_args *ta = aux;
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IOASIC_DPRINTF(("asicmatch: %s slot %d offset 0x%x pri %d\n",
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ta->ta_modname, ta->ta_slot, ta->ta_offset, (int)ta->ta_cookie));
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/* An IOCTL asic can only occur on the turbochannel, anyway. */
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#ifdef notyet
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if (parent != &tccd)
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return (0);
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#endif
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/* The 3MAX (kn02) is special. */
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if (TC_BUS_MATCHNAME(ta, KN02_ASIC_NAME)) {
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printf("(configuring KN02 system slot as asic)\n");
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goto gotasic;
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}
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/* Make sure that we're looking for this type of device. */
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if (!TC_BUS_MATCHNAME(ta, "IOCTL "))
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return (0);
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gotasic:
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/* See if the unit number is valid. */
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switch (cputype) {
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case DS_3MIN:
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if (cf->cf_unit > 0)
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return (0);
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asic_slots = kn03_asic_slots; /* XXX - 3min same as kn03? */
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break;
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case DS_MAXINE:
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if (cf->cf_unit > 0)
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return (0);
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asic_slots = xine_asic_slots;
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break;
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case DS_3MAX:
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if (cf->cf_unit > 0)
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return (0);
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asic_slots = kn02_asic_slots;
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break;
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case DS_3MAXPLUS:
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if (cf->cf_unit > 0)
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return (0);
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asic_slots = kn03_asic_slots;
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break;
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default:
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printf("no ASIC config table for this machine\n");
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return (0);
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}
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return (1);
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}
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void
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asicattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct asic_softc *sc = (struct asic_softc *)self;
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struct tc_attach_args *ta = aux;
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struct confargs *nca;
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struct ioasicdev_attach_args ioasicdev;
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int i;
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extern int cputype;
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if (asic_slots == NULL)
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panic("asicattach: no asic_slot map\n");
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IOASIC_DPRINTF(("asicattach: %s\n", sc->sc_dv.dv_xname));
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sc->sc_base = ta->ta_addr;
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ioasic_base = sc->sc_base; /* XXX XXX XXX */
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#ifdef pmax
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printf("\n");
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#else /* Alpha AXP: select ASIC speed */
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#ifdef DEC_3000_300
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if (cputype == ST_DEC_3000_300) {
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*(volatile u_int *)IOASIC_REG_CSR(sc->sc_base) |=
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IOASIC_CSR_FASTMODE;
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MB();
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printf(": slow mode\n");
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} else
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#endif /*DEC_3000_300*/
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printf(": fast mode\n");
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/* Decstations use hand-craft code to enable asic interrupts */
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BUS_INTR_ESTABLISH(ta, asic_intr, sc);
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#endif /* Alpha AXP: select ASIC speed */
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/* The MAXINE has seven pseudo-slots in its system slot */
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#define ASIC_MAX_NSLOTS 7 /*XXX*/
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/* Try to configure each CPU-internal device */
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for (i = 0; i < ASIC_MAX_NSLOTS; i++) {
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IOASIC_DPRINTF(("asicattach: entry %d, base addr %x\n",
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i, sc->sc_base));
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nca = &asic_slots[i].as_ca;
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if (nca == NULL) panic ("bad asic table\n");
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if (nca->ca_name == NULL || nca->ca_name[0] == 0)
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break;
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nca->ca_addr = ((u_int)sc->sc_base) + nca->ca_offset;
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IOASIC_DPRINTF((" adding %s subslot %d offset %x addr %x\n",
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nca->ca_name, nca->ca_slot, nca->ca_offset,
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nca->ca_addr));
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strncpy(ioasicdev.iada_modname, nca->ca_name, TC_ROM_LLEN);
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ioasicdev.iada_modname[TC_ROM_LLEN] = '\0';
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ioasicdev.iada_offset = nca->ca_offset;
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ioasicdev.iada_addr = nca->ca_addr;
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ioasicdev.iada_cookie = (void *)nca->ca_slotpri;
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/* Tell the autoconfig machinery we've found the hardware. */
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config_found(self, &ioasicdev, asicprint);
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}
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IOASIC_DPRINTF(("asicattach: done\n"));
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}
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int
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asicprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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struct ioasicdev_attach_args *d = aux;
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if (pnp)
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printf("%s at %s", d->iada_modname, pnp);
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printf(" offset 0x%x", d->iada_offset);
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printf(" priority %d", (int)d->iada_cookie);
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return (UNCONF);
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}
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int
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ioasic_submatch(match, d)
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struct cfdata *match;
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struct ioasicdev_attach_args *d;
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{
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return ((match->ioasiccf_offset == d->iada_offset) ||
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(match->ioasiccf_offset == IOASICCF_OFFSET_DEFAULT));
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}
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/*
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* Save interrupt slotname and enable mask (??)
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* On decstations this isn't useful, as the turbochannel
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* decstations all have incompatible ways of mapping interrupts
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* to IO ASIC or r3000 interrupt bits.
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* Instead of writing "as_bits" directly into an IOASIC interrupt-enable
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* register, Decstations use a machine-dependent function that
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* interpret (pseudo-) slot numbers and do ``the right thing'' to enable
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* or disable interrupts for a specific slot (or pseudo-slot), by
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* slot number, on that given CPU.
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*/
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void
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asic_intr_establish(ca, handler, val)
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struct confargs *ca;
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intr_handler_t handler;
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intr_arg_t val;
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{
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#if defined(DIAGNOSTIC) && defined(alpha)
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if (ca->ca_slot == IOASIC_SLOT_RTC)
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panic("setting clock interrupt incorrectly");
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#endif /*defined(DIAGNOSTIC) && defined(alpha)*/
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/* XXX SHOULD NOT BE THIS LITERAL */
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if (asic_slots[ca->ca_slot].as_handler != asic_intrnull)
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/*panic*/ printf("asic_intr_establish: slot %d twice", ca->ca_slot);
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/*
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* XXX We need to invent a better interface to machine-dependent
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* interrupt-enable code, or redo the Decstation configuration
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* tables with unused entries, so that slot is always equal
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* to "priority" (software pseudo-slot number). FIXME.
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*/
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#if defined(IOASIC_DEBUG) && 0
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printf("asic: %s: intr for entry %d slot %d pri %d\n",
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ca->ca_name, ca->ca_slot, ca->ca_slotpri,
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(int)asic_slots[ca->ca_slot].as_val);
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#endif /*IOASIC_DEBUG*/
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#ifdef pmax
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tc_enable_interrupt(ca->ca_slotpri, handler, val, 1);
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#else /* Alpha AXP */
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/* Save handler info so it can be enabled later (??) */
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asic_slots[ca->ca_slot].as_handler = handler;
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asic_slots[ca->ca_slot].as_val = val;
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#endif /* Alpha AXP */
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}
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void
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asic_intr_disestablish(ca)
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struct confargs *ca;
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{
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#ifdef pmax
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panic("asic_intr_disestablish: shouldn't ever be called\n");
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#else
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if (ca->ca_slot == IOASIC_SLOT_RTC)
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panic("asic_intr_disestablish: can't do clock interrupt");
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/* XXX SHOULD NOT BE THIS LITERAL */
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if (asic_slots[ca->ca_slot].as_handler == asic_intrnull)
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panic("asic_intr_disestablish: slot %d missing intr",
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ca->ca_slot);
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asic_slots[ca->ca_slot].as_handler = dsasic_intrnull;
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asic_slots[ca->ca_slot].as_val = (void *)(long)ca->ca_slot;
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#endif
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}
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void
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ioasic_intr_establish(dev, cookie, level, handler, val)
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struct device *dev;
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void *cookie;
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tc_intrlevel_t level;
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intr_handler_t handler;
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void *val;
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{
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(*tc_enable_interrupt)((int)cookie, handler, val, 1);
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}
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#ifdef alpha
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/*
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* asic_intr --
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* ASIC interrupt handler.
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*/
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int
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asic_intr(val)
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void *val;
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{
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register struct asic_softc *sc = val;
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register int i, ifound;
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int gifound;
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u_int32_t sir, junk;
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volatile u_int32_t *sirp, *junkp;
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sirp = (volatile u_int32_t *)IOASIC_REG_INTR(sc->sc_base);
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gifound = 0;
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do {
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ifound = 0;
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MB();
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MAGIC_READ;
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MB();
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sir = *sirp;
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for (i = 0; i < ASIC_MAX_NSLOTS; i++)
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if (sir & asic_slots[i].as_bits) {
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(void)(*asic_slots[i].as_handler)
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(asic_slots[i].as_val);
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ifound = 1;
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}
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gifound |= ifound;
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} while (ifound);
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return (gifound);
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}
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#endif /*!pmax*/
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int
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asic_intrnull(val)
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intr_arg_t val;
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{
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panic("uncaught IOCTL ASIC intr for slot %ld\n", (long)val);
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}
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/* XXX */
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char *
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ioasic_lance_ether_address()
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{
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return (u_char *)IOASIC_SYS_ETHER_ADDRESS(ioasic_base);
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}
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void
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ioasic_lance_dma_setup(v)
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void *v;
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{
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volatile u_int32_t *ldp;
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tc_addr_t tca;
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tca = (tc_addr_t)v;
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ldp = (volatile u_int *)IOASIC_REG_LANCE_DMAPTR(ioasic_base);
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*ldp = ((tca << 3) & ~(tc_addr_t)0x1f) | ((tca >> 29) & 0x1f);
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tc_wmb();
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*(volatile u_int32_t *)IOASIC_REG_CSR(ioasic_base) |=
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IOASIC_CSR_DMAEN_LANCE;
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tc_mb();
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}
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