2652188cc4
interface controllers (of varying intelligence levels). Contributed by Wasabi Systems, Inc. Primarily written by Steve Woodford, with some modification by me.
93 lines
4.0 KiB
C
93 lines
4.0 KiB
C
/* $NetBSD: m41st84reg.h,v 1.1 2003/09/30 00:35:31 thorpej Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_I2C_M41ST84REG_H_
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#define _DEV_I2C_M41ST84REG_H_
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#define M41ST84_ADDR 0x68
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#define M41ST84_REG_CSEC 0 /* 00-99 -- BCD Centiseconds */
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#define M41ST84_REG_SEC 1 /* 00-59 -- BCD Seconds */
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#define M41ST84_REG_MIN 2 /* 00-59 -- BCD Minutes */
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#define M41ST84_REG_CENHR 3 /* 0-1/00-23 -- BCD Century/Hour */
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#define M41ST84_REG_DAY 4 /* 01-07 -- BCD Day */
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#define M41ST84_REG_DATE 5 /* 01-31 -- BCD Date */
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#define M41ST84_REG_MONTH 6 /* 01-12 -- BCD Month */
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#define M41ST84_REG_YEAR 7 /* 00-99 -- BCD Year */
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#define M41ST84_REG_DATE_BYTES 8
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#define M41ST84_REG_CONTROL 8 /* Control Register */
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#define M41ST84_REG_WATCHDOG 9 /* Watchdog Register */
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#define M41ST84_REG_AL_MONTH 10 /* 01-12 -- BCD Month */
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#define M41ST84_REG_AL_DATE 11 /* 01-31 -- BCD Date */
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#define M41ST84_REG_AL_HOUR 12 /* 00-23 -- BCD Hour */
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#define M41ST84_REG_AL_MIN 13 /* 00-59 -- BCD Minutes */
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#define M41ST84_REG_AL_SEC 14 /* 00-59 -- BCD Seconds */
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#define M41ST84_REG_FLAGS 15 /* Flags Register */
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/* 16-18 reserved */
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#define M41ST84_REG_SQW 19 /* Square Wave Register */
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#define M41ST84_USER_RAM 20
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#define M41ST84_USER_RAM_SIZE 43
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#define M41ST84_SEC_MASK 0x7f
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#define M41ST84_MIN_MASK 0x7f
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#define M41ST84_HOUR_MASK 0x3f
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#define M41ST84_DAY_MASK 0x07
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#define M41ST84_DATE_MASK 0x3f
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#define M41ST84_MONTH_MASK 0x1f
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#define M41ST84_YEAR_MASK 0xff
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#define M41ST84_SEC_ST 0x80 /* clock stop bit */
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#define M41ST84_CONTROL_CALIB_MASK 0x1f
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#define M41ST84_CONTROL_S 0x20 /* sign bit */
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#define M41ST84_CONTROL_FT 0x40 /* Frequency test bit */
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#define M41ST84_CONTROL_OUT 0x80 /* Output level */
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#define M41ST84_WATCHDOG_RB_MASK 0x03 /* Watchdog resulotion bits */
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#define M41ST84_WATCHDOG_BMB_MASK 0x7c /* Watchdog multiplier bits */
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#define M41ST84_WATCHDOG_WDS 0x80 /* Watchdog steering bit */
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#define M41ST84_AL_MONTH_ABE 0x20 /* alarm in b-backup mode en */
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#define M41ST84_AL_MONTH_SQWE 0x40 /* square wave enable */
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#define M41ST84_AL_MONTH_AFE 0x80 /* alarm flage enable */
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#define M41ST84_FLAGS_BL 0x10 /* battery low flag */
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#define M41ST84_FLAGS_AF 0x40 /* alarm flag */
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#define M41ST84_FLAGS_WDF 0x80 /* watchdog flag */
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#endif /* _DEV_I2C_M41ST84REG_H_ */
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