148 lines
6.0 KiB
C
148 lines
6.0 KiB
C
/* $NetBSD: lemacvar.h,v 1.6 2001/06/13 10:46:03 wiz Exp $ */
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/*
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* Copyright (c) 1997 Matt Thomas <matt@3am-software.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _LEMAC_VAR_H
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#define _LEMAC_VAR_H
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#include "rnd.h"
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#if NRND > 0
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#include <sys/rnd.h>
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#endif
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/*
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* Ethernet status, per interface.
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*/
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typedef struct {
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struct device sc_dv;
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void *sc_ih;
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void *sc_ats;
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struct ethercom sc_ec;
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struct ifmedia sc_ifmedia;
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bus_space_tag_t sc_iot;
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bus_space_tag_t sc_memt;
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bus_space_handle_t sc_ioh;
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bus_space_handle_t sc_memh;
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unsigned sc_flags; /* */
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#define LEMAC_PIO_MODE 0x0000U
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#define LEMAC_2K_MODE 0x0001U
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#define LEMAC_WAS_32K_MODE 0x0002U
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#define LEMAC_WAS_64K_MODE 0x0003U
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#define LEMAC_MODE_MASK 0x0003U
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#define LEMAC_ALLMULTI 0x0010U
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#define LEMAC_ALIVE 0x0020U
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#define LEMAC_LINKUP 0x0040U
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unsigned sc_lastpage; /* last 2K page */
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unsigned sc_txctl; /* Transmit Control Byte */
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unsigned sc_ctlmode; /* media ctl bits */
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struct {
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u_int8_t csr_cs;
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u_int8_t csr_tqc;
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u_int8_t csr_fmq;
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} sc_csr;
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unsigned sc_laststatus; /* last read of LEMAC_REG_CS */
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u_int16_t sc_mctbl[LEMAC_MCTBL_SIZE/sizeof(u_int16_t)];
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/* local copy of multicast table */
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struct {
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unsigned cntr_txnospc; /* total # of no trnasmit memory */
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unsigned cntr_txfull; /* total # of tranmitter full */
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unsigned cntr_tne_intrs; /* total # of tranmit done intrs */
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unsigned cntr_rne_intrs; /* total # of receive done intrs */
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unsigned cntr_txd_intrs; /* total # of tranmit error intrs */
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unsigned cntr_rxd_intrs; /* total # of receive error intrs */
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} sc_cntrs;
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/*
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* We rely on sc_enaddr being aligned on (at least) a 16 bit boundary
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*/
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unsigned char sc_enaddr[ETHER_ADDR_LEN]; /* current Ethernet address */
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char sc_prodname[LEMAC_EEP_PRDNMSZ+1]; /* product name DE20x-xx */
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u_int8_t sc_eeprom[LEMAC_EEP_SIZE]; /* local copy eeprom */
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#if NRND > 0
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rndsource_element_t rnd_source;
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#endif
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} lemac_softc_t;
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#define sc_if sc_ec.ec_if
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#define LEMAC_IFP_TO_SOFTC(ifp) ((lemac_softc_t *)((ifp)->if_softc))
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#define LEMAC_USE_PIO_MODE(sc) (((sc->sc_flags & LEMAC_MODE_MASK) == LEMAC_PIO_MODE) || (sc->sc_if.if_flags & IFF_LINK0))
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#define LEMAC_OUTB(sc, o, v) bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (o), (v))
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#define LEMAC_OUTSB(sc, o, l, p) bus_space_write_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
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#define LEMAC_INB(sc, o) bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (o))
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#define LEMAC_INSB(sc, o, l, p) bus_space_read_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
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#define LEMAC_PUTBUF8(sc, o, l, p) bus_space_write_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
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#define LEMAC_PUTBUF16(sc, o, l, p) bus_space_write_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
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#define LEMAC_PUTBUF32(sc, o, l, p) bus_space_write_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
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#define LEMAC_PUT8(sc, o, v) bus_space_write_1((sc)->sc_memt, (sc)->sc_memh, (o), (v))
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#define LEMAC_PUT16(sc, o, v) bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (o), (v))
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#define LEMAC_PUT32(sc, o, v) bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (o), (v))
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#define LEMAC_GETBUF8(sc, o, l, p) bus_space_read_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
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#define LEMAC_GETBUF16(sc, o, l, p) bus_space_read_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
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#define LEMAC_GETBUF32(sc, o, l, p) bus_space_read_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
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#define LEMAC_GET8(sc, o) bus_space_read_1((sc)->sc_memt, (sc)->sc_memh, (o))
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#define LEMAC_GET16(sc, o) bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (o))
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#define LEMAC_GET32(sc, o) bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, (o))
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#define LEMAC_INTR_ENABLE(sc) \
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LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) | LEMAC_IC_ALL)
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#define LEMAC_INTR_DISABLE(sc) \
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LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) & ~LEMAC_IC_ALL)
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#define LEMAC_IS_64K_MODE(mbase) (((mbase) >= 0x0A) && ((mbase) <= 0x0F))
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#define LEMAC_IS_32K_MODE(mbase) (((mbase) >= 0x14) && ((mbase) <= 0x1F))
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#define LEMAC_IS_2K_MODE(mbase) ( (mbase) >= 0x40)
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#define LEMAC_DECODEIRQ(i) ((0xFBA5 >> ((i) >> 3)) & 0x0F)
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#define LEMAC_ADDREQUAL(a1, a2) \
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(((u_int16_t *)a1)[0] == ((u_int16_t *)a2)[0] \
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&& ((u_int16_t *)a1)[1] == ((u_int16_t *)a2)[1] \
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&& ((u_int16_t *)a1)[2] == ((u_int16_t *)a2)[2])
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#define LEMAC_ADDRBRDCST(a1) \
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(((u_int16_t *)a1)[0] == 0xFFFFU \
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&& ((u_int16_t *)a1)[1] == 0xFFFFU \
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&& ((u_int16_t *)a1)[2] == 0xFFFFU)
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extern void lemac_ifattach(lemac_softc_t *sc);
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extern void lemac_info_get(const bus_space_tag_t iot,
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const bus_space_handle_t ioh,
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bus_addr_t *maddr_p,
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bus_size_t *msize_p,
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int *irq_p);
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extern int lemac_port_check(const bus_space_tag_t iot,
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const bus_space_handle_t ioh);
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extern int lemac_intr(void *arg);
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extern void lemac_shutdown(void *arg);
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#endif /* _LEMACVAR_H */
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