684 lines
18 KiB
C
684 lines
18 KiB
C
/* $NetBSD: isadma_machdep.c,v 1.2 1997/11/27 10:19:39 sakamoto Exp $ */
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#define ISA_DMA_STATS
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/*-
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* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1993, 1994, 1996, 1997 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)isa.c 7.2 (Berkeley) 5/13/91
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#define _BEBOX_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/pio.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <bebox/isa/isa_machdep.h>
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#include <bebox/isa/icu.h>
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#include <vm/vm.h>
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/*
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* ISA can DMA to 0-4G.
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*/
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#define ISA_DMA_BOUNCE_THRESHOLD 0xffffffff
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extern vm_offset_t avail_end;
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int _isa_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int,
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bus_size_t, bus_size_t, int, bus_dmamap_t *));
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void _isa_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
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int _isa_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int));
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int _isa_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
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struct mbuf *, int));
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int _isa_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int));
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int _isa_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int));
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void _isa_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
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void _isa_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
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bus_dmasync_op_t));
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int _isa_bus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t,
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bus_size_t, bus_dma_segment_t *, int, int *, int));
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void _isa_bus_dmamem_free __P((bus_dma_tag_t,
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bus_dma_segment_t *, int));
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int _isa_bus_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *,
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int, size_t, caddr_t *, int));
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void _isa_bus_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t));
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int _isa_bus_dmamem_mmap __P((bus_dma_tag_t, bus_dma_segment_t *,
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int, int, int, int));
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int _isa_dma_check_buffer __P((void *, bus_size_t, int, bus_size_t,
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struct proc *));
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int _isa_dma_alloc_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t,
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bus_size_t, int));
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void _isa_dma_free_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t));
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/*
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* Entry points for ISA DMA. These are mostly wrappers around
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* the generic functions that understand how to deal with bounce
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* buffers, if necessary.
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*/
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struct bebox_bus_dma_tag isa_bus_dma_tag = {
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NULL, /* _cookie */
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_isa_bus_dmamap_create,
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_isa_bus_dmamap_destroy,
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_isa_bus_dmamap_load,
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_isa_bus_dmamap_load_mbuf,
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_isa_bus_dmamap_load_uio,
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_isa_bus_dmamap_load_raw,
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_isa_bus_dmamap_unload,
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_isa_bus_dmamap_sync,
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_isa_bus_dmamem_alloc,
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_isa_bus_dmamem_free,
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_isa_bus_dmamem_map,
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_isa_bus_dmamem_unmap,
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_isa_bus_dmamem_mmap,
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};
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/**********************************************************************
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* bus.h dma interface entry points
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**********************************************************************/
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#ifdef ISA_DMA_STATS
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#define STAT_INCR(v) (v)++
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#define STAT_DECR(v) do { \
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if ((v) == 0) \
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printf("%s:%d -- Already 0!\n", __FILE__, __LINE__); \
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else \
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(v)--; \
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} while (0)
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u_long isa_dma_stats_loads;
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u_long isa_dma_stats_bounces;
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u_long isa_dma_stats_nbouncebufs;
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#else
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#define STAT_INCR(v)
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#define STAT_DECR(v)
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#endif
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/*
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* Create an ISA DMA map.
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*/
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int
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_isa_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
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bus_dma_tag_t t;
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bus_size_t size;
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int nsegments;
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bus_size_t maxsegsz;
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bus_size_t boundary;
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int flags;
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bus_dmamap_t *dmamp;
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{
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struct bebox_isa_dma_cookie *cookie;
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bus_dmamap_t map;
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int error, cookieflags;
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void *cookiestore;
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size_t cookiesize;
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/* Call common function to create the basic map. */
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error = _bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
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flags, dmamp);
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if (error)
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return (error);
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map = *dmamp;
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map->_dm_cookie = NULL;
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cookiesize = sizeof(struct bebox_isa_dma_cookie);
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/*
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* ISA only has 24-bits of address space. This means
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* we can't DMA to pages over 16M. In order to DMA to
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* arbitrary buffers, we use "bounce buffers" - pages
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* in memory below the 16M boundary. On DMA reads,
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* DMA happens to the bounce buffers, and is copied into
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* the caller's buffer. On writes, data is copied into
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* but bounce buffer, and the DMA happens from those
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* pages. To software using the DMA mapping interface,
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* this looks simply like a data cache.
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*
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* If we have more than 16M of RAM in the system, we may
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* need bounce buffers. We check and remember that here.
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*
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* There are exceptions, however. VLB devices can do
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* 32-bit DMA, and indicate that here.
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*
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* ...or, there is an opposite case. The most segments
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* a transfer will require is (maxxfer / NBPG) + 1. If
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* the caller can't handle that many segments (e.g. the
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* ISA DMA controller), we may have to bounce it as well.
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*/
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cookieflags = 0;
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if ((avail_end > ISA_DMA_BOUNCE_THRESHOLD &&
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(flags & ISABUS_DMA_32BIT) == 0) ||
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((map->_dm_size / NBPG) + 1) > map->_dm_segcnt) {
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cookieflags |= ID_MIGHT_NEED_BOUNCE;
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cookiesize += (sizeof(bus_dma_segment_t) * map->_dm_segcnt);
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}
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/*
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* Allocate our cookie.
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*/
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if ((cookiestore = malloc(cookiesize, M_DEVBUF,
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(flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
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error = ENOMEM;
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goto out;
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}
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bzero(cookiestore, cookiesize);
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cookie = (struct bebox_isa_dma_cookie *)cookiestore;
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cookie->id_flags = cookieflags;
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map->_dm_cookie = cookie;
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if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
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/*
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* Allocate the bounce pages now if the caller
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* wishes us to do so.
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*/
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if ((flags & BUS_DMA_ALLOCNOW) == 0)
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goto out;
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error = _isa_dma_alloc_bouncebuf(t, map, size, flags);
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}
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out:
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if (error) {
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if (map->_dm_cookie != NULL)
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free(map->_dm_cookie, M_DEVBUF);
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_bus_dmamap_destroy(t, map);
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}
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return (error);
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}
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/*
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* Destroy an ISA DMA map.
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*/
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void
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_isa_bus_dmamap_destroy(t, map)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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{
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struct bebox_isa_dma_cookie *cookie = map->_dm_cookie;
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/*
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* Free any bounce pages this map might hold.
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*/
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if (cookie->id_flags & ID_HAS_BOUNCE)
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_isa_dma_free_bouncebuf(t, map);
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free(cookie, M_DEVBUF);
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_bus_dmamap_destroy(t, map);
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}
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/*
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* Load an ISA DMA map with a linear buffer.
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*/
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int
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_isa_bus_dmamap_load(t, map, buf, buflen, p, flags)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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void *buf;
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bus_size_t buflen;
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struct proc *p;
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int flags;
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{
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struct bebox_isa_dma_cookie *cookie = map->_dm_cookie;
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int error;
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STAT_INCR(isa_dma_stats_loads);
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/*
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* Check to see if we might need to bounce the transfer.
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*/
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if (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) {
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/*
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* Check if all pages are below the bounce
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* threshold. If they are, don't bother bouncing.
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*/
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if (_isa_dma_check_buffer(buf, buflen,
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map->_dm_segcnt, map->_dm_boundary, p) == 0)
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return (_bus_dmamap_load(t, map, buf, buflen,
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p, flags));
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STAT_INCR(isa_dma_stats_bounces);
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/*
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* Allocate bounce pages, if necessary.
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*/
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if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
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error = _isa_dma_alloc_bouncebuf(t, map, buflen,
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flags);
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if (error)
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return (error);
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}
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/*
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* Cache a pointer to the caller's buffer and
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* load the DMA map with the bounce buffer.
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*/
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cookie->id_origbuf = buf;
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cookie->id_origbuflen = buflen;
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error = _bus_dmamap_load(t, map, cookie->id_bouncebuf,
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buflen, p, flags);
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if (error) {
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/*
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* Free the bounce pages, unless our resources
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* are reserved for our exclusive use.
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*/
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if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
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_isa_dma_free_bouncebuf(t, map);
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}
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/* ...so _isa_bus_dmamap_sync() knows we're bouncing */
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cookie->id_flags |= ID_IS_BOUNCING;
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} else {
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/*
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* Just use the generic load function.
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*/
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error = _bus_dmamap_load(t, map, buf, buflen, p, flags);
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}
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return (error);
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}
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/*
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* Like _isa_bus_dmamap_load(), but for mbufs.
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*/
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int
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_isa_bus_dmamap_load_mbuf(t, map, m, flags)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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struct mbuf *m;
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int flags;
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{
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panic("_isa_bus_dmamap_load_mbuf: not implemented");
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}
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/*
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* Like _isa_bus_dmamap_load(), but for uios.
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*/
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int
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_isa_bus_dmamap_load_uio(t, map, uio, flags)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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struct uio *uio;
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int flags;
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{
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panic("_isa_bus_dmamap_load_uio: not implemented");
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}
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/*
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* Like _isa_bus_dmamap_load(), but for raw memory allocated with
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* bus_dmamem_alloc().
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*/
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int
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_isa_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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bus_dma_segment_t *segs;
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int nsegs;
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bus_size_t size;
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int flags;
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{
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panic("_isa_bus_dmamap_load_raw: not implemented");
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}
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/*
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* Unload an ISA DMA map.
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*/
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void
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_isa_bus_dmamap_unload(t, map)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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{
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struct bebox_isa_dma_cookie *cookie = map->_dm_cookie;
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/*
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* If we have bounce pages, free them, unless they're
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* reserved for our exclusive use.
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*/
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if ((cookie->id_flags & ID_HAS_BOUNCE) &&
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(map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
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_isa_dma_free_bouncebuf(t, map);
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cookie->id_flags &= ~ID_IS_BOUNCING;
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/*
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* Do the generic bits of the unload.
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*/
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_bus_dmamap_unload(t, map);
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}
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/*
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* Synchronize an ISA DMA map.
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*/
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void
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_isa_bus_dmamap_sync(t, map, op)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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bus_dmasync_op_t op;
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{
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struct bebox_isa_dma_cookie *cookie = map->_dm_cookie;
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switch (op) {
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case BUS_DMASYNC_PREREAD:
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/*
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* Nothing to do for pre-read.
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*/
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break;
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case BUS_DMASYNC_PREWRITE:
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/*
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* If we're bouncing this transfer, copy the
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* caller's buffer to the bounce buffer.
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*/
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if (cookie->id_flags & ID_IS_BOUNCING)
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bcopy(cookie->id_origbuf, cookie->id_bouncebuf,
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cookie->id_origbuflen);
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break;
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case BUS_DMASYNC_POSTREAD:
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/*
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* If we're bouncing this transfer, copy the
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* bounce buffer to the caller's buffer.
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*/
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if (cookie->id_flags & ID_IS_BOUNCING)
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bcopy(cookie->id_bouncebuf, cookie->id_origbuf,
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cookie->id_origbuflen);
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break;
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case BUS_DMASYNC_POSTWRITE:
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/*
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* Nothing to do for post-write.
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*/
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break;
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}
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#if 0
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/* This is a noop anyhow, so why bother calling it? */
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_bus_dmamap_sync(t, map, op);
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#endif
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}
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/*
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* Allocate memory safe for ISA DMA.
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*/
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int
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_isa_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
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bus_dma_tag_t t;
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bus_size_t size, alignment, boundary;
|
|
bus_dma_segment_t *segs;
|
|
int nsegs;
|
|
int *rsegs;
|
|
int flags;
|
|
{
|
|
vm_offset_t high;
|
|
|
|
if (avail_end > ISA_DMA_BOUNCE_THRESHOLD)
|
|
high = trunc_page(ISA_DMA_BOUNCE_THRESHOLD);
|
|
else
|
|
high = trunc_page(avail_end);
|
|
|
|
return (_bus_dmamem_alloc_range(t, size, alignment, boundary,
|
|
segs, nsegs, rsegs, flags, 0, high));
|
|
}
|
|
|
|
/*
|
|
* Free memory safe for ISA DMA.
|
|
*/
|
|
void
|
|
_isa_bus_dmamem_free(t, segs, nsegs)
|
|
bus_dma_tag_t t;
|
|
bus_dma_segment_t *segs;
|
|
int nsegs;
|
|
{
|
|
|
|
_bus_dmamem_free(t, segs, nsegs);
|
|
}
|
|
|
|
/*
|
|
* Map ISA DMA-safe memory into kernel virtual address space.
|
|
*/
|
|
int
|
|
_isa_bus_dmamem_map(t, segs, nsegs, size, kvap, flags)
|
|
bus_dma_tag_t t;
|
|
bus_dma_segment_t *segs;
|
|
int nsegs;
|
|
size_t size;
|
|
caddr_t *kvap;
|
|
int flags;
|
|
{
|
|
|
|
return (_bus_dmamem_map(t, segs, nsegs, size, kvap, flags));
|
|
}
|
|
|
|
/*
|
|
* Unmap ISA DMA-safe memory from kernel virtual address space.
|
|
*/
|
|
void
|
|
_isa_bus_dmamem_unmap(t, kva, size)
|
|
bus_dma_tag_t t;
|
|
caddr_t kva;
|
|
size_t size;
|
|
{
|
|
|
|
_bus_dmamem_unmap(t, kva, size);
|
|
}
|
|
|
|
/*
|
|
* mmap(2) ISA DMA-safe memory.
|
|
*/
|
|
int
|
|
_isa_bus_dmamem_mmap(t, segs, nsegs, off, prot, flags)
|
|
bus_dma_tag_t t;
|
|
bus_dma_segment_t *segs;
|
|
int nsegs, off, prot, flags;
|
|
{
|
|
|
|
return (_bus_dmamem_mmap(t, segs, nsegs, off, prot, flags));
|
|
}
|
|
|
|
/**********************************************************************
|
|
* ISA DMA utility functions
|
|
**********************************************************************/
|
|
|
|
/*
|
|
* Return 0 if all pages in the passed buffer lie within the DMA'able
|
|
* range RAM.
|
|
*/
|
|
int
|
|
_isa_dma_check_buffer(buf, buflen, segcnt, boundary, p)
|
|
void *buf;
|
|
bus_size_t buflen;
|
|
int segcnt;
|
|
bus_size_t boundary;
|
|
struct proc *p;
|
|
{
|
|
vm_offset_t vaddr = (vm_offset_t)buf;
|
|
vm_offset_t pa, lastpa, endva;
|
|
u_long pagemask = ~(boundary - 1);
|
|
pmap_t pmap;
|
|
int nsegs;
|
|
|
|
endva = round_page(vaddr + buflen);
|
|
|
|
nsegs = 1;
|
|
lastpa = 0;
|
|
|
|
if (p != NULL)
|
|
pmap = p->p_vmspace->vm_map.pmap;
|
|
else
|
|
pmap = pmap_kernel();
|
|
|
|
for (; vaddr < endva; vaddr += NBPG) {
|
|
/*
|
|
* Get physical address for this segment.
|
|
*/
|
|
pa = pmap_extract(pmap, (vm_offset_t)vaddr);
|
|
pa = trunc_page(pa);
|
|
|
|
/*
|
|
* Is it below the DMA'able threshold?
|
|
*/
|
|
if (pa > ISA_DMA_BOUNCE_THRESHOLD)
|
|
return (EINVAL);
|
|
|
|
if (lastpa) {
|
|
/*
|
|
* Check excessive segment count.
|
|
*/
|
|
if (lastpa + NBPG != pa) {
|
|
if (++nsegs > segcnt)
|
|
return (EFBIG);
|
|
}
|
|
|
|
/*
|
|
* Check boundary restriction.
|
|
*/
|
|
if (boundary) {
|
|
if ((lastpa ^ pa) & pagemask)
|
|
return (EINVAL);
|
|
}
|
|
}
|
|
lastpa = pa;
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
_isa_dma_alloc_bouncebuf(t, map, size, flags)
|
|
bus_dma_tag_t t;
|
|
bus_dmamap_t map;
|
|
bus_size_t size;
|
|
int flags;
|
|
{
|
|
struct bebox_isa_dma_cookie *cookie = map->_dm_cookie;
|
|
int error = 0;
|
|
|
|
cookie->id_bouncebuflen = round_page(size);
|
|
error = _isa_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
|
|
NBPG, map->_dm_boundary, cookie->id_bouncesegs,
|
|
map->_dm_segcnt, &cookie->id_nbouncesegs, flags);
|
|
if (error)
|
|
goto out;
|
|
error = _isa_bus_dmamem_map(t, cookie->id_bouncesegs,
|
|
cookie->id_nbouncesegs, cookie->id_bouncebuflen,
|
|
(caddr_t *)&cookie->id_bouncebuf, flags);
|
|
|
|
out:
|
|
if (error) {
|
|
_isa_bus_dmamem_free(t, cookie->id_bouncesegs,
|
|
cookie->id_nbouncesegs);
|
|
cookie->id_bouncebuflen = 0;
|
|
cookie->id_nbouncesegs = 0;
|
|
} else {
|
|
cookie->id_flags |= ID_HAS_BOUNCE;
|
|
STAT_INCR(isa_dma_stats_nbouncebufs);
|
|
}
|
|
|
|
return (error);
|
|
}
|
|
|
|
void
|
|
_isa_dma_free_bouncebuf(t, map)
|
|
bus_dma_tag_t t;
|
|
bus_dmamap_t map;
|
|
{
|
|
struct bebox_isa_dma_cookie *cookie = map->_dm_cookie;
|
|
|
|
STAT_DECR(isa_dma_stats_nbouncebufs);
|
|
|
|
_isa_bus_dmamem_unmap(t, cookie->id_bouncebuf,
|
|
cookie->id_bouncebuflen);
|
|
_isa_bus_dmamem_free(t, cookie->id_bouncesegs,
|
|
cookie->id_nbouncesegs);
|
|
cookie->id_bouncebuflen = 0;
|
|
cookie->id_nbouncesegs = 0;
|
|
cookie->id_flags &= ~ID_HAS_BOUNCE;
|
|
}
|