285 lines
9.0 KiB
C
285 lines
9.0 KiB
C
/* $NetBSD: imx7_ioconfig.c,v 1.1 2016/05/17 06:44:46 ryo Exp $ */
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/*
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* Copyright (c) 2015 Ryo Shimizu <ryo@nerv.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: imx7_ioconfig.c,v 1.1 2016/05/17 06:44:46 ryo Exp $");
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#include "opt_evbarm_boardtype.h"
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/param.h>
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#include <arm/imx/imx7reg.h>
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#include <arm/imx/imx7var.h>
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#include <arm/imx/imx7_iomuxreg.h>
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#include <arm/imx/imxgpioreg.h>
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#include <arm/imx/imxgpiovar.h>
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#include <evbarm/imx7/platform.h>
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void imx7_setup_iomux(void);
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void imx7_setup_gpio(void);
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void imx7board_device_register(device_t, void *);
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/*
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* define adhoc boardtype-id for board specific initialization. (#if ... #endif)
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* EVBARM_BOARDTYPE is defined in kernel config.
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*/
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#define armadillo_iot_g3 1
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#define new_board_you_got 999
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/* often-used mux/pads */
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#define ALT0 IOMUX_CONFIG_ALT0
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#define ALT1 IOMUX_CONFIG_ALT1
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#define ALT2 IOMUX_CONFIG_ALT2
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#define ALT3 IOMUX_CONFIG_ALT3
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#define ALT4 IOMUX_CONFIG_ALT4
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#define ALT5 IOMUX_CONFIG_ALT5
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#define ALT6 IOMUX_CONFIG_ALT6
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#define ALT7 IOMUX_CONFIG_ALT7
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#define DAISY0 INPUT_DAISY_0
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#define DAISY1 INPUT_DAISY_1
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#define DAISY2 INPUT_DAISY_2
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#define DAISY3 INPUT_DAISY_3
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#define DAISY4 INPUT_DAISY_4
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#define DAISY5 INPUT_DAISY_5
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#define DAISY6 INPUT_DAISY_6
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#define DAISY7 INPUT_DAISY_7
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#define PAD_USDHC (PAD_CTL_PS_47K_PU \
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|PAD_CTL_PULL_ENABLE \
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|PAD_CTL_HYSTERESIS_ENABLE \
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|PAD_CTL_SRE_FAST \
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|PAD_CTL_DSE_X2) /* 0x59 */
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#define PAD_USDHC_CLK (PAD_CTL_PS_100K_PD \
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|PAD_CTL_PULL_ENABLE \
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|PAD_CTL_HYSTERESIS_ENABLE \
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|PAD_CTL_SRE_FAST \
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|PAD_CTL_DSE_X2) /* 0x19 */
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#define PAD_USDHC2 (PAD_CTL_PS_100K_PD \
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|PAD_CTL_PULL_DISABLE \
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|PAD_CTL_HYSTERESIS_DISABLE \
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|PAD_CTL_SRE_SLOW \
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|PAD_CTL_DSE_X4) /* 0x06 */
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#define PAD_ENET_X1 (PAD_CTL_PS_100K_PD \
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|PAD_CTL_PULL_DISABLE \
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|PAD_CTL_HYSTERESIS_DISABLE \
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|PAD_CTL_SRE_FAST \
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|PAD_CTL_DSE_X1) /* 0x00 */
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#define PAD_ENET_X2 (PAD_CTL_PS_100K_PD \
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|PAD_CTL_PULL_DISABLE \
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|PAD_CTL_HYSTERESIS_DISABLE \
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|PAD_CTL_SRE_FAST \
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|PAD_CTL_DSE_X2) /* 0x01 */
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#define PAD_ENET_X6 (PAD_CTL_PS_100K_PD \
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|PAD_CTL_PULL_DISABLE \
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|PAD_CTL_HYSTERESIS_DISABLE \
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|PAD_CTL_SRE_FAST \
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|PAD_CTL_DSE_X6) /* 0x03 */
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static const struct iomux_conf iomux_data[] = {
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#if (EVBARM_BOARDTYPE == armadillo_iot_g3)
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/* ENET2 */
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IOMUXCONF_MUX_PAD(GPIO1_IO15, ALT2, PAD_ENET_X6),
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IOMUXCONF_MUX_PAD(GPIO1_IO14, ALT2, PAD_ENET_X6),
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IOMUXCONF_INPUT(ENET2_MDIO, 0),
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IOMUXCONF_MUX_PAD(EPDC_GDSP, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_GDRL, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_SDCE2, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_SDCE3, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_GDCLK, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_GDOE, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_SDCE1, ALT2, PAD_ENET_X2),
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IOMUXCONF_INPUT(ENET2_RX_CLK, 0),
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IOMUXCONF_MUX_PAD(EPDC_SDCE0, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_SDCLK, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_SDLE, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_SDOE, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_SDSHR, ALT2, PAD_ENET_X2),
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IOMUXCONF_MUX_PAD(EPDC_BDR1, ALT5, PAD_ENET_X1),
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/* uSDHC1 */
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IOMUXCONF_MUX_PAD(SD1_CMD, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD1_CLK, ALT0, PAD_USDHC_CLK),
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IOMUXCONF_MUX_PAD(SD1_DATA0, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD1_DATA1, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD1_DATA2, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD1_DATA3, ALT0, PAD_USDHC),
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IOMUXCONF_MUX( SD1_CD_B, ALT5),
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IOMUXCONF_MUX( SD1_RESET_B, ALT5),
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/* uSDHC2 */
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IOMUXCONF_MUX_PAD(SD2_CMD, ALT0, PAD_USDHC2),
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IOMUXCONF_MUX_PAD(SD2_CLK, ALT0, PAD_USDHC2),
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IOMUXCONF_MUX_PAD(SD2_DATA0, ALT0, PAD_USDHC2),
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IOMUXCONF_MUX_PAD(SD2_DATA1, ALT0, PAD_USDHC2),
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IOMUXCONF_MUX_PAD(SD2_DATA2, ALT0, PAD_USDHC2),
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IOMUXCONF_MUX_PAD(SD2_DATA3, ALT0, PAD_USDHC2),
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IOMUXCONF_MUX_PAD(SD2_DATA3, ALT0, PAD_USDHC2),
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IOMUXCONF_MUX_PAD(SD2_WP, ALT5, PAD_USDHC),
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/* uSDHC3 */
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IOMUXCONF_MUX_PAD(SD3_CMD, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD3_CLK, ALT0, PAD_USDHC_CLK),
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IOMUXCONF_MUX_PAD(SD3_DATA0, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD3_DATA1, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD3_DATA2, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD3_DATA3, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD3_DATA4, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD3_DATA5, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD3_DATA6, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD3_DATA7, ALT0, PAD_USDHC),
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IOMUXCONF_MUX_PAD(SD3_RESET_B, ALT0, PAD_USDHC),
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/* USBHUB */
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IOMUXCONF_MUX_PAD(EPDC_DATA13, ALT5, 0),
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IOMUXCONF_MUX_PAD(EPDC_DATA14, ALT5,
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PAD_CTL_PS_100K_PD | PAD_CTL_PULL_DISABLE |
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PAD_CTL_HYSTERESIS_DISABLE | PAD_CTL_SRE_SLOW | PAD_CTL_DSE_X1),
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IOMUXCONF_MUX_PAD(EPDC_DATA15, ALT5, 0),
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#endif
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/* end of table */
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{ .muxaddr = 0, .padaddr = 0, .inputaddr = 0 }
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};
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#define AIPS_WRITE(addr, val) \
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(*(volatile uint32_t *)(KERNEL_IO_IOREG_VBASE + (addr)) = (val))
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#define AIPS_READ(addr) \
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(*(volatile uint32_t *)(KERNEL_IO_IOREG_VBASE + (addr)))
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#define IOMUX_WRITE(regaddr, val) \
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AIPS_WRITE((regaddr) - IMX7_AIPS_BASE, val)
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#define IOMUX_READ(regaddr) \
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AIPS_READ((regaddr) - IMX7_AIPS_BASE)
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/* GPIO manipulation */
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#define GPIO_ADDR(unit) \
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(AIPS1_GPIO1_BASE + 0x10000 * ((unit) - 1))
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#define GPIO_SETDIR(unit, pin, dir) \
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AIPS_WRITE(GPIO_ADDR(unit) + GPIO_DIR, \
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(AIPS_READ(GPIO_ADDR(unit) + GPIO_DIR) & ~(1 << (pin))) | \
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((dir) << (pin)))
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#define GPIO_WRITE(unit, pin, data) \
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AIPS_WRITE(GPIO_ADDR(unit) + GPIO_DR, \
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(AIPS_READ(GPIO_ADDR(unit) + GPIO_DR) & ~(1 << (pin))) | \
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((data) << (pin)))
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/* GPIO set dir & write data */
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#define GPIO_DIROUT_WRITE(unit, pin, data) \
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do { \
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GPIO_SETDIR(unit, pin, GPIO_DIR_OUT); \
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GPIO_WRITE(unit, pin, data); \
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} while (0 /* CONSTCOND */)
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void
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imx7_setup_iomux(void)
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{
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int i;
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uint32_t reg, v;
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for (i = 0; (iomux_data[i].muxaddr != 0) &&
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(iomux_data[i].padaddr != 0) && (iomux_data[i].inputaddr != 0);
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i++) {
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if ((reg = iomux_data[i].muxaddr) != 0)
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IOMUX_WRITE(reg, iomux_data[i].mux);
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if ((reg = iomux_data[i].padaddr) != 0)
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IOMUX_WRITE(reg, iomux_data[i].pad);
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if ((reg = iomux_data[i].inputaddr) != 0)
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IOMUX_WRITE(reg, iomux_data[i].input);
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}
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/*
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* IOMUX GPR settings
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*/
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/* ENET */
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v = IOMUX_READ(IOMUXC_GPR_GPR1);
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v &= ~IOMUXC_GPR_GPR1_ENET2_CLK_DIR;
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v &= ~IOMUXC_GPR_GPR1_ENET1_CLK_DIR;
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v &= ~IOMUXC_GPR_GPR1_ENET2_TX_CLK_SEL;
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v &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_SEL;
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IOMUX_WRITE(IOMUXC_GPR_GPR1, v);
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}
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void
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imx7_setup_gpio(void)
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{
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#if (EVBARM_BOARDTYPE == armadillo_iot_g3)
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/* USB OTG1 VBUS */
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GPIO_DIROUT_WRITE(4, 15, 1);
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/* UHUB USB3503 */
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GPIO_DIROUT_WRITE(2, 14, 0);
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GPIO_DIROUT_WRITE(2, 15, 1);
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GPIO_DIROUT_WRITE(2, 13, 0);
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#endif
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}
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void
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imx7board_device_register(device_t self, void *aux)
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{
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prop_dictionary_t dict = device_properties(self);
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imx7_device_register(self, aux);
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if (device_is_a(self, "sdhc") &&
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device_is_a(device_parent(self), "axi")) {
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#if (EVBARM_BOARDTYPE == armadillo_iot_g3)
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prop_dictionary_set_cstring(dict, "usdhc1-cd-gpio", "!5,0");
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prop_dictionary_set_cstring(dict, "usdhc1-wp-gpio", "!5,1");
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#endif
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}
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if (device_is_a(self, "enet") &&
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device_is_a(device_parent(self), "axi")) {
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/*
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* OCOTP[MAC_ADDR0]: 0123
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* OCOTP[MAC_ADDR1]: 4567
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* OCOTP[MAC_ADDR2]: 89ab
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*
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* default layout, ENET1: 6:7:0:1:2:3
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* ENET2: 8:9:a:b:4:5
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*/
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#if (EVBARM_BOARDTYPE == armadillo_iot_g3)
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/*
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* XXX: armadillo_iot_g3 has illegal layout of macaddr in OCOTP
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*/
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prop_dictionary_set_cstring(dict, "enet2-ocotp-mac", "0189ab");
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#endif
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}
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if (device_is_a(self, "imxusbc") &&
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device_is_a(device_parent(self), "axi")) {
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#if (EVBARM_BOARDTYPE == armadillo_iot_g3)
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prop_dictionary_set_cstring(dict, "otg1-iftype", "UTMI_WIDE");
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#endif
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}
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}
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