61 lines
2.5 KiB
C
61 lines
2.5 KiB
C
/* $NetBSD: epclkreg.h,v 1.3 2009/10/23 00:39:30 snj Exp $ */
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/*
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* Copyright (c) 2004 Jesse Off
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA AND CONTRIBUTORS ``AS IS''
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS
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* HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _EPCLKREG_H_
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#define _EPCLKREG_H_
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/* Timer1 16-bit timer (Free running/Load based) */
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#define EP93XX_TIMERS_Timer1Load 0x00000000UL
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#define TimerLoad_MASK 0x0000ffffUL
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#define EP93XX_TIMERS_Timer1Value 0x00000004UL
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#define TimerValue_MASK 0x0000ffffUL
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#define EP93XX_TIMERS_Timer1Control 0x00000008UL
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#define TimerControl_ENABLE (1<<7)
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#define TimerControl_MODE (1<<6)
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#define TimerControl_CLKSEL (1<<3)
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#define EP93XX_TIMERS_Timer1Clear 0x0000000cUL
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/* Timer2 16-bit timer (Free running/Load based) */
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#define EP93XX_TIMERS_Timer2Load 0x00000020UL
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#define EP93XX_TIMERS_Timer2Value 0x00000024UL
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#define EP93XX_TIMERS_Timer2Control 0x00000028UL
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#define EP93XX_TIMERS_Timer2Clear 0x0000002cUL
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/* Timer3 32-bit timer (Free running/Load based) */
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#define EP93XX_TIMERS_Timer3Load 0x00000080UL
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#define EP93XX_TIMERS_Timer3Value 0x00000084UL
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#define EP93XX_TIMERS_Timer3Control 0x00000088UL
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#define EP93XX_TIMERS_Timer3Clear 0x0000008cUL
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/* Timer4 40-bit timer (Free running) */
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#define EP93XX_TIMERS_Timer4Enable 0x00000064UL
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#define EP93XX_TIMERS_Timer4ValueHigh 0x00000064UL
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#define EP93XX_TIMERS_Timer4ValueLow 0x00000060UL
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#endif /* _EPCLKREG_H_ */
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