NetBSD/sys/arch/arm/allwinner/files.awin
bouyer bdf10c852a The UART in the allwiner SoCs is not full-compatible with the 16550, and
it's not a 16750 either. Like the 16750 it has the IIR_BUSY interrupt,
which is triggered when writing to LCR while the chip
can't accept it. But unlike the 16750, it has a specific register,
HALT, to allow writing to the LCR and divisor registers, and then
commit the changes.
Tested on an A20 SoC, changing the baud rate while keeping the
tty device open and incoming data.
2016-05-27 20:01:49 +00:00

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# $NetBSD: files.awin,v 1.36 2016/05/27 20:01:49 bouyer Exp $
#
# Configuration info for Allwinner ARM Peripherals
#
include "arch/arm/pic/files.pic"
include "arch/arm/cortex/files.cortex"
file arch/arm/arm32/arm32_boot.c
file arch/arm/arm32/arm32_kvminit.c
file arch/arm/arm32/arm32_reboot.c
file arch/arm/arm32/irq_dispatch.S
file arch/arm/allwinner/awin_board.c
file arch/arm/arm32/armv7_generic_space.c
file arch/arm/arm/bus_space_a4x.S
# Console parameters
defparam opt_allwinner.h CONADDR
defparam opt_allwinner.h CONSPEED
defparam opt_allwinner.h CONMODE
defparam opt_allwinner.h MEMSIZE
defparam opt_allwinner.h AWIN_WDT_DEFAULT_PERIOD
defflag opt_allwinner.h AWIN_CONSOLE_EARLY
defflag opt_allwinner.h AWINETH_COUNTERS
defflag opt_allwinner.h ALLWINNER_A10: CPU_CORTEXA8
defflag opt_allwinner.h ALLWINNER_A20: CPU_CORTEXA7
defflag opt_allwinner.h ALLWINNER_A31: CPU_CORTEXA7
defflag opt_allwinner.h ALLWINNER_A80: CPU_CORTEXA7
defflag opt_allwinner.h AWIN_GPIO_IGNORE_FW
defflag opt_allwinner.h AWIN_HDMI_DEBUG
defflag opt_allwinner.h AWIN_TCON_DEBUG
defflag opt_allwinner.h AWIN_DEBE_DEBUG
defflag opt_allwinner.h AWIN_DEBE_FWINIT
defparam opt_allwinner.h AWIN_DEBE_VIDEOMEM
# SoC I/O attach point
device awinio { [port=-1] } : bus_space_generic
attach awinio at mainbus with awin_io
file arch/arm/allwinner/awin_io.c awin_io
# A10 Interrupt Controller
device awinicu
attach awinicu at awinio with awin_icu
file arch/arm/allwinner/awin_icu.c awin_icu
# A10/A20 Watchdog
device awinwdt : sysmon_wdog
attach awinwdt at awinio with awin_wdt
file arch/arm/allwinner/awin_wdt.c awin_wdt | awin_io needs-flag
# A10/A20 RTC
device awinrtc
attach awinrtc at awinio with awin_rtc
file arch/arm/allwinner/awin_rtc.c awin_rtc
# A10 Timers
device awintmr
attach awintmr at awinio with awin_tmr
file arch/arm/allwinner/awin_tmr.c awin_tmr
# A20/A31 64-bit counter
device awincnt
attach awincnt at awinio with awin_cnt
file arch/arm/allwinner/awin_cnt.c awin_cnt
# A10/A20 UART
options COM_AWIN # for IIR_BUSY
attach com at awinio with awin_com
file arch/arm/allwinner/awin_com.c awin_com
# A10/A20 GPIO
device awingpio : gpiobus
attach awingpio at awinio with awin_gpio
file arch/arm/allwinner/awin_gpio.c awin_gpio | awin_io needs-flag
# A10/A20 DMA
device awindma
attach awindma at awinio with awin_dma
file arch/arm/allwinner/awin_dma.c awin_dma
file arch/arm/allwinner/awin_dma_a10.c awin_dma & (allwinner_a10 | allwinner_a20)
file arch/arm/allwinner/awin_dma_a31.c awin_dma & (allwinner_a31 | allwinner_a80)
# A10/A20 TWI (IIC)
device awiniic : i2cbus, i2cexec, mvi2c
attach awiniic at awinio with awin_twi
file arch/arm/allwinner/awin_twi.c awin_twi
# A31 P2WI
device awinp2wi : i2cbus, i2cexec
attach awinp2wi at awinio with awin_p2wi
file arch/arm/allwinner/awin_p2wi.c awin_p2wi
# A10/A20 NAND controller
device awinnand : nandbus
attach awinnand at awinio with awin_nand
file arch/arm/allwinner/awin_nand.c awin_nand
# A10/A20 Security System
device awincrypto : opencrypto
attach awincrypto at awinio with awin_crypto
file arch/arm/allwinner/awin_crypto.c awin_crypto
# A10/A20 EMAC
device awe { } : ether, ifnet, arp, mii
attach awe at awinio with awin_eth
file arch/arm/allwinner/awin_eth.c awin_eth
# A20 GMAC
attach awge at awinio with awin_gige
file arch/arm/allwinner/awin_gige.c awin_gige
# USB2 OTG Controller
attach motg at awinio with awin_otg
file arch/arm/allwinner/awin_otg.c awin_otg
# USB2 Host Controller (EHCI/OHCI)
device awinusb { }
attach awinusb at awinio with awin_usb
attach ohci at awinusb with ohci_awinusb
attach ehci at awinusb with ehci_awinusb
file arch/arm/allwinner/awin_usb.c awin_usb
# A10/A20 SD/MMC Controller (SD/MMC)
device awinmmc: sdmmcbus
attach awinmmc at awinio with awin_mmc
file arch/arm/allwinner/awin_mmc.c awin_mmc
# A10 WDC Controller (PATA)
attach wdc at awinio with awin_wdc
file arch/arm/allwinner/awin_wdc.c awin_wdc
# A20 AHCI Controller (SATA)
attach ahcisata at awinio with awin_ahcisata
file arch/arm/allwinner/awin_ahcisata.c awin_ahcisata
# A10/A20 Audio Codec (AC)
device awinac: audiobus, auconv, mulaw, aurateconv
attach awinac at awinio with awin_ac
file arch/arm/allwinner/awin_ac.c awin_ac
# A20/A31 HDMI
device awinhdmi: edid, videomode
attach awinhdmi at awinio with awin_hdmi
file arch/arm/allwinner/awin_hdmi.c awin_hdmi
# A20 TV Encoder / VGA output
device awintve: edid, videomode
attach awintve at awinio with awin_tve
file arch/arm/allwinner/awin_tve.c awin_tve
# A20/A31 HDMI audio (HDMIAUDIO)
device awinhdmiaudio: audiobus, auconv, mulaw, aurateconv, auvolconv
attach awinhdmiaudio at awinio with awin_hdmiaudio
file arch/arm/allwinner/awin_hdmiaudio.c awin_hdmiaudio
# A10/A20/A31 LCD/TV timing controller (TCON)
device awintcon
attach awintcon at awinio with awin_tcon
file arch/arm/allwinner/awin_tcon.c awin_tcon | awin_hdmi needs-flag
# A10/A20/A31 Display engine backend (DE-BE)
device awindebe { }
attach awindebe at awinio with awin_debe
file arch/arm/allwinner/awin_debe.c awin_debe | awin_hdmi
# A10/A20/A31 Mixer processor (MP)
device awinmp
attach awinmp at awinio with awin_mp
file arch/arm/allwinner/awin_mp.c awin_mp needs-flag
# Framebuffer
attach genfb at awindebe with awin_fb: edid
file arch/arm/allwinner/awin_fb.c awin_fb needs-flag
# A10/A20/A31 Consumer IR (CIR)
device awinir: irbus
attach awinir at awinio with awin_ir
file arch/arm/allwinner/awin_ir.c awin_ir
# A20 LRADC
device awinlradc
attach awinlradc at awinio with awin_lradc
file arch/arm/allwinner/awin_lradc.c awin_lradc