735 lines
16 KiB
C
735 lines
16 KiB
C
/* $NetBSD: xscale_pmc.c,v 1.13 2009/04/16 14:56:41 rmind Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Allen Briggs for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: xscale_pmc.c,v 1.13 2009/04/16 14:56:41 rmind Exp $");
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#include <sys/param.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/pmc.h>
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#include <sys/systm.h>
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#include <sys/types.h>
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#include <machine/pmc.h>
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#include <arm/xscale/xscalereg.h>
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#include <arm/xscale/xscalevar.h>
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extern int profsrc;
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struct xscale_pmc_state {
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uint32_t pmnc; /* performance monitor ctrl */
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uint32_t pmcr[3]; /* array of counter reset values */
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uint64_t pmcv[3]; /* array of counter values */
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uint64_t pmc_accv[3]; /* accumulated ctr values of children */
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};
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#define __PMC_CCNT_I (0)
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#define __PMC0_I (1)
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#define __PMC1_I (2)
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#define __PMC_CCNT (1 << __PMC_CCNT_I)
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#define __PMC0 (1 << __PMC0_I)
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#define __PMC1 (1 << __PMC1_I)
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#define __PMC_NCTRS 3
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uint32_t pmc_kernel_mask = 0;
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uint32_t pmc_kernel_bits = 0;
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uint32_t pmc_kernel_enabled = 0;
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uint32_t pmc_profiling_enabled = 0;
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uint32_t pmc_reset_vals[3] = {0x80000000, 0x80000000, 0x80000000};
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int pmc_usecount[3] = {0, 0, 0};
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static inline uint32_t
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xscale_pmnc_read(void)
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{
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uint32_t pmnc;
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__asm volatile("mrc p14, 0, %0, c0, c0, 0"
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: "=r" (pmnc));
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return pmnc;
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}
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static inline void
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xscale_pmnc_write(uint32_t val)
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{
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__asm volatile("mcr p14, 0, %0, c0, c0, 0"
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: : "r" (val));
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}
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int
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xscale_pmc_dispatch(void *arg)
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{
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struct clockframe *frame = arg;
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struct xscale_pmc_state *pmcs;
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struct proc *p;
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uint32_t pmnc;
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int s;
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s = splhigh();
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pmnc = xscale_pmnc_read() & ~(PMNC_C | PMNC_P);
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/*
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* Disable interrupts -- ensure we don't reset anything.
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*/
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xscale_pmnc_write(pmnc &
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~(PMNC_PMN0_IF | PMNC_PMN1_IF | PMNC_CC_IF | PMNC_E));
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/*
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* If we have recorded a clock overflow...
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*/
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if (pmnc & PMNC_CC_IF) {
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if (pmc_profiling_enabled & __PMC_CCNT) {
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proftick(frame);
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__asm volatile("mcr p14, 0, %0, c1, c0, 0"
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: : "r" (pmc_reset_vals[__PMC_CCNT_I]));
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} else if ((p = curproc) != NULL &&
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(p->p_md.pmc_enabled & __PMC_CCNT) != 0) {
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/*
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* XXX - It's not quite clear that this is the proper
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* way to handle this case (here or in the other
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* counters below).
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*/
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pmcs = p->p_md.pmc_state;
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pmcs->pmcv[__PMC_CCNT_I] += 0x100000000ULL;
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__asm volatile("mcr p14, 0, %0, c1, c0, 0"
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: : "r" (pmcs->pmcr[__PMC_CCNT_I]));
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}
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}
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/*
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* If we have recorded an PMC0 overflow...
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*/
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if (pmnc & PMNC_PMN0_IF) {
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if (pmc_profiling_enabled & __PMC0) {
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proftick(frame);
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__asm volatile("mcr p14, 0, %0, c2, c0, 0"
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: : "r" (pmc_reset_vals[__PMC0_I]));
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} else if ((p = curproc) != NULL &&
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(p->p_md.pmc_enabled & __PMC0) != 0) {
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/*
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* XXX - should handle wrapping the counter.
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*/
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pmcs = p->p_md.pmc_state;
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pmcs->pmcv[__PMC0_I] += 0x100000000ULL;
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__asm volatile("mcr p14, 0, %0, c2, c0, 0"
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: : "r" (pmcs->pmcr[__PMC0_I]));
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}
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}
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/*
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* If we have recorded an PMC1 overflow...
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*/
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if (pmnc & PMNC_PMN1_IF) {
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if (pmc_profiling_enabled & __PMC1) {
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proftick(frame);
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__asm volatile("mcr p14, 0, %0, c3, c0, 0"
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: : "r" (pmc_reset_vals[__PMC1_I]));
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} else if ((p = curproc) != NULL &&
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(p->p_md.pmc_enabled & __PMC1) != 0) {
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pmcs = p->p_md.pmc_state;
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pmcs->pmcv[__PMC1_I] += 0x100000000ULL;
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__asm volatile("mcr p14, 0, %0, c3, c0, 0"
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: : "r" (pmcs->pmcr[__PMC1_I]));
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}
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}
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/*
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* If any overflows were set, this will clear them.
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* It will also re-enable the counters.
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*/
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xscale_pmnc_write(pmnc);
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splx(s);
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return 1;
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}
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static void
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xscale_fork(struct proc *p1, struct proc *p2)
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{
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struct xscale_pmc_state *pmcs_p1, *pmcs_p2;
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p2->p_md.pmc_enabled = p1->p_md.pmc_enabled;
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p2->p_md.pmc_state = malloc(sizeof(struct xscale_pmc_state),
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M_TEMP, M_NOWAIT);
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if (p2->p_md.pmc_state == NULL) {
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/* XXX
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* Can't return failure at this point, so just disable
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* PMC for new process.
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*/
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p2->p_md.pmc_enabled = 0;
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return;
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}
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pmcs_p1 = p1->p_md.pmc_state;
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pmcs_p2 = p2->p_md.pmc_state;
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pmcs_p2->pmnc = pmcs_p1->pmnc;
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pmcs_p2->pmcv[0] = 0;
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pmcs_p2->pmcv[1] = 0;
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pmcs_p2->pmcv[2] = 0;
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pmcs_p2->pmc_accv[0] = 0;
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pmcs_p2->pmc_accv[1] = 0;
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pmcs_p2->pmc_accv[2] = 0;
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if (p2->p_md.pmc_enabled & __PMC_CCNT)
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pmc_usecount[__PMC_CCNT_I]++;
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if (p2->p_md.pmc_enabled & __PMC0)
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pmc_usecount[__PMC0_I]++;
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if (p2->p_md.pmc_enabled & __PMC1)
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pmc_usecount[__PMC1_I]++;
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}
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static int
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xscale_num_counters(void)
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{
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return __PMC_NCTRS;
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}
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static int
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xscale_counter_type(int ctr)
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{
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int ret;
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switch (ctr) {
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case __PMC_CCNT_I:
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ret = PMC_TYPE_I80200_CCNT;
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break;
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case __PMC0_I:
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case __PMC1_I:
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ret = PMC_TYPE_I80200_PMCx;
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break;
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case -1:
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ret = PMC_CLASS_I80200;
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break;
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default:
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ret = -1;
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break;
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}
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return ret;
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}
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static void
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xscale_save_context(struct proc *p)
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{
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struct xscale_pmc_state *pmcs;
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uint32_t pmnc, val;
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if (p && p->p_md.pmc_state) {
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pmcs = (struct xscale_pmc_state *) p->p_md.pmc_state;
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/* disable counters */
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pmnc = xscale_pmnc_read() & ~PMNC_E;
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xscale_pmnc_write(pmnc);
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/* do not save pmnc */
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if (p->p_md.pmc_enabled & __PMC_CCNT) {
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/* save ccnt */
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__asm volatile("mrc p14, 0, %0, c1, c0, 0"
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: "=r" (val));
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pmcs->pmcv[__PMC_CCNT_I] &= ~0xffffffffULL;
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pmcs->pmcv[__PMC_CCNT_I] |= val;
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}
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if (p->p_md.pmc_enabled & __PMC0) {
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/* save pmc0 */
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__asm volatile("mrc p14, 0, %0, c2, c0, 0"
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: "=r" (val));
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pmcs->pmcv[__PMC0_I] &= ~0xffffffffULL;
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pmcs->pmcv[__PMC0_I] |= val;
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}
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if (p->p_md.pmc_enabled & __PMC1) {
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/* save pmc1 */
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__asm volatile("mrc p14, 0, %0, c3, c0, 0"
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: "=r" (val));
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pmcs->pmcv[__PMC1_I] &= ~0xffffffffULL;
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pmcs->pmcv[__PMC1_I] |= val;
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}
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if (pmc_kernel_bits) {
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__asm volatile("mcr p14, 0, %0, c0, c0, 0"
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: : "r" (pmc_kernel_bits | PMNC_E));
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}
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}
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}
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static void
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xscale_restore_context(struct proc *p)
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{
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struct xscale_pmc_state *pmcs;
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register_t r = 0;
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uint32_t val;
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if (p && p->p_md.pmc_state) {
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pmcs = (struct xscale_pmc_state *) p->p_md.pmc_state;
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if (p->p_md.pmc_enabled & __PMC1) {
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/* restore pmc1 */
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val = pmcs->pmcv[__PMC1_I] & 0xffffffffULL;
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__asm volatile("mcr p14, 0, %0, c3, c0, 0" : :
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"r" (val));
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}
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if (p->p_md.pmc_enabled & __PMC0) {
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/* restore pmc0 */
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val = pmcs->pmcv[__PMC0_I] & 0xffffffffULL;
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__asm volatile("mcr p14, 0, %0, c2, c0, 0" : :
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"r" (val));
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}
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if (p->p_md.pmc_enabled & __PMC_CCNT) {
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/* restore ccnt */
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val = pmcs->pmcv[__PMC_CCNT_I] & 0xffffffffULL;
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__asm volatile("mcr p14, 0, %0, c1, c0, 0" : :
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"r" (val));
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}
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if (p->p_md.pmc_enabled)
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r = pmcs->pmnc;
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}
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if (r | pmc_kernel_bits) {
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/* restore pmnc & enable counters */
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__asm volatile("mcr p14, 0, %0, c0, c0, 0"
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: : "r" (r | pmc_kernel_bits | PMNC_E));
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}
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}
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static void
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xscale_accumulate(struct proc *parent, struct proc *child)
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{
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struct xscale_pmc_state *pmcs_parent, *pmcs_child;
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pmcs_parent = parent->p_md.pmc_state;
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pmcs_child = child->p_md.pmc_state;
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if (pmcs_parent && pmcs_child) {
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pmcs_parent->pmc_accv[__PMC_CCNT_I] +=
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pmcs_child->pmcv[__PMC_CCNT_I];
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pmcs_parent->pmc_accv[__PMC0_I] += pmcs_child->pmcv[__PMC0_I];
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pmcs_parent->pmc_accv[__PMC1_I] += pmcs_child->pmcv[__PMC1_I];
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}
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}
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static void
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xscale_process_exit(struct proc *p)
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{
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int i;
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if (!p)
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return;
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for (i=0 ; i<__PMC_NCTRS ; i++) {
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if (p->p_md.pmc_enabled & (1 << i)) {
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pmc_usecount[i]--;
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p->p_md.pmc_enabled &= ~(1 << i);
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}
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}
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if (p->p_md.pmc_state)
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free(p->p_md.pmc_state, M_TEMP);
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p->p_md.pmc_state = NULL;
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p->p_md.pmc_enabled = 0;
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}
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static void
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xscale_enable_counter(struct proc *p, int ctr)
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{
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int current = (p == curproc);
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if (ctr < 0 || ctr >= __PMC_NCTRS || !p)
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return;
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if (current)
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pmc_save_context(p);
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if ((p->p_md.pmc_enabled & (1 << ctr)) == 0) {
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pmc_usecount[ctr]++;
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p->p_md.pmc_enabled |= (1 << ctr);
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}
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if (current)
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pmc_restore_context(p);
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}
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static void
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xscale_disable_counter(struct proc *p, int ctr)
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{
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int current = (p == curproc);
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if (ctr < 0 || ctr >= __PMC_NCTRS || !p)
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return;
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if (current)
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pmc_save_context(p);
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if (p->p_md.pmc_enabled & (1 << ctr)) {
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pmc_usecount[ctr]--;
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p->p_md.pmc_enabled &= ~(1 << ctr);
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}
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if (current)
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pmc_restore_context(p);
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}
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static int
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xscale_counter_isrunning(struct proc *p, int ctr)
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{
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if (ctr < 0 || ctr >= __PMC_NCTRS)
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return -1;
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return ((pmc_kernel_enabled | p->p_md.pmc_enabled) & (1 << ctr));
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}
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static int
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xscale_counter_isconfigured(struct proc *p, int ctr)
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{
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return ((ctr >= 0) && (ctr < __PMC_NCTRS));
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}
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static int
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xscale_configure_counter(struct proc *p, int ctr, struct pmc_counter_cfg *cfg)
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{
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struct xscale_pmc_state *pmcs;
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int current = (p == curproc);
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if (ctr < 0 || ctr >= __PMC_NCTRS || !p)
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return EINVAL;
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if (pmc_kernel_enabled & (1 << ctr))
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return EBUSY;
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if (ctr) {
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if ((cfg->event_id > 0x16) || ((cfg->event_id & 0xe) == 0xe)
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|| (cfg->event_id == 0x13))
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return ENODEV;
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} else {
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if (cfg->event_id != 0x100 && cfg->event_id != 0x101)
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return ENODEV;
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}
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if (current)
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pmc_save_context(p);
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if (p->p_md.pmc_state == NULL) {
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p->p_md.pmc_state = malloc(sizeof(struct xscale_pmc_state),
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M_TEMP, M_WAITOK);
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if (!p->p_md.pmc_state)
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return ENOMEM;
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}
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pmcs = p->p_md.pmc_state;
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switch (ctr) {
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case __PMC_CCNT_I:
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pmcs->pmnc &= ~PMNC_D;
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pmcs->pmnc |= (PMNC_CC_IF | PMNC_CC_IE);
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if (cfg->event_id == 0x101)
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pmcs->pmnc |= PMNC_D;
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break;
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case __PMC0_I:
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pmcs->pmnc &= ~PMNC_EVCNT0_MASK;
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pmcs->pmnc |= (cfg->event_id << PMNC_EVCNT0_SHIFT)
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| (PMNC_PMN0_IF | PMNC_PMN0_IE);
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break;
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case __PMC1_I:
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pmcs->pmnc &= ~PMNC_EVCNT1_MASK;
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pmcs->pmnc |= (cfg->event_id << PMNC_EVCNT1_SHIFT)
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| (PMNC_PMN1_IF | PMNC_PMN1_IE);
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break;
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}
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pmcs->pmcr[ctr] = (uint32_t) -((int32_t) cfg->reset_value);
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pmcs->pmcv[ctr] = pmcs->pmcr[ctr];
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if (current)
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pmc_restore_context(p);
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return 0;
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}
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static int
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|
xscale_get_counter_value(struct proc *p, int ctr, int flags, uint64_t *pval)
|
|
{
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struct xscale_pmc_state *pmcs;
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uint32_t val;
|
|
|
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if (ctr < 0 || ctr >= __PMC_NCTRS)
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return EINVAL;
|
|
|
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if (p) {
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pmcs = p->p_md.pmc_state;
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|
|
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if (flags & PMC_VALUE_FLAGS_CHILDREN) {
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*pval = pmcs->pmc_accv[ctr];
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return 0;
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}
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if (p != curproc) {
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*pval = pmcs->pmcv[ctr];
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return 0;
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}
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}
|
|
|
|
switch (ctr) {
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case __PMC_CCNT_I:
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__asm volatile("mrc p14, 0, %0, c1, c0, 0" : "=r" (val));
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break;
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case __PMC0_I:
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__asm volatile("mrc p14, 0, %0, c2, c0, 0" : "=r" (val));
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break;
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case __PMC1_I:
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|
__asm volatile("mrc p14, 0, %0, c3, c0, 0" : "=r" (val));
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break;
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default:
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val = 0;
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|
break;
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|
}
|
|
|
|
*pval = val;
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|
if (p) {
|
|
pmcs = p->p_md.pmc_state;
|
|
*pval += pmcs->pmcv[ctr];
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
xscale_start_profiling(int ctr, struct pmc_counter_cfg *cfg)
|
|
{
|
|
struct proc *p = curproc;
|
|
int s;
|
|
|
|
if (ctr < 0 || ctr >= __PMC_NCTRS)
|
|
return EINVAL;
|
|
|
|
if ((pmc_usecount[ctr] > 0) || (pmc_kernel_enabled & (1 << ctr)))
|
|
return EBUSY;
|
|
|
|
if (ctr) {
|
|
if ((cfg->event_id > 0x16) || ((cfg->event_id & 0xe) == 0xe)
|
|
|| (cfg->event_id == 0x13))
|
|
return ENODEV;
|
|
} else {
|
|
if (cfg->event_id != 0x100 && cfg->event_id != 0x101)
|
|
return ENODEV;
|
|
}
|
|
|
|
pmc_save_context(p);
|
|
|
|
pmc_reset_vals[ctr] = (uint32_t) -((int32_t) cfg->reset_value);
|
|
|
|
s = splhigh();
|
|
|
|
switch (ctr) {
|
|
case __PMC_CCNT_I:
|
|
pmc_kernel_bits &= PMNC_D;
|
|
pmc_kernel_bits |= PMNC_CC_IE;
|
|
if (cfg->event_id)
|
|
pmc_kernel_bits |= PMNC_D;
|
|
__asm volatile("mcr p14, 0, %0, c1, c0, 0" : :
|
|
"r" (pmc_reset_vals[__PMC_CCNT_I]));
|
|
__asm volatile("mcr p14, 0, %0, c0, c0, 0" : :
|
|
"r" (PMNC_CC_IF));
|
|
break;
|
|
case __PMC0_I:
|
|
pmc_kernel_bits &= ~PMNC_EVCNT0_MASK;
|
|
pmc_kernel_bits |= (cfg->event_id << PMNC_EVCNT0_SHIFT)
|
|
| PMNC_PMN0_IE;
|
|
__asm volatile("mcr p14, 0, %0, c2, c0, 0" : :
|
|
"r" (pmc_reset_vals[__PMC0_I]));
|
|
__asm volatile("mcr p14, 0, %0, c0, c0, 0" : :
|
|
"r" (PMNC_PMN0_IF));
|
|
break;
|
|
case __PMC1_I:
|
|
pmc_kernel_bits &= ~PMNC_EVCNT1_MASK;
|
|
pmc_kernel_bits |= (cfg->event_id << PMNC_EVCNT1_SHIFT)
|
|
| PMNC_PMN1_IE;
|
|
__asm volatile("mcr p14, 0, %0, c3, c0, 0" : :
|
|
"r" (pmc_reset_vals[__PMC1_I]));
|
|
__asm volatile("mcr p14, 0, %0, c0, c0, 0" : :
|
|
"r" (PMNC_PMN1_IF));
|
|
break;
|
|
}
|
|
|
|
profsrc |= 1;
|
|
pmc_kernel_enabled |= (1 << ctr);
|
|
pmc_profiling_enabled |= (1 << ctr);
|
|
|
|
pmc_restore_context(p);
|
|
|
|
splx(s);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
xscale_stop_profiling(int ctr)
|
|
{
|
|
struct proc *p = curproc;
|
|
uint32_t save;
|
|
|
|
if (ctr < 0 || ctr >= __PMC_NCTRS)
|
|
return EINVAL;
|
|
|
|
if (!(pmc_kernel_enabled & (1 << ctr)))
|
|
return 0;
|
|
|
|
save = pmc_kernel_bits;
|
|
pmc_kernel_bits = 0;
|
|
pmc_save_context(p);
|
|
pmc_kernel_bits = save;
|
|
|
|
switch (ctr) {
|
|
case __PMC_CCNT_I:
|
|
pmc_kernel_bits &= (PMNC_D | PMNC_CC_IE);
|
|
break;
|
|
case __PMC0_I:
|
|
pmc_kernel_bits &= ~(PMNC_EVCNT0_MASK | PMNC_PMN0_IE);
|
|
break;
|
|
case __PMC1_I:
|
|
pmc_kernel_bits &= ~(PMNC_EVCNT1_MASK | PMNC_PMN1_IE);
|
|
break;
|
|
}
|
|
|
|
pmc_kernel_enabled &= ~(1 << ctr);
|
|
pmc_profiling_enabled &= ~(1 << ctr);
|
|
|
|
if (pmc_profiling_enabled == 0)
|
|
profsrc &= ~1;
|
|
|
|
pmc_restore_context(p);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
xscale_alloc_kernel_counter(int ctr, struct pmc_counter_cfg *cfg)
|
|
{
|
|
struct proc *p = curproc;
|
|
|
|
if (ctr < 0 || ctr >= __PMC_NCTRS)
|
|
return EINVAL;
|
|
|
|
if ((pmc_usecount[ctr] > 0) || (pmc_kernel_enabled & (1 << ctr)))
|
|
return EBUSY;
|
|
|
|
if (ctr) {
|
|
if ((cfg->event_id > 0x16) || ((cfg->event_id & 0xe) == 0xe)
|
|
|| (cfg->event_id == 0x13))
|
|
return ENODEV;
|
|
} else {
|
|
if (cfg->event_id != 0x100 && cfg->event_id != 0x101)
|
|
return ENODEV;
|
|
}
|
|
|
|
pmc_save_context(p);
|
|
|
|
pmc_reset_vals[ctr] = (uint32_t) -((int32_t) cfg->reset_value);
|
|
|
|
switch (ctr) {
|
|
case __PMC_CCNT_I:
|
|
pmc_kernel_bits &= PMNC_D;
|
|
if (cfg->event_id)
|
|
pmc_kernel_bits |= PMNC_D;
|
|
__asm volatile("mcr p14, 0, %0, c1, c0, 0" : :
|
|
"r" (pmc_reset_vals[__PMC_CCNT_I]));
|
|
break;
|
|
case __PMC0_I:
|
|
pmc_kernel_bits &= ~PMNC_EVCNT0_MASK;
|
|
pmc_kernel_bits |= (cfg->event_id << PMNC_EVCNT0_SHIFT);
|
|
__asm volatile("mcr p14, 0, %0, c2, c0, 0" : :
|
|
"r" (pmc_reset_vals[__PMC0_I]));
|
|
break;
|
|
case __PMC1_I:
|
|
pmc_kernel_bits &= ~PMNC_EVCNT1_MASK;
|
|
pmc_kernel_bits |= (cfg->event_id << PMNC_EVCNT1_SHIFT);
|
|
__asm volatile("mcr p14, 0, %0, c3, c0, 0" : :
|
|
"r" (pmc_reset_vals[__PMC1_I]));
|
|
break;
|
|
}
|
|
|
|
pmc_kernel_enabled |= (1 << ctr);
|
|
|
|
pmc_restore_context(p);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
xscale_free_kernel_counter(int ctr)
|
|
{
|
|
if (ctr < 0 || ctr >= __PMC_NCTRS)
|
|
return EINVAL;
|
|
|
|
if (!(pmc_kernel_enabled & (1 << ctr)))
|
|
return 0;
|
|
|
|
pmc_kernel_enabled &= ~(1 << ctr);
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct arm_pmc_funcs xscale_pmc_funcs = {
|
|
xscale_fork,
|
|
xscale_num_counters,
|
|
xscale_counter_type,
|
|
xscale_save_context,
|
|
xscale_restore_context,
|
|
xscale_enable_counter,
|
|
xscale_disable_counter,
|
|
xscale_accumulate,
|
|
xscale_process_exit,
|
|
xscale_configure_counter,
|
|
xscale_get_counter_value,
|
|
xscale_counter_isconfigured,
|
|
xscale_counter_isrunning,
|
|
xscale_start_profiling,
|
|
xscale_stop_profiling,
|
|
xscale_alloc_kernel_counter,
|
|
xscale_free_kernel_counter
|
|
};
|
|
|
|
void
|
|
xscale_pmu_init(void)
|
|
{
|
|
arm_pmc = &xscale_pmc_funcs;
|
|
}
|