117 lines
3.2 KiB
ArmAsm
117 lines
3.2 KiB
ArmAsm
/* $NetBSD: atomic.S,v 1.5 2010/07/07 01:17:27 chs Exp $ */
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/*
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* Copyright (C) 1994-1997 Mark Brinicombe
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* Copyright (C) 1994 Brini
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of Brini may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "assym.h"
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#include <machine/asm.h>
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#include <machine/atomic.h>
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#include <machine/cpu.h>
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#ifdef ATOMIC_SET_BIT_NONINLINE_REQUIRED
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/*
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* Atomic bit set and clear functions
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*/
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#undef atomic_set_bit
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ENTRY(atomic_set_bit)
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mrs r2, cpsr
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orr r3, r2, #(IF32_bits)
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msr cpsr_c, r3
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ldr r3, [r0]
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orr r3, r3, r1
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str r3, [r0]
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msr cpsr_c, r2
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mov pc, lr
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END(atomic_set_bit)
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#undef atomic_clear_bit
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ENTRY(atomic_clear_bit)
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mrs r2, cpsr
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orr r3, r2, #(IF32_bits)
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msr cpsr_c, r3
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ldr r3, [r0]
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bic r3, r3, r1
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str r3, [r0]
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msr cpsr_c, r2
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mov pc, lr
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END(atomic_clear_bit)
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#endif /* ATOMIC_SET_BIT_NONINLINE_REQUIRED */
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#if 0 && defined(_ARM_ARCH_6)
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#define ATOMIC_OP(NAME, OP, ARG) \
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ENTRY_NP(atomic_##NAME##_32) ;\
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mov ip, r0 ;\
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1: ldrex r0, [ip] ;\
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OP r2, r0, ARG ;\
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strex r3, r2, [ip] ;\
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cmp r3, #0 ;\
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bne 1b ;\
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RET ;\
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END(atomic_##NAME##_32)
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ATOMIC_OP(and, and, r1)
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ATOMIC_OP(nand, bic, r1)
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ATOMIC_OP(or, orr, r1)
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ATOMIC_OP(xor, eor, r1)
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ATOMIC_OP(add, add, r1)
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ATOMIC_OP(inc, add, #1)
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ATOMIC_OP(sub, sub, r1)
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ATOMIC_OP(dec, sub, #1)
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#define ATOMIC_OP_NV(NAME, OP, ARG) \
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ENTRY_NP(atomic_##NAME##_32_nv) ;\
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mov ip, r0 ;\
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1: ldrex r0, [ip] ;\
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OP r0, r0, ARG ;\
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strex r3, r0, [ip] ;\
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cmp r3, #0 ;\
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bne 1b ;\
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RET ;\
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END(atomic_##NAME##_32_nv)
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ATOMIC_OP_NV(and, and, r1)
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ATOMIC_OP_NV(nand, bic, r1)
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ATOMIC_OP_NV(or, orr, r1)
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ATOMIC_OP_NV(xor, eor, r1)
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ATOMIC_OP_NV(add, add, r1)
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ATOMIC_OP_NV(inc, add, #1)
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ATOMIC_OP_NV(sub, sub, r1)
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ATOMIC_OP_NV(dec, sub, #1)
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#endif /* _ARM_ARCH_6 */
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