71 lines
2.4 KiB
C
71 lines
2.4 KiB
C
/* $NetBSD: icu.h,v 1.2 2003/08/07 16:29:33 agc Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)icu.h 5.6 (Berkeley) 5/9/91
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*/
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/*
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* AT/386 Interrupt Control constants
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* W. Jolitz 8/89
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*/
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#ifndef _ARM32_ISA_ICU_H_
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#define _ARM32_ISA_ICU_H_
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#ifndef _LOCORE
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/*
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* Interrupt "level" mechanism variables, masks, and macros
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*/
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extern unsigned imen; /* interrupt mask enable */
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#define SET_ICUS() { \
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outb(IO_ICU1 + 1, imen); \
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outb(IO_ICU2 + 1, imen >> 8); \
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}
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#endif /* !_LOCORE */
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/*
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* Interrupt enable bits -- in order of priority
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*/
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#define IRQ_SLAVE 2
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/*
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* Interrupt Control offset into Interrupt descriptor table (IDT)
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*/
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#define ICU_OFFSET 32 /* 0-31 are processor exceptions */
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#define ICU_LEN 16 /* 32-47 are ISA interrupts */
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#endif /* !_ARM32_ISA_ICU_H_ */
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