644 lines
28 KiB
C
644 lines
28 KiB
C
/* 11/02/95 */
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/*----------------------------------------------------------------------------*/
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/* Plug and Play header definitions */
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/*----------------------------------------------------------------------------*/
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/* Structure map for PnP on PowerPC Reference Platform */
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/* See Plug and Play ISA Specification, Version 1.0, May 28, 1993. It */
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/* (or later versions) is available on Compuserve in the PLUGPLAY area. */
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/* This code has extensions to that specification, namely new short and */
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/* long tag types for platform dependent information */
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/* Warning: LE notation used throughout this file */
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/* For enum's: if given in hex then they are bit significant, i.e. */
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/* only one bit is on for each enum */
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#ifndef _PNP_
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#define _PNP_
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#ifndef __ASSEMBLY__
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#define MAX_MEM_REGISTERS 9
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#define MAX_IO_PORTS 20
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#define MAX_IRQS 7
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/*#define MAX_DMA_CHANNELS 7*/
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/* Interrupt controllers */
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#define PNPinterrupt0 "PNP0000" /* AT Interrupt Controller */
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#define PNPinterrupt1 "PNP0001" /* EISA Interrupt Controller */
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#define PNPinterrupt2 "PNP0002" /* MCA Interrupt Controller */
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#define PNPinterrupt3 "PNP0003" /* APIC */
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#define PNPExtInt "IBM000D" /* PowerPC Extended Interrupt Controller */
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/* Timers */
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#define PNPtimer0 "PNP0100" /* AT Timer */
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#define PNPtimer1 "PNP0101" /* EISA Timer */
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#define PNPtimer2 "PNP0102" /* MCA Timer */
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/* DMA controllers */
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#define PNPdma0 "PNP0200" /* AT DMA Controller */
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#define PNPdma1 "PNP0201" /* EISA DMA Controller */
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#define PNPdma2 "PNP0202" /* MCA DMA Controller */
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/* start of August 15, 1994 additions */
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/* CMOS */
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#define PNPCMOS "IBM0009" /* CMOS */
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/* L2 Cache */
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#define PNPL2 "IBM0007" /* L2 Cache */
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/* NVRAM */
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#define PNPNVRAM "IBM0008" /* NVRAM */
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/* Power Management */
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#define PNPPM "IBM0005" /* Power Management */
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/* end of August 15, 1994 additions */
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/* Keyboards */
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#define PNPkeyboard0 "PNP0300" /* IBM PC/XT KB Cntlr (83 key, no mouse) */
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#define PNPkeyboard1 "PNP0301" /* Olivetti ICO (102 key) */
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#define PNPkeyboard2 "PNP0302" /* IBM PC/AT KB Cntlr (84 key) */
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#define PNPkeyboard3 "PNP0303" /* IBM Enhanced (101/2 key, PS/2 mouse) */
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#define PNPkeyboard4 "PNP0304" /* Nokia 1050 KB Cntlr */
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#define PNPkeyboard5 "PNP0305" /* Nokia 9140 KB Cntlr */
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#define PNPkeyboard6 "PNP0306" /* Standard Japanese KB Cntlr */
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#define PNPkeyboard7 "PNP0307" /* Microsoft Windows (R) KB Cntlr */
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/* Parallel port controllers */
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#define PNPparallel0 "PNP0400" /* Standard LPT Parallel Port */
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#define PNPparallel1 "PNP0401" /* ECP Parallel Port */
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#define PNPepp "IBM001C" /* EPP Parallel Port */
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/* Serial port controllers */
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#define PNPserial0 "PNP0500" /* Standard PC Serial port */
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#define PNPSerial1 "PNP0501" /* 16550A Compatible Serial port */
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/* Disk controllers */
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#define PNPdisk0 "PNP0600" /* Generic ESDI/IDE/ATA Compat HD Cntlr */
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#define PNPdisk1 "PNP0601" /* Plus Hardcard II */
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#define PNPdisk2 "PNP0602" /* Plus Hardcard IIXL/EZ */
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/* Diskette controllers */
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#define PNPdiskette0 "PNP0700" /* PC Standard Floppy Disk Controller */
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/* Display controllers */
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#define PNPdisplay0 "PNP0900" /* VGA Compatible */
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#define PNPdisplay1 "PNP0901" /* Video Seven VGA */
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#define PNPdisplay2 "PNP0902" /* 8514/A Compatible */
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#define PNPdisplay3 "PNP0903" /* Trident VGA */
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#define PNPdisplay4 "PNP0904" /* Cirrus Logic Laptop VGA */
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#define PNPdisplay5 "PNP0905" /* Cirrus Logic VGA */
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#define PNPdisplay6 "PNP0906" /* Tseng ET4000 or ET4000/W32 */
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#define PNPdisplay7 "PNP0907" /* Western Digital VGA */
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#define PNPdisplay8 "PNP0908" /* Western Digital Laptop VGA */
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#define PNPdisplay9 "PNP0909" /* S3 */
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#define PNPdisplayA "PNP090A" /* ATI Ultra Pro/Plus (Mach 32) */
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#define PNPdisplayB "PNP090B" /* ATI Ultra (Mach 8) */
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#define PNPdisplayC "PNP090C" /* XGA Compatible */
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#define PNPdisplayD "PNP090D" /* ATI VGA Wonder */
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#define PNPdisplayE "PNP090E" /* Weitek P9000 Graphics Adapter */
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#define PNPdisplayF "PNP090F" /* Oak Technology VGA */
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/* Peripheral busses */
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#define PNPbuses0 "PNP0A00" /* ISA Bus */
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#define PNPbuses1 "PNP0A01" /* EISA Bus */
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#define PNPbuses2 "PNP0A02" /* MCA Bus */
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#define PNPbuses3 "PNP0A03" /* PCI Bus */
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#define PNPbuses4 "PNP0A04" /* VESA/VL Bus */
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/* RTC, BIOS, planar devices */
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#define PNPspeaker0 "PNP0800" /* AT Style Speaker Sound */
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#define PNPrtc0 "PNP0B00" /* AT RTC */
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#define PNPpnpbios0 "PNP0C00" /* PNP BIOS (only created by root enum) */
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#define PNPpnpbios1 "PNP0C01" /* System Board Memory Device */
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#define PNPpnpbios2 "PNP0C02" /* Math Coprocessor */
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#define PNPpnpbios3 "PNP0C03" /* PNP BIOS Event Notification Interrupt */
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/* PCMCIA controller */
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#define PNPpcmcia0 "PNP0E00" /* Intel 82365 Compatible PCMCIA Cntlr */
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/* Mice */
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#define PNPmouse0 "PNP0F00" /* Microsoft Bus Mouse */
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#define PNPmouse1 "PNP0F01" /* Microsoft Serial Mouse */
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#define PNPmouse2 "PNP0F02" /* Microsoft Inport Mouse */
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#define PNPmouse3 "PNP0F03" /* Microsoft PS/2 Mouse */
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#define PNPmouse4 "PNP0F04" /* Mousesystems Mouse */
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#define PNPmouse5 "PNP0F05" /* Mousesystems 3 Button Mouse - COM2 */
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#define PNPmouse6 "PNP0F06" /* Genius Mouse - COM1 */
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#define PNPmouse7 "PNP0F07" /* Genius Mouse - COM2 */
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#define PNPmouse8 "PNP0F08" /* Logitech Serial Mouse */
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#define PNPmouse9 "PNP0F09" /* Microsoft Ballpoint Serial Mouse */
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#define PNPmouseA "PNP0F0A" /* Microsoft PNP Mouse */
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#define PNPmouseB "PNP0F0B" /* Microsoft PNP Ballpoint Mouse */
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/* Modems */
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#define PNPmodem0 "PNP9000" /* Specific IDs TBD */
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/* Network controllers */
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#define PNPnetworkC9 "PNP80C9" /* IBM Token Ring */
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#define PNPnetworkCA "PNP80CA" /* IBM Token Ring II */
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#define PNPnetworkCB "PNP80CB" /* IBM Token Ring II/Short */
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#define PNPnetworkCC "PNP80CC" /* IBM Token Ring 4/16Mbs */
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#define PNPnetwork27 "PNP8327" /* IBM Token Ring (All types) */
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#define PNPnetworket "IBM0010" /* IBM Ethernet used by Power PC */
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#define PNPneteisaet "IBM2001" /* IBM Ethernet EISA adapter */
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#define PNPAMD79C970 "IBM0016" /* AMD 79C970 (PCI Ethernet) */
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/* SCSI controllers */
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#define PNPscsi0 "PNPA000" /* Adaptec 154x Compatible SCSI Cntlr */
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#define PNPscsi1 "PNPA001" /* Adaptec 174x Compatible SCSI Cntlr */
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#define PNPscsi2 "PNPA002" /* Future Domain 16-700 Compat SCSI Cntlr*/
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#define PNPscsi3 "PNPA003" /* Panasonic CDROM Adapter (SBPro/SB16) */
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#define PNPscsiF "IBM000F" /* NCR 810 SCSI Controller */
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#define PNPscsi825 "IBM001B" /* NCR 825 SCSI Controller */
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#define PNPscsi875 "IBM0018" /* NCR 875 SCSI Controller */
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/* Sound/Video, Multimedia */
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#define PNPmm0 "PNPB000" /* Sound Blaster Compatible Sound Device */
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#define PNPmm1 "PNPB001" /* MS Windows Sound System Compat Device */
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#define PNPmmF "IBM000E" /* Crystal CS4231 Audio Device */
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#define PNPv7310 "IBM0015" /* ASCII V7310 Video Capture Device */
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#define PNPmm4232 "IBM0017" /* Crystal CS4232 Audio Device */
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#define PNPpmsyn "IBM001D" /* YMF 289B chip (Yamaha) */
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#define PNPgp4232 "IBM0012" /* Crystal CS4232 Game Port */
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#define PNPmidi4232 "IBM0013" /* Crystal CS4232 MIDI */
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/* Operator Panel */
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#define PNPopctl "IBM000B" /* Operator's panel */
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/* Service Processor */
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#define PNPsp "IBM0011" /* IBM Service Processor */
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#define PNPLTsp "IBM001E" /* Lightning/Terlingua Support Processor */
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#define PNPLTmsp "IBM001F" /* Lightning/Terlingua Mini-SP */
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/* Memory Controller */
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#define PNPmemctl "IBM000A" /* Memory controller */
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/* Graphics Assist */
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#define PNPg_assist "IBM0014" /* Graphics Assist */
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/* Miscellaneous Device Controllers */
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#define PNPtablet "IBM0019" /* IBM Tablet Controller */
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/* PNP Packet Handles */
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#define S1_Packet 0x0A /* Version resource */
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#define S2_Packet 0x15 /* Logical DEVID (without flags) */
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#define S2_Packet_flags 0x16 /* Logical DEVID (with flags) */
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#define S3_Packet 0x1C /* Compatible device ID */
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#define S4_Packet 0x22 /* IRQ resource (without flags) */
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#define S4_Packet_flags 0x23 /* IRQ resource (with flags) */
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#define S5_Packet 0x2A /* DMA resource */
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#define S6_Packet 0x30 /* Depend funct start (w/o priority) */
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#define S6_Packet_priority 0x31 /* Depend funct start (w/ priority) */
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#define S7_Packet 0x38 /* Depend funct end */
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#define S8_Packet 0x47 /* I/O port resource (w/o fixed loc) */
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#define S9_Packet_fixed 0x4B /* I/O port resource (w/ fixed loc) */
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#define S14_Packet 0x71 /* Vendor defined */
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#define S15_Packet 0x78 /* End of resource (w/o checksum) */
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#define S15_Packet_checksum 0x79 /* End of resource (w/ checksum) */
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#define L1_Packet 0x81 /* Memory range */
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#define L1_Shadow 0x20 /* Memory is shadowable */
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#define L1_32bit_mem 0x18 /* 32-bit memory only */
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#define L1_8_16bit_mem 0x10 /* 8- and 16-bit supported */
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#define L1_Decode_Hi 0x04 /* decode supports high address */
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#define L1_Cache 0x02 /* read cacheable, write-through */
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#define L1_Writable 0x01 /* Memory is writable */
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#define L2_Packet 0x82 /* ANSI ID string */
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#define L3_Packet 0x83 /* Unicode ID string */
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#define L4_Packet 0x84 /* Vendor defined */
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#define L5_Packet 0x85 /* Large I/O */
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#define L6_Packet 0x86 /* 32-bit Fixed Loc Mem Range Desc */
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#define END_TAG 0x78 /* End of resource */
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#define DF_START_TAG 0x30 /* Dependent function start */
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#define DF_START_TAG_priority 0x31 /* Dependent function start */
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#define DF_END_TAG 0x38 /* Dependent function end */
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#define SUBOPTIMAL_CONFIGURATION 0x2 /* Priority byte sub optimal config */
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/* Device Base Type Codes */
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typedef enum _PnP_BASE_TYPE {
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Reserved = 0,
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MassStorageDevice = 1,
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NetworkInterfaceController = 2,
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DisplayController = 3,
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MultimediaController = 4,
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MemoryController = 5,
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BridgeController = 6,
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CommunicationsDevice = 7,
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SystemPeripheral = 8,
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InputDevice = 9,
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ServiceProcessor = 0x0A, /* 11/2/95 */
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} PnP_BASE_TYPE;
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/* Device Sub Type Codes */
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typedef enum _PnP_SUB_TYPE {
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SCSIController = 0,
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IDEController = 1,
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FloppyController = 2,
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IPIController = 3,
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OtherMassStorageController = 0x80,
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EthernetController = 0,
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TokenRingController = 1,
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FDDIController = 2,
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OtherNetworkController = 0x80,
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VGAController= 0,
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SVGAController= 1,
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XGAController= 2,
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OtherDisplayController = 0x80,
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VideoController = 0,
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AudioController = 1,
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OtherMultimediaController = 0x80,
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RAM = 0,
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FLASH = 1,
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OtherMemoryDevice = 0x80,
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HostProcessorBridge = 0,
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ISABridge = 1,
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EISABridge = 2,
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MicroChannelBridge = 3,
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PCIBridge = 4,
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PCMCIABridge = 5,
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VMEBridge = 6,
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OtherBridgeDevice = 0x80,
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RS232Device = 0,
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ATCompatibleParallelPort = 1,
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OtherCommunicationsDevice = 0x80,
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ProgrammableInterruptController = 0,
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DMAController = 1,
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SystemTimer = 2,
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RealTimeClock = 3,
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L2Cache = 4,
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NVRAM = 5,
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PowerManagement = 6,
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CMOS = 7,
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OperatorPanel = 8,
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ServiceProcessorClass1 = 9,
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ServiceProcessorClass2 = 0xA,
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ServiceProcessorClass3 = 0xB,
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GraphicAssist = 0xC,
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SystemPlanar = 0xF, /* 10/5/95 */
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OtherSystemPeripheral = 0x80,
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KeyboardController = 0,
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Digitizer = 1,
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MouseController = 2,
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TabletController = 3, /* 10/27/95 */
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OtherInputController = 0x80,
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GeneralMemoryController = 0,
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} PnP_SUB_TYPE;
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/* Device Interface Type Codes */
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typedef enum _PnP_INTERFACE {
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General = 0,
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GeneralSCSI = 0,
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GeneralIDE = 0,
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ATACompatible = 1,
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GeneralFloppy = 0,
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Compatible765 = 1,
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NS398_Floppy = 2, /* NS Super I/O wired to use index
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register at port 398 and data
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register at port 399 */
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NS26E_Floppy = 3, /* Ports 26E and 26F */
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NS15C_Floppy = 4, /* Ports 15C and 15D */
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NS2E_Floppy = 5, /* Ports 2E and 2F */
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CHRP_Floppy = 6, /* CHRP Floppy in PR*P system */
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GeneralIPI = 0,
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GeneralEther = 0,
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GeneralToken = 0,
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GeneralFDDI = 0,
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GeneralVGA = 0,
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GeneralSVGA = 0,
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GeneralXGA = 0,
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GeneralVideo = 0,
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GeneralAudio = 0,
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CS4232Audio = 1, /* CS 4232 Plug 'n Play Configured */
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GeneralRAM = 0,
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GeneralFLASH = 0,
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PCIMemoryController = 0, /* PCI Config Method */
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RS6KMemoryController = 1, /* RS6K Config Method */
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GeneralHostBridge = 0,
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GeneralISABridge = 0,
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GeneralEISABridge = 0,
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GeneralMCABridge = 0,
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GeneralPCIBridge = 0,
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PCIBridgeDirect = 0,
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PCIBridgeIndirect = 1,
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PCIBridgeRS6K = 2,
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GeneralPCMCIABridge = 0,
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GeneralVMEBridge = 0,
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GeneralRS232 = 0,
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COMx = 1,
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Compatible16450 = 2,
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Compatible16550 = 3,
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NS398SerPort = 4, /* NS Super I/O wired to use index
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register at port 398 and data
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register at port 399 */
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NS26ESerPort = 5, /* Ports 26E and 26F */
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NS15CSerPort = 6, /* Ports 15C and 15D */
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NS2ESerPort = 7, /* Ports 2E and 2F */
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GeneralParPort = 0,
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LPTx = 1,
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NS398ParPort = 2, /* NS Super I/O wired to use index
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register at port 398 and data
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register at port 399 */
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NS26EParPort = 3, /* Ports 26E and 26F */
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NS15CParPort = 4, /* Ports 15C and 15D */
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NS2EParPort = 5, /* Ports 2E and 2F */
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GeneralPIC = 0,
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ISA_PIC = 1,
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EISA_PIC = 2,
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MPIC = 3,
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RS6K_PIC = 4,
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GeneralDMA = 0,
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ISA_DMA = 1,
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EISA_DMA = 2,
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GeneralTimer = 0,
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ISA_Timer = 1,
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EISA_Timer = 2,
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GeneralRTC = 0,
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ISA_RTC = 1,
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StoreThruOnly = 1,
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StoreInEnabled = 2,
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RS6KL2Cache = 3,
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IndirectNVRAM = 0, /* Indirectly addressed */
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DirectNVRAM = 1, /* Memory Mapped */
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IndirectNVRAM24 = 2, /* Indirectly addressed - 24 bit */
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GeneralPowerManagement = 0,
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EPOWPowerManagement = 1,
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PowerControl = 2, // d1378
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GeneralCMOS = 0,
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GeneralOPPanel = 0,
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HarddiskLight = 1,
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CDROMLight = 2,
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PowerLight = 3,
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KeyLock = 4,
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ANDisplay = 5, /* AlphaNumeric Display */
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SystemStatusLED = 6, /* 3 digit 7 segment LED */
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CHRP_SystemStatusLED = 7, /* CHRP LEDs in PR*P system */
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GeneralServiceProcessor = 0,
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TransferData = 1,
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IGMC32 = 2,
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IGMC64 = 3,
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GeneralSystemPlanar = 0, /* 10/5/95 */
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} PnP_INTERFACE;
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/* PnP resources */
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/* Compressed ASCII is 5 bits per char; 00001=A ... 11010=Z */
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typedef struct _SERIAL_ID {
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unsigned char VendorID0; /* Bit(7)=0 */
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/* Bits(6:2)=1st character in */
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/* compressed ASCII */
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/* Bits(1:0)=2nd character in */
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/* compressed ASCII bits(4:3) */
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unsigned char VendorID1; /* Bits(7:5)=2nd character in */
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/* compressed ASCII bits(2:0) */
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/* Bits(4:0)=3rd character in */
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/* compressed ASCII */
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unsigned char VendorID2; /* Product number - vendor assigned */
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unsigned char VendorID3; /* Product number - vendor assigned */
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/* Serial number is to provide uniqueness if more than one board of same */
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/* type is in system. Must be "FFFFFFFF" if feature not supported. */
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unsigned char Serial0; /* Unique serial number bits (7:0) */
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unsigned char Serial1; /* Unique serial number bits (15:8) */
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unsigned char Serial2; /* Unique serial number bits (23:16) */
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unsigned char Serial3; /* Unique serial number bits (31:24) */
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unsigned char Checksum;
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} SERIAL_ID;
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typedef enum _PnPItemName {
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Unused = 0,
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PnPVersion = 1,
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LogicalDevice = 2,
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CompatibleDevice = 3,
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IRQFormat = 4,
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DMAFormat = 5,
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StartDepFunc = 6,
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EndDepFunc = 7,
|
|
IOPort = 8,
|
|
FixedIOPort = 9,
|
|
Res1 = 10,
|
|
Res2 = 11,
|
|
Res3 = 12,
|
|
SmallVendorItem = 14,
|
|
EndTag = 15,
|
|
MemoryRange = 1,
|
|
ANSIIdentifier = 2,
|
|
UnicodeIdentifier = 3,
|
|
LargeVendorItem = 4,
|
|
MemoryRange32 = 5,
|
|
MemoryRangeFixed32 = 6,
|
|
} PnPItemName;
|
|
|
|
/* Define a bunch of access functions for the bits in the tag field */
|
|
|
|
/* Tag type - 0 = small; 1 = large */
|
|
#define tag_type(t) (((t) & 0x80)>>7)
|
|
#define set_tag_type(t,v) (t = (t & 0x7f) | ((v)<<7))
|
|
|
|
/* Small item name is 4 bits - one of PnPItemName enum above */
|
|
#define tag_small_item_name(t) (((t) & 0x78)>>3)
|
|
#define set_tag_small_item_name(t,v) (t = (t & 0x07) | ((v)<<3))
|
|
|
|
/* Small item count is 3 bits - count of further bytes in packet */
|
|
#define tag_small_count(t) ((t) & 0x07)
|
|
#define set_tag_count(t,v) (t = (t & 0x78) | (v))
|
|
|
|
/* Large item name is 7 bits - one of PnPItemName enum above */
|
|
#define tag_large_item_name(t) ((t) & 0x7f)
|
|
#define set_tag_large_item_name(t,v) (t = (t | 0x80) | (v))
|
|
|
|
/* a PnP resource is a bunch of contiguous TAG packets ending with an end tag */
|
|
|
|
typedef union _PnP_TAG_PACKET {
|
|
struct _S1_Pack{ /* VERSION PACKET */
|
|
unsigned char Tag; /* small tag = 0x0a */
|
|
unsigned char Version[2]; /* PnP version, Vendor version */
|
|
} S1_Pack;
|
|
|
|
struct _S2_Pack{ /* LOGICAL DEVICE ID PACKET */
|
|
unsigned char Tag; /* small tag = 0x15 or 0x16 */
|
|
unsigned char DevId[4]; /* Logical device id */
|
|
unsigned char Flags[2]; /* bit(0) boot device; */
|
|
/* bit(7:1) cmd in range x31-x37 */
|
|
/* bit(7:0) cmd in range x28-x3f (opt)*/
|
|
} S2_Pack;
|
|
|
|
struct _S3_Pack{ /* COMPATIBLE DEVICE ID PACKET */
|
|
unsigned char Tag; /* small tag = 0x1c */
|
|
unsigned char CompatId[4]; /* Compatible device id */
|
|
} S3_Pack;
|
|
|
|
struct _S4_Pack{ /* IRQ PACKET */
|
|
unsigned char Tag; /* small tag = 0x22 or 0x23 */
|
|
unsigned char IRQMask[2]; /* bit(0) is IRQ0, ...; */
|
|
/* bit(0) is IRQ8 ... */
|
|
unsigned char IRQInfo; /* optional; assume bit(0)=1; else */
|
|
/* bit(0) - high true edge sensitive */
|
|
/* bit(1) - low true edge sensitive */
|
|
/* bit(2) - high true level sensitive*/
|
|
/* bit(3) - low true level sensitive */
|
|
/* bit(7:4) - must be 0 */
|
|
} S4_Pack;
|
|
|
|
struct _S5_Pack{ /* DMA PACKET */
|
|
unsigned char Tag; /* small tag = 0x2a */
|
|
unsigned char DMAMask; /* bit(0) is channel 0 ... */
|
|
unsigned char DMAInfo;
|
|
} S5_Pack;
|
|
|
|
struct _S6_Pack{ /* START DEPENDENT FUNCTION PACKET */
|
|
unsigned char Tag; /* small tag = 0x30 or 0x31 */
|
|
unsigned char Priority; /* Optional; if missing then x01; else*/
|
|
/* x00 = best possible */
|
|
/* x01 = acceptible */
|
|
/* x02 = sub-optimal but functional */
|
|
} S6_Pack;
|
|
|
|
struct _S7_Pack{ /* END DEPENDENT FUNCTION PACKET */
|
|
unsigned char Tag; /* small tag = 0x38 */
|
|
} S7_Pack;
|
|
|
|
struct _S8_Pack{ /* VARIABLE I/O PORT PACKET */
|
|
unsigned char Tag; /* small tag x47 */
|
|
unsigned char IOInfo; /* x0 = decode only bits(9:0); */
|
|
#define ISAAddr16bit 0x01 /* x01 = decode bits(15:0) */
|
|
unsigned char RangeMin[2]; /* Min base address */
|
|
unsigned char RangeMax[2]; /* Max base address */
|
|
unsigned char IOAlign; /* base alignmt, incr in 1B blocks */
|
|
unsigned char IONum; /* number of contiguous I/O ports */
|
|
} S8_Pack;
|
|
|
|
struct _S9_Pack{ /* FIXED I/O PORT PACKET */
|
|
unsigned char Tag; /* small tag = 0x4b */
|
|
unsigned char Range[2]; /* base address 10 bits */
|
|
unsigned char IONum; /* number of contiguous I/O ports */
|
|
} S9_Pack;
|
|
|
|
struct _S14_Pack{ /* VENDOR DEFINED PACKET */
|
|
unsigned char Tag; /* small tag = 0x7m m = 1-7 */
|
|
union _S14_Data{
|
|
unsigned char Data[7]; /* Vendor defined */
|
|
struct _S14_PPCPack{ /* Pr*p s14 pack */
|
|
unsigned char Type; /* 00=non-IBM */
|
|
unsigned char PPCData[6]; /* Vendor defined */
|
|
} S14_PPCPack;
|
|
} S14_Data;
|
|
} S14_Pack;
|
|
|
|
struct _S15_Pack{ /* END PACKET */
|
|
unsigned char Tag; /* small tag = 0x78 or 0x79 */
|
|
unsigned char Check; /* optional - checksum */
|
|
} S15_Pack;
|
|
|
|
struct _L1_Pack{ /* MEMORY RANGE PACKET */
|
|
unsigned char Tag; /* large tag = 0x81 */
|
|
unsigned char Count0; /* x09 */
|
|
unsigned char Count1; /* x00 */
|
|
unsigned char Data[9]; /* a variable array of bytes, */
|
|
/* count in tag */
|
|
} L1_Pack;
|
|
|
|
struct _L2_Pack{ /* ANSI ID STRING PACKET */
|
|
unsigned char Tag; /* large tag = 0x82 */
|
|
unsigned char Count0; /* Length of string */
|
|
unsigned char Count1;
|
|
unsigned char Identifier[1]; /* a variable array of bytes, */
|
|
/* count in tag */
|
|
} L2_Pack;
|
|
|
|
struct _L3_Pack{ /* UNICODE ID STRING PACKET */
|
|
unsigned char Tag; /* large tag = 0x83 */
|
|
unsigned char Count0; /* Length + 2 of string */
|
|
unsigned char Count1;
|
|
unsigned char Country0; /* TBD */
|
|
unsigned char Country1; /* TBD */
|
|
unsigned char Identifier[1]; /* a variable array of bytes, */
|
|
/* count in tag */
|
|
} L3_Pack;
|
|
|
|
struct _L4_Pack{ /* VENDOR DEFINED PACKET */
|
|
unsigned char Tag; /* large tag = 0x84 */
|
|
unsigned char Count0;
|
|
unsigned char Count1;
|
|
union _L4_Data{
|
|
unsigned char Data[1]; /* a variable array of bytes, */
|
|
/* count in tag */
|
|
struct _L4_PPCPack{ /* Pr*p L4 packet */
|
|
unsigned char Type; /* 00=non-IBM */
|
|
unsigned char PPCData[1]; /* a variable array of bytes, */
|
|
/* count in tag */
|
|
} L4_PPCPack;
|
|
} L4_Data;
|
|
} L4_Pack;
|
|
|
|
struct _L5_Pack{
|
|
unsigned char Tag; /* large tag = 0x85 */
|
|
unsigned char Count0; /* Count = 17 */
|
|
unsigned char Count1;
|
|
unsigned char Data[17];
|
|
} L5_Pack;
|
|
|
|
struct _L6_Pack{
|
|
unsigned char Tag; /* large tag = 0x86 */
|
|
unsigned char Count0; /* Count = 9 */
|
|
unsigned char Count1;
|
|
unsigned char Data[9];
|
|
} L6_Pack;
|
|
|
|
} PnP_TAG_PACKET;
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
#endif /* ndef _PNP_ */
|