202 lines
6.4 KiB
ArmAsm
202 lines
6.4 KiB
ArmAsm
/*
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* mpcsa_start.S
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* Copyright (c) 2007, S. Kantoluoto <sami.kantoluoto@iki.fi>
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* All rights reserved.
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*
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* Based on vx115_vep_start.S
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* Copyright (c) 2007, J. Sevy <jsevy@cs.drexel.edu>
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*
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* Based on g42xxeb_start.S
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* Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
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* Written by Hiroyuki Bessho for Genetec Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Genetec Corporation may not be used to endorse or
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* promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#include <arm/armreg.h>
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#include "assym.h"
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RCSID("$NetBSD: mpcsa_start.S,v 1.3 2011/01/31 06:28:04 matt Exp $")
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#ifndef FLASH_START
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#define FLASH_START 0x10020000
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#endif
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#ifndef SDRAM_START
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#define SDRAM_START 0x20000000
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#endif
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#define MODBASE 0x20200000
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/*
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* CPWAIT -- Canonical method to wait for CP15 update.
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* NOTE: Clobbers the specified temp reg.
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* copied from arm/arm/cpufunc_asm_xscale.S
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* XXX: better be in a common header file.
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*/
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#define CPWAIT_BRANCH \
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sub pc, pc, #4
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#define CPWAIT(tmp) \
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mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ;\
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mov tmp, tmp /* wait for it to complete */ ;\
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CPWAIT_BRANCH /* branch to next insn */
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/*
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* Kernel start routine for MPCSA board.
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* This code is executed from Flash when the bootloader jumps to it.
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*/
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.text
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.global _C_LABEL(mpcsa_start)
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_C_LABEL(mpcsa_start):
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/* make sure we're in supervisor mode */
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mov r0,sp
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msr CPSR_c,#I32_bit | F32_bit | PSR_SVC32_MODE
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mov sp,r0
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/* move code to RAM */
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ldr r1, Lcopy_size
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adr r0, _C_LABEL(mpcsa_start)
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add r1, r1, #3
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mov r1, r1, LSR #2 /* get size of code in words */
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mov r2, #SDRAM_START
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add r2, r2, #0x200000 /* code placed 2MB above kernel base */
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mov r4, r2
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/* copy kernel to RAM */
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5: ldr r3, [r0], #4
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subs r1, r1, #1
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str r3, [r2], #4
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bhi 5b
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/* jump to RAM */
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ldr r0, Lstart_off
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add pc, r4, r0
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Lcopy_size: .word _edata-_C_LABEL(mpcsa_start)
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Lstart_off: .word mpcsa_start_ram-_C_LABEL(mpcsa_start)
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mpcsa_start_ram:
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/*
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* Kernel is loaded in SDRAM (0x20200000), and is expected to run
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* in VA 0xc0200000.
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*/
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/* build page table from scratch */
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ldr r0, Lstartup_pagetable
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adr r4, mmu_init_table
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b 3f
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2:
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str r3, [r0, r2]
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add r2, r2, #4
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add r3, r3, #(L1_S_SIZE)
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adds r1, r1, #-1
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bhi 2b
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3:
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ldmia r4!, {r1,r2,r3} /* # of sections, PA|attr, VA */
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cmp r1, #0
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bne 2b
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mcr p15, 0, r0, c2, c0, 0 /* Set TTB */
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mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */
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/* Set the Domain Access register. Very important! */
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mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
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mcr p15, 0, r0, c3, c0, 0
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/* Enable MMU */
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mrc p15, 0, r0, c1, c0, 0
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orr r0, r0, #CPU_CONTROL_MMU_ENABLE
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mcr p15, 0, r0, c1, c0, 0
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CPWAIT(r0)
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/* Jump to kernel code in TRUE VA */
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adr r0, Lstart
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ldr pc, [r0]
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Lstart:
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.word start
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#define MMU_INIT(va,pa,n_sec,attr) \
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.word n_sec ;\
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.word 4*((va)>>L1_S_SHIFT) ;\
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.word (pa) | (attr)
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#define STARTUP_PAGETABLE_ADDR 0x20100000 + 0x4000
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Lstartup_pagetable:
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.word STARTUP_PAGETABLE_ADDR
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mmu_init_table:
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/* fill all table VA==PA */
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MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP_KRW)
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/* map in peripheral space */
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MMU_INIT(0xfff00000, 0xfff00000, 1, L1_TYPE_S|L1_S_AP_KRW)
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/* map SDRAM VA==PA, WT cacheable */
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MMU_INIT(0x20100000, 0x20100000, 63, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
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/* map VA 0xc0000000..0xc0efffff to PA 0x20100000..0x23ffffff */
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MMU_INIT(0xc0000000, 0x20000000, 63, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
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.word 0 /* end of table */
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.align 7
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jme_module_header:
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.word 0xe990510e /* magic number */
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.string "NetBSD/mpcsa\0\0\0" /* module name */
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.short 0 /* build flags */
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.short 0 /* flags */
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.word 0 /* version */
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.word 0 /* compile / link timestamp */
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.word MODBASE /* pointer to init routine */
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.word MODBASE /* start address */
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.word (_edata-(_C_LABEL(mpcsa_start))) /* length of module */
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.word (jme_module_header-_C_LABEL(mpcsa_start)+MODBASE) /* back pointer to module struct*/
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.word 0 /* data pointer (ignored but SBZ)*/
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.word 0 /* data length (ignored but SBZ)*/
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.word 0x20200000 /* alternate address */
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.word 0 /* reserved, SBZ */
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jme_kmodule_header:
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.word 0xe000301e /* magic number */
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.string "JME kernel\0\0\0\0\0" /* module name */
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.short 0 /* build flags */
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.short 0 /* flags */
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.word 0 /* version */
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.word 0 /* compile / link timestamp */
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.word MODBASE /* pointer to init routine */
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.word MODBASE /* start address */
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.word (_edata-(_C_LABEL(mpcsa_start))) /* length of module */
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.word (jme_kmodule_header-_C_LABEL(mpcsa_start)+MODBASE) /* back pointer to module struct*/
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.word 0 /* data pointer (ignored but SBZ)*/
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.word 0 /* data length (ignored but SBZ)*/
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.word 0x20200000 /* alternate address */
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.word 0 /* reserved, SBZ */
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