156 lines
4.5 KiB
C
156 lines
4.5 KiB
C
/* $NetBSD: lock.h,v 1.13 2000/11/22 07:44:01 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Machine-dependent spin lock operations.
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*/
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#ifndef _ALPHA_LOCK_H_
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#define _ALPHA_LOCK_H_
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typedef __volatile int __cpu_simple_lock_t;
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#define __SIMPLELOCK_LOCKED 1
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#define __SIMPLELOCK_UNLOCKED 0
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static __inline void
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__cpu_simple_lock_init(__cpu_simple_lock_t *alp)
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{
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__asm __volatile(
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"# BEGIN __cpu_simple_lock_init\n"
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" stl $31, %0 \n"
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" mb \n"
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" # END __cpu_simple_lock_init"
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: "=m" (*alp));
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}
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static __inline void
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__cpu_simple_lock(__cpu_simple_lock_t *alp)
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{
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unsigned long t0;
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/*
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* Note, if we detect that the lock is held when
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* we do the initial load-locked, we spin using
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* a non-locked load to save the coherency logic
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* some work.
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*/
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__asm __volatile(
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"# BEGIN __cpu_simple_lock\n"
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"1: ldl_l %0, %3 \n"
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" bne %0, 2f \n"
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" bis $31, %2, %0 \n"
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" stl_c %0, %1 \n"
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" beq %0, 3f \n"
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" mb \n"
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" br 4f \n"
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"2: ldl %0, %3 \n"
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" beq %0, 1b \n"
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" br 2b \n"
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"3: br 1b \n"
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"4: \n"
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" # END __cpu_simple_lock\n"
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: "=r" (t0), "=m" (*alp)
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: "i" (__SIMPLELOCK_LOCKED), "1" (*alp));
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}
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static __inline int
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__cpu_simple_lock_try(__cpu_simple_lock_t *alp)
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{
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unsigned long t0, v0;
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__asm __volatile(
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"# BEGIN __cpu_simple_lock_try\n"
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"1: ldl_l %0, %4 \n"
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" bne %0, 2f \n"
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" bis $31, %3, %0 \n"
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" stl_c %0, %2 \n"
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" beq %0, 3f \n"
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" mb \n"
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" bis $31, 1, %1 \n"
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" br 4f \n"
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"2: bis $31, $31, %1 \n"
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" br 4f \n"
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"3: br 1b \n"
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"4: \n"
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" # END __cpu_simple_lock_try"
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: "=r" (t0), "=r" (v0), "=m" (*alp)
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: "i" (__SIMPLELOCK_LOCKED), "2" (*alp));
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return (v0 != 0);
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}
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static __inline void
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__cpu_simple_unlock(__cpu_simple_lock_t *alp)
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{
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__asm __volatile(
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"# BEGIN __cpu_simple_unlock\n"
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" mb \n"
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" stl $31, %0 \n"
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" # END __cpu_simple_unlock"
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: "=m" (*alp));
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}
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#if defined(MULTIPROCESSOR)
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/*
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* On the Alpha, interprocessor interrupts come in at device priority
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* level. This can cause some problems while waiting for r/w spinlocks
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* from a high'ish priority level: IPIs that come in will not be processed.
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* This can lead to deadlock.
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*
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* This hook allows IPIs to be processed when a spinlock's interlock
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* is released.
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*/
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#define SPINLOCK_INTERLOCK_RELEASE_HOOK \
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do { \
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struct cpu_info *__ci = curcpu(); \
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\
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if (__ci->ci_ipis != 0) { \
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/* printf("CPU %lu has IPIs pending\n", \
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__ci->ci_cpuid); */ \
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alpha_ipi_process(__ci, NULL); \
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} \
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} while (0)
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#endif /* MULTIPROCESSOR */
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#endif /* _ALPHA_LOCK_H_ */
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