161 lines
4.5 KiB
C
161 lines
4.5 KiB
C
/* $NetBSD: intr.h,v 1.5 1996/05/13 06:11:28 mycroft Exp $ */
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/*
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _I386_INTR_H_
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#define _I386_INTR_H_
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/* Interrupt priority `levels'; not mutually exclusive. */
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#define IPL_BIO 0 /* block I/O */
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#define IPL_NET 1 /* network */
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#define IPL_TTY 2 /* terminal */
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#define IPL_CLOCK 3 /* clock */
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#define IPL_IMP 4 /* memory allocation */
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#define IPL_NONE 5 /* nothing */
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#define IPL_HIGH 6 /* everything */
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/* Interrupt sharing types. */
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#define IST_NONE 0 /* none */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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/* Soft interrupt masks. */
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#define SIR_CLOCK 31
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#define SIR_CLOCKMASK ((1 << SIR_CLOCK))
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#define SIR_NET 30
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#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
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#define SIR_TTY 29
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#define SIR_TTYMASK ((1 << SIR_TTY) | SIR_CLOCKMASK)
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#define SIR_ALLMASK (SIR_CLOCKMASK | SIR_NETMASK | SIR_TTYMASK)
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#ifndef _LOCORE
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volatile int cpl, ipending, astpending;
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int imask[7];
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extern void Xspllower __P((void));
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static __inline int splraise __P((int));
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static __inline int spllower __P((int));
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static __inline void splx __P((int));
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static __inline void softintr __P((int));
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/*
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* Add a mask to cpl, and return the old value of cpl.
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*/
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static __inline int
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splraise(ncpl)
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register int ncpl;
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{
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register int ocpl = cpl;
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cpl = ocpl | ncpl;
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return (ocpl);
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}
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/*
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* Restore a value to cpl (unmasking interrupts). If any unmasked
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* interrupts are pending, call Xspllower() to process them.
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*/
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static __inline void
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splx(ncpl)
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register int ncpl;
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{
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cpl = ncpl;
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if (ipending & ~ncpl)
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Xspllower();
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}
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/*
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* Same as splx(), but we return the old value of spl, for the
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* benefit of some splsoftclock() callers.
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*/
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static __inline int
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spllower(ncpl)
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register int ncpl;
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{
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register int ocpl = cpl;
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cpl = ncpl;
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if (ipending & ~ncpl)
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Xspllower();
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return (ocpl);
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}
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/*
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* Hardware interrupt masks
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*/
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#define splbio() splraise(imask[IPL_BIO])
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#define splnet() splraise(imask[IPL_NET])
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#define spltty() splraise(imask[IPL_TTY])
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#define splclock() splraise(imask[IPL_CLOCK])
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#define splimp() splraise(imask[IPL_IMP])
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#define splstatclock() splclock()
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/*
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* Software interrupt masks
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*
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* NOTE: splsoftclock() is used by hardclock() to lower the priority from
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* clock to softclock before it calls softclock().
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*/
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#define splsoftclock() spllower(SIR_CLOCKMASK)
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#define splsoftnet() splraise(SIR_NETMASK)
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#define splsofttty() splraise(SIR_TTYMASK)
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/*
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* Miscellaneous
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*/
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#define splhigh() splraise(-1)
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#define spl0() spllower(0)
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/*
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* Software interrupt registration
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*
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* We hand-code this to ensure that it's atomic.
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*/
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static __inline void
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softintr(mask)
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register int mask;
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{
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__asm __volatile("orl %0,_ipending" : : "ir" (mask));
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}
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#define setsoftast() (astpending = 1)
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#define setsoftclock() softintr(1 << SIR_CLOCK)
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#define setsoftnet() softintr(1 << SIR_NET)
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#define setsofttty() softintr(1 << SIR_TTY)
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#endif /* !_LOCORE */
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#endif /* !_I386_INTR_H_ */
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