85 lines
3.9 KiB
C
85 lines
3.9 KiB
C
/* $NetBSD: sa11x0_mcpreg.h,v 1.2 2001/07/12 03:58:35 ichiro Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Ichiro FUKUHARA (ichiro@ichiro.org).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* SA11[01]0 MCP(Multimedia communications Port) */
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#define SAMCP_NPORTS 7
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#define SAMCP_CR0 0x00 /* MCP control register 0 */
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/* MCP control register 1 locate PPC area */
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#define SAMCP_DR0 0x08 /* MCP data register 0 */
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#define SAMCP_DR1 0x0C /* MCP data register 1 */
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#define SAMCP_DR2 0x10 /* MCP data register 2 */
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#define SAMCP_SR 0x18 /* MCP status register */
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/* MCP control register 0*/
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#define CR0_ASD
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#define CR0_TSD
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#define CR0_MCE (1 << 16) /* MCP enable */
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#define CR0_ECS (1 << 17) /* External clock used */
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#define CR0_ADM (1 << 18) /* A/D sampling mode */
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#define CR0_TTE (1 << 19) /* Telecom tx FIFO intr enable */
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#define CR0_TRE (1 << 20) /* Telecom rx FIFO intr enable */
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#define CR0_ATE (1 << 21) /* Audio tx FIFO intr enable */
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#define CR0_ARE (1 << 22) /* Audio rx FIFO intr enable */
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#define CR0_LBM (1 << 23) /* Output of serial shifter connect
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to Input of serial shifter internal */
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#define CR0_ECP(x) ((x) << 24) /* External clock prescaler */
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/* MCP control register 0 */
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#define CR1_CFS (1 << 20)
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/* MCP status register */
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#define SR_ATS (1 << 0) /* Audio transmit FIFO req-flag */
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#define SR_ARS (1 << 1) /* Audio receive FIFO req */
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#define SR_TTS (1 << 2) /* Telecom transmit FIFO req-flag */
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#define SR_TRS (1 << 3) /* Telecom receive FIFO req */
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#define SR_ATU (1 << 4) /* Audio transmit FIFO underrun */
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#define SR_ARO (1 << 5) /* Audio receive FIFO overrun */
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#define SR_TTU (1 << 6) /* Telecom transmit FIFO underrun */
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#define SR_TRO (1 << 7) /* Telecom receive FIFO overrun */
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#define SR_ANF (1 << 8) /* Audio transmit FIFO not full */
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#define SR_ANE (1 << 9) /* Audio receive FIFO not empty */
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#define SR_TNF (1 << 10) /* Telecom transmit FIFO not full */
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#define SR_TNE (1 << 11) /* Telecom receive FIFO not empty */
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#define SR_CWC (1 << 12) /* Codec write completed */
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#define SR_CRC (1 << 13) /* Codec read completed */
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#define SR_ACE (1 << 14) /* Audio codec enabled */
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#define SR_TCE (1 << 15) /* Telecom codec enabled */
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