185 lines
6.8 KiB
C
185 lines
6.8 KiB
C
/* $NetBSD: dwc_mmc_reg.h,v 1.7 2018/06/16 00:15:40 jmcneill Exp $ */
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/*-
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* Copyright (c) 2014-2017 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _DWC_MMC_REG_H
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#define _DWC_MMC_REG_H
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#define DWC_MMC_GCTRL 0x0000
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#define DWC_MMC_PWREN 0x0004
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#define DWC_MMC_CLKDIV 0x0008
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#define DWC_MMC_CLKSRC 0x000c
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#define DWC_MMC_CLKENA 0x0010
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#define DWC_MMC_TIMEOUT 0x0014
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#define DWC_MMC_WIDTH 0x0018
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#define DWC_MMC_BLKSZ 0x001c
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#define DWC_MMC_BYTECNT 0x0020
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#define DWC_MMC_IMASK 0x0024
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#define DWC_MMC_ARG 0x0028
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#define DWC_MMC_CMD 0x002c
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#define DWC_MMC_RESP0 0x0030
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#define DWC_MMC_RESP1 0x0034
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#define DWC_MMC_RESP2 0x0038
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#define DWC_MMC_RESP3 0x003c
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#define DWC_MMC_MINT 0x0040
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#define DWC_MMC_RINT 0x0044
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#define DWC_MMC_STATUS 0x0048
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#define DWC_MMC_FIFOTH 0x004c
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#define DWC_MMC_CDETECT 0x0050
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#define DWC_MMC_WRITEPROT 0x0054
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#define DWC_MMC_GPIO 0x0058
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#define DWC_MMC_CBCR 0x005c
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#define DWC_MMC_BBCR 0x0060
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#define DWC_MMC_DEBNCE 0x0064
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#define DWC_MMC_USRID 0x0068
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#define DWC_MMC_VERID 0x006c
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#define DWC_MMC_HCON 0x0070
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#define DWC_MMC_UHS 0x0074
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#define DWC_MMC_RST 0x0078
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#define DWC_MMC_DMAC 0x0080
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#define DWC_MMC_PLDMND 0x0084
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#define DWC_MMC_DLBA 0x0088
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#define DWC_MMC_IDST 0x008c
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#define DWC_MMC_IDIE 0x0090
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#define DWC_MMC_DSCADDR 0x0094
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#define DWC_MMC_BUFADDR 0x0098
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#define DWC_MMC_GCTRL_USE_INTERNAL_DMAC __BIT(25)
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#define DWC_MMC_GCTRL_SEND_AUTO_STOP_CCSD __BIT(10)
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#define DWC_MMC_GCTRL_DMAEN __BIT(5)
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#define DWC_MMC_GCTRL_INTEN __BIT(4)
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#define DWC_MMC_GCTRL_DMARESET __BIT(2)
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#define DWC_MMC_GCTRL_FIFORESET __BIT(1)
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#define DWC_MMC_GCTRL_SOFTRESET __BIT(0)
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#define DWC_MMC_GCTRL_RESET \
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(DWC_MMC_GCTRL_SOFTRESET | DWC_MMC_GCTRL_FIFORESET | \
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DWC_MMC_GCTRL_DMARESET)
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#define DWC_MMC_CLKENA_LOWPOWERON __BIT(16)
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#define DWC_MMC_CLKENA_CARDCLKON __BIT(0)
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#define DWC_MMC_WIDTH_1 0x00000000
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#define DWC_MMC_WIDTH_4 0x00000001
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#define DWC_MMC_WIDTH_8 0x00010000
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#define DWC_MMC_CMD_START __BIT(31)
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#define DWC_MMC_CMD_USE_HOLD_REG __BIT(29)
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#define DWC_MMC_CMD_VOL_SWITCH __BIT(28)
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#define DWC_MMC_CMD_BOOT_MODE __BIT(27)
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#define DWC_MMC_CMD_DISABLE_BOOT __BIT(26)
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#define DWC_MMC_CMD_EXPECT_BOOT_ACT __BIT(25)
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#define DWC_MMC_CMD_ENABLE_BOOT __BIT(24)
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#define DWC_MMC_CMD_UPCLK_ONLY __BIT(21)
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#define DWC_MMC_CMD_SEND_INIT_SEQ __BIT(15)
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#define DWC_MMC_CMD_STOP_ABORT_CMD __BIT(14)
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#define DWC_MMC_CMD_WAIT_PRE_OVER __BIT(13)
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#define DWC_MMC_CMD_SEND_AUTO_STOP __BIT(12)
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#define DWC_MMC_CMD_SEQMOD __BIT(11)
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#define DWC_MMC_CMD_WRITE __BIT(10)
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#define DWC_MMC_CMD_DATA_EXP __BIT(9)
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#define DWC_MMC_CMD_CHECK_RSP_CRC __BIT(8)
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#define DWC_MMC_CMD_LONG_RSP __BIT(7)
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#define DWC_MMC_CMD_RSP_EXP __BIT(6)
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#define DWC_MMC_INT_CARD_REMOVE __BIT(31)
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#define DWC_MMC_INT_CARD_INSERT __BIT(30)
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#define DWC_MMC_INT_SDIO_INT __BIT(16)
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#define DWC_MMC_INT_END_BIT_ERR __BIT(15)
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#define DWC_MMC_INT_AUTO_CMD_DONE __BIT(14)
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#define DWC_MMC_INT_START_BIT_ERR __BIT(13)
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#define DWC_MMC_INT_HW_LOCKED __BIT(12)
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#define DWC_MMC_INT_FIFO_RUN_ERR __BIT(11)
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#define DWC_MMC_INT_VOL_CHG_DONE __BIT(10)
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#define DWC_MMC_INT_DATA_STARVE __BIT(10)
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#define DWC_MMC_INT_BOOT_START __BIT(9)
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#define DWC_MMC_INT_DATA_TIMEOUT __BIT(9)
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#define DWC_MMC_INT_ACK_RCV __BIT(8)
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#define DWC_MMC_INT_RESP_TIMEOUT __BIT(8)
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#define DWC_MMC_INT_DATA_CRC_ERR __BIT(7)
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#define DWC_MMC_INT_RESP_CRC_ERR __BIT(6)
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#define DWC_MMC_INT_RX_DATA_REQ __BIT(5)
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#define DWC_MMC_INT_TX_DATA_REQ __BIT(4)
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#define DWC_MMC_INT_DATA_OVER __BIT(3)
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#define DWC_MMC_INT_CMD_DONE __BIT(2)
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#define DWC_MMC_INT_RESP_ERR __BIT(1)
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#define DWC_MMC_INT_ERROR \
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(DWC_MMC_INT_RESP_ERR | DWC_MMC_INT_RESP_CRC_ERR | \
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DWC_MMC_INT_DATA_CRC_ERR | DWC_MMC_INT_RESP_TIMEOUT | \
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DWC_MMC_INT_FIFO_RUN_ERR | DWC_MMC_INT_HW_LOCKED | \
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DWC_MMC_INT_START_BIT_ERR | DWC_MMC_INT_END_BIT_ERR)
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#define DWC_MMC_STATUS_DMAREQ __BIT(31)
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#define DWC_MMC_STATUS_DATA_FSM_BUSY __BIT(10)
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#define DWC_MMC_STATUS_CARD_DATA_BUSY __BIT(9)
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#define DWC_MMC_STATUS_CARD_PRESENT __BIT(8)
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#define DWC_MMC_STATUS_FIFO_FULL __BIT(3)
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#define DWC_MMC_STATUS_FIFO_EMPTY __BIT(2)
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#define DWC_MMC_STATUS_TXWL_FLAG __BIT(1)
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#define DWC_MMC_STATUS_RXWL_FLAG __BIT(0)
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#define DWC_MMC_FIFOTH_DMA_MULTIPLE_TXN_SIZE __BITS(30,28)
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#define DWC_MMC_FIFOTH_DMA_MULTIPLE_TXN_SIZE_16 3
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#define DWC_MMC_FIFOTH_RX_WMARK __BITS(27,16)
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#define DWC_MMC_FIFOTH_TX_WMARK __BITS(11,0)
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#define DWC_MMC_DMAC_IDMA_ON __BIT(7)
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#define DWC_MMC_DMAC_FIX_BURST __BIT(1)
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#define DWC_MMC_DMAC_SOFTRESET __BIT(0)
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#define DWC_MMC_VERID_ID __BITS(15,0)
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#define DWC_MMC_VERID_240A 0x240a
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#define DWC_MMC_IDST_HOST_ABT __BIT(10)
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#define DWC_MMC_IDST_ABNORMAL_INT_SUM __BIT(9)
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#define DWC_MMC_IDST_NORMAL_INT_SUM __BIT(8)
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#define DWC_MMC_IDST_CARD_ERR_SUM __BIT(5)
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#define DWC_MMC_IDST_DES_INVALID __BIT(4)
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#define DWC_MMC_IDST_FATAL_BUS_ERR __BIT(2)
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#define DWC_MMC_IDST_RECEIVE_INT __BIT(1)
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#define DWC_MMC_IDST_TRANSMIT_INT __BIT(0)
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#define DWC_MMC_IDST_ERROR \
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(DWC_MMC_IDST_ABNORMAL_INT_SUM | DWC_MMC_IDST_CARD_ERR_SUM | \
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DWC_MMC_IDST_DES_INVALID | DWC_MMC_IDST_FATAL_BUS_ERR)
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#define DWC_MMC_IDST_COMPLETE \
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(DWC_MMC_IDST_RECEIVE_INT | DWC_MMC_IDST_TRANSMIT_INT)
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struct dwc_mmc_idma_desc {
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uint32_t dma_config;
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#define DWC_MMC_IDMA_CONFIG_DIC __BIT(1)
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#define DWC_MMC_IDMA_CONFIG_LD __BIT(2)
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#define DWC_MMC_IDMA_CONFIG_FD __BIT(3)
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#define DWC_MMC_IDMA_CONFIG_CH __BIT(4)
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#define DWC_MMC_IDMA_CONFIG_ER __BIT(5)
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#define DWC_MMC_IDMA_CONFIG_CES __BIT(30)
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#define DWC_MMC_IDMA_CONFIG_OWN __BIT(31)
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uint32_t dma_buf_size;
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uint32_t dma_buf_addr;
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uint32_t dma_next;
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} __packed;
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#endif /* !_DWC_MMC_REG_H */
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