dyoung a60f2abe1f PCI Configuration Mechanisms #1 and #2 are controlled by two to
three registers.  Let us think of the kernel operating the registers
in two steps:

1) Select: enable configuration cycles and select a range of
   configuration-space addresses.

2) Access: read or write a word in PCI configuration space.

To make the steps more explicit, extract some helper subroutines
from pci_conf_read(9) and pci_conf_write(9):

pci_conf_selector(tag, reg): from a pcitag_t and a register offset,
    create a word that enables configuration cycles and selects a
    configuration address range.

pci_conf_select(w): for `w' a word created by pci_conf_selector(),
    enable configuration cycles and select the address range indicated
    by `w'.

pci_conf_select(0): disable configuration cycles.

pci_conf_port(tag, reg): map a pcitag_t and a register offset to an I/O
    port where the configuration access should occur.

While I'm in here, change the panic(9) calls to panic("%s: ...",
__func__) instead of hard-coding a subroutine name.
2010-02-16 19:29:40 +00:00
2010-02-11 14:10:22 +00:00
2010-02-13 22:54:51 +00:00
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