61 lines
2.6 KiB
C
61 lines
2.6 KiB
C
/* $NetBSD: siop_pci_common.h,v 1.7 2005/12/11 12:22:50 christos Exp $ */
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/*
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* Copyright (c) 2000 Manuel Bouyer.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Manuel Bouyer.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* common functions for the siop and esiop pci front ends */
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/* structure describing each chip */
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struct siop_product_desc {
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u_int32_t product;
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int revision;
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const char *name;
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int features; /* features are defined in siopvar.h */
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u_int8_t maxburst;
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u_int8_t maxoff; /* maximum supported offset */
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u_int8_t clock_div; /* clock divider to use for async. logic */
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u_int8_t clock_period; /* clock period (ns * 10) */
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int ram_size; /* size of RAM, if appropriate */
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};
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const struct siop_product_desc * siop_lookup_product(u_int32_t, int);
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/* Driver internal state */
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struct siop_pci_common_softc {
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pci_chipset_tag_t sc_pc; /* PCI registers info */
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pcitag_t sc_tag;
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void *sc_ih; /* PCI interrupt handle */
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const struct siop_product_desc *sc_pp; /* Adapter description */
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};
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int siop_pci_attach_common(struct siop_pci_common_softc *,
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struct siop_common_softc *, struct pci_attach_args *,
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int (*)(void *));
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void siop_pci_reset(struct siop_common_softc *);
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