163 lines
4.8 KiB
C
163 lines
4.8 KiB
C
/* $NetBSD: tegra_drm.h,v 1.4 2015/11/14 11:55:36 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _ARM_TEGRA_DRM_H
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#define _ARM_TEGRA_DRM_H
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#include <drm/drm_fb_helper.h>
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#define DRIVER_AUTHOR "Jared McNeill"
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#define DRIVER_NAME "tegra"
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#define DRIVER_DESC "NVIDIA Tegra K1"
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#define DRIVER_DATE "20151108"
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 1
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#define DRIVER_PATCHLEVEL 0
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struct tegra_framebuffer;
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struct tegra_gem_object;
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struct tegra_drm_softc {
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device_t sc_dev;
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struct drm_device *sc_ddev;
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bus_space_tag_t sc_bst;
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bus_dma_tag_t sc_dmat;
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device_t sc_ddcdev;
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struct tegra_gpio_pin *sc_pin_hpd;
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struct tegra_gpio_pin *sc_pin_pll;
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struct tegra_gpio_pin *sc_pin_power;
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bool sc_force_dvi;
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uint32_t sc_vbl_received[2];
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};
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struct tegra_drmfb_attach_args {
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struct drm_device *tfa_drm_dev;
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struct drm_fb_helper *tfa_fb_helper;
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struct drm_fb_helper_surface_size tfa_fb_sizes;
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bus_space_tag_t tfa_fb_bst;
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bus_dma_tag_t tfa_fb_dmat;
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};
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struct tegra_crtc {
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struct drm_crtc base;
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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bus_size_t size;
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int intr;
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int index;
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void *ih;
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bool enabled;
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struct tegra_gem_object *cursor_obj;
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int cursor_x;
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int cursor_y;
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};
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struct tegra_encoder {
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struct drm_encoder base;
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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bus_size_t size;
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};
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struct tegra_connector {
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struct drm_connector base;
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device_t ddcdev;
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struct i2c_adapter *adapter;
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struct tegra_gpio_pin *hpd;
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bool has_hdmi_sink;
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bool has_audio;
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};
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struct tegra_gem_object {
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struct drm_gem_object base;
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bus_dma_tag_t dmat;
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bus_dma_segment_t dmasegs[1];
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bus_size_t dmasize;
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bus_dmamap_t dmamap;
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void *dmap;
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};
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struct tegra_framebuffer {
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struct drm_framebuffer base;
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struct tegra_gem_object *obj;
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};
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struct tegra_fbdev {
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struct drm_fb_helper helper;
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};
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#define HDMI_READ(enc, reg) \
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bus_space_read_4((enc)->bst, (enc)->bsh, (reg))
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#define HDMI_WRITE(enc, reg, val) \
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bus_space_write_4((enc)->bst, (enc)->bsh, (reg), (val))
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#define HDMI_SET_CLEAR(enc, reg, set, clr) \
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tegra_reg_set_clear((enc)->bst, (enc)->bsh, (reg), (set), (clr))
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#define DC_READ(crtc, reg) \
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bus_space_read_4((crtc)->bst, (crtc)->bsh, (reg))
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#define DC_WRITE(crtc, reg, val) \
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bus_space_write_4((crtc)->bst, (crtc)->bsh, (reg), (val))
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#define DC_SET_CLEAR(crtc, reg, set, clr) \
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tegra_reg_set_clear((crtc)->bst, (crtc)->bsh, (reg), (set), (clr))
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#define TEGRA_DC_DEPTH 32
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#define tegra_drm_private(ddev) (ddev)->dev_private
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#define to_tegra_crtc(x) container_of(x, struct tegra_crtc, base)
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#define to_tegra_encoder(x) container_of(x, struct tegra_encoder, base)
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#define to_tegra_connector(x) container_of(x, struct tegra_connector, base)
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#define to_tegra_framebuffer(x) container_of(x, struct tegra_framebuffer, base)
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#define to_tegra_fbdev(x) container_of(x, struct tegra_fbdev, helper)
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#define to_tegra_gem_obj(x) container_of(x, struct tegra_gem_object, base)
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int tegra_drm_mode_init(struct drm_device *);
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int tegra_drm_fb_init(struct drm_device *);
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u32 tegra_drm_get_vblank_counter(struct drm_device *, int);
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int tegra_drm_enable_vblank(struct drm_device *, int);
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void tegra_drm_disable_vblank(struct drm_device *, int);
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int tegra_drm_framebuffer_init(struct drm_device *,
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struct tegra_framebuffer *);
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struct tegra_gem_object *tegra_drm_obj_alloc(struct drm_device *, size_t);
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void tegra_drm_obj_free(struct tegra_gem_object *);
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int tegra_drm_gem_fault(struct uvm_faultinfo *, vaddr_t, struct vm_page **,
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int, int, vm_prot_t, int);
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void tegra_drm_gem_free_object(struct drm_gem_object *);
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#endif /* _ARM_TEGRA_DRM_H */
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