141 lines
4.9 KiB
C
141 lines
4.9 KiB
C
/* $NetBSD: sa11x0_gpioreg.h,v 1.6 2001/03/31 12:36:53 toshii Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Ichiro FUKUHARA.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* SA-11x0 GPIO Register
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*/
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#define SAGPIO_NPORTS 8
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/* GPIO pin-level register */
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#define SAGPIO_PLR 0x00
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/* GPIO pin direction register */
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#define SAGPIO_PDR 0x04
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/* GPIO pin output set register */
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#define SAGPIO_PSR 0x08
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/* GPIO pin output clear register */
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#define SAGPIO_PCR 0x0C
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/* GPIO rising-edge detect register */
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#define SAGPIO_RER 0x10
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/* GPIO falling-edge detect register */
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#define SAGPIO_FER 0x14
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/* GPIO edge-detect status register */
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#define SAGPIO_EDR 0x18
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/* GPIO alternate function register */
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#define SAGPIO_AFR 0x1C
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/* XXX */
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#define GPIO(x) (0x00000001 << (x))
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/*
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* iPAQ H3600 specific parameter
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*/
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/*
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port I/O(Active) name desc
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0 I(L) PWR_ON# button detect: power-on
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1 I(L) IP_IRQ# cpu-interrupt
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2...9 O LDD{8..15} LCD DATA(8-15)
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10 I(L) CARD_IND1# PCMCIA Socket1 inserted detection
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11 I(L) CARD_IRQ1# PCMCIA slot1 IRQ
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12 O CLK_SET0 clock select 0 for audio codec
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13 O CLK_SET1 clock select 1 for audio codec
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14 I/O L3_SDA UDA1341 L3DATA
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15 O L3_MODE UDA1341 L3MODE
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16 O L3_SCLK UDA1341 L3SCLK
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17 I(L) CARD_IND0# PCMCIA Socket0 inserted detection
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18 I(L) KEY_ACT# button detect: center button
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19 I SYS_CLK Stereo audio codev external clock
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20 I(H) BAT_FAULT Battery fault
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21 I(L) CARD_IRQ0# PCMCIA slot0 IRQ
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22 I(L) LOCK# expansion pack lock/unlock signal
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23 I(H) COM_DCD RS-232 DCD
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24 I(H) OPT_IRQ expansion pach shared IRQ
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25 I(H) COM_CTS RS-232 CTS
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26 O(H) COM_RTS RS-232 RTS
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27 O(L) OPT_DETECT# Indicates presence of expansion pack inserted
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Extended GPIO
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0 O(H) VPEN Enables programming and erasing of Flash
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1 O(H) CARD_RESET CF/PCMCIA card reset signal
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2 O(H) OPT_RESET Expansion pack reset signal
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3 O(L) CODEC_RESET# onboard codec reset signal
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4 O(H) OPT_NVRAM_ON Enables power supply to the NVRAM of the
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Expansion pack.(=OPT_ON)
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5 O(H) OPT_ON Enables full power supply to the Expansion pack.
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6 O(H) LCD_ON Enables LCD 3.3V power supply
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7 O(H) RS232_ON Enables RS232
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8 O(H) LCD_PCI Enables power to LCD control IC
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9 O(H) IR_ON Enables power to IR module
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10 O(H) AUD_ON Enables power to audio output amp.
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11 O(H) AUD_PWR_ON Enables power to all audio modules.
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12 O(H) QMUTE Mutes yhe onboard audio codec
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13 O IR_FSEL FIR mode selection:H=FIR,L=SIR
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14 O(H) LCD_5V_ON Enables 5V to the LCD module
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15 O(H) LVDD_ON Enables 9V and -6.5V to the LCD module
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*/
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#define GPIO_H3600_POWER_BUTTON GPIO (0)
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#define GPIO_H3600_PCMCIA_CD0 GPIO (17)
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#define GPIO_H3600_PCMCIA_CD1 GPIO (10)
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#define GPIO_H3600_PCMCIA_IRQ0 GPIO (21)
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#define GPIO_H3600_PCMCIA_IRQ1 GPIO (11)
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#define GPIO_H3600_OPT_LOCK GPIO (22)
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#define GPIO_H3600_OPT_IRQ GPIO (24)
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#define GPIO_H3600_OPT_DETECT GPIO (27)
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#define IRQ_H3600_POWER_BUTTON IRQ_GPIO0
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#define IRQ_H3600_PCMCIA_CD0 IRQ_GPIO17
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#define IRQ_H3600_PCMCIA_CD1 IRQ_GPIO10
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#define IRQ_H3600_PCMCIA_IRQ0 IRQ_GPIO21
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#define IRQ_H3600_PCMCIA_IRQ1 IRQ_GPIO11
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#define IRQ_H3600_OPT_IRQ IRQ_GPIO24
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#define IRQ_H3600_OPT_DETECT IRQ_GPIO27
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/*
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* JORNADA720 specific parameter
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*/
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#define JORNADA720_KBD_IRQ GPIO (0)
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#define JORNADA720_MOUSE_IRQ GPIO (9)
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