1295 lines
31 KiB
C
1295 lines
31 KiB
C
/* $NetBSD: uba.c,v 1.8 1995/06/16 15:26:11 ragge Exp $ */
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/*
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* Copyright (c) 1982, 1986 The Regents of the University of California.
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* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)uba.c 7.10 (Berkeley) 12/16/90
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* @(#)autoconf.c 7.20 (Berkeley) 5/9/91
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*/
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/* All bugs are subject to removal without further notice */
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#include "sys/param.h"
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#include "sys/types.h"
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#include "sys/time.h"
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#include "sys/systm.h"
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#include "sys/map.h"
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#include "sys/buf.h"
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#include "sys/proc.h"
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#include "sys/user.h"
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#include "sys/conf.h"
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#include "sys/dkstat.h"
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#include "sys/kernel.h"
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#include "sys/malloc.h"
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#include "sys/device.h"
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#include "machine/pte.h"
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#include "machine/cpu.h"
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#include "machine/mtpr.h"
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#include "machine/nexus.h"
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#include "machine/sid.h"
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#if VAX630
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#include "machine/uvaxII.h"
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#endif
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#include "uba.h"
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#include "ubareg.h"
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#include "ubavar.h"
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int (*vekmatris[NUBA][128])();
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int interinfo[NUBA][128];
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int dkn;
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extern int cold;
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struct uba_hd uba_hd[NUBA];
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/* F|r att f} genom kompilatorn :( Nollpekare f|r interrupt... */
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int cvec=0;
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volatile int rbr,rcvec;
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#if VAX630 || VAX410
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extern struct uvaxIIcpu *uvaxIIcpu_ptr;
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#endif
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#if VAX630
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extern struct ka630clock *ka630clk_ptr;
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#endif
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/*
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* Mark addresses starting at "addr" and continuing
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* "size" bytes as allocated in the map "ualloc".
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* Warn if the new allocation overlaps a previous allocation.
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*/
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static
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csralloc(ualloc, addr, size)
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caddr_t ualloc;
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u_short addr;
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register int size;
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{
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register caddr_t p;
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int warned = 0;
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p = &ualloc[ubdevreg(addr+size)];
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while (--size >= 0) {
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if (*--p && !warned) {
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printf(
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"WARNING: device registers overlap those for a previous device!\n");
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warned = 1;
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}
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*p = 1;
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}
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}
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/*
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* Make an IO register area accessible at physical address physa
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* by mapping kernel ptes starting at pte.
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*/
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ioaccess(physa, pte, size)
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u_int physa;
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u_int *pte;
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u_int size;
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{
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u_int i = (size>>PG_SHIFT);
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u_int v = (physa>>PG_SHIFT);
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do {
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*pte = PG_V|PG_KW|v;
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pte++;
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v++;
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} while (--i > 0);
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mtpr(0, PR_TBIA);
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}
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/*
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* General uba interrupt handler.
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*/
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ubainterrupt(level, uba,vektor){
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/*printf("ubainterrupt: level %x, uba %x, vektor %x\n",level, uba,vektor); */
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(*vekmatris[uba][vektor])(vektor,level,uba,interinfo[uba][vektor]);
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}
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/*
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* Stray interrupt vector handler, used when nowhere else to
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* go to.
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*/
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ubastray(vektor, level,uba){
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if(cold){
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rbr=level;
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rcvec=vektor;
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} else {
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printf("uba%d: unexpected interrupt at vector %d on level %d",
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uba, vektor, level);
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}
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}
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/*
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* Find devices on a UNIBUS.
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* Uses per-driver routine to set <br,cvec> into <r11,r10>,
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* and then fills in the tables, with help from a per-driver
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* slave initialization routine.
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*
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* Changed this ugly written code assuming special registers
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* from the C compiler :( 940516/ragge
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*/
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unifind(uhp0, pumem)
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struct uba_hd *uhp0;
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caddr_t pumem;
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{
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register struct uba_device *ui;
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register struct uba_ctlr *um;
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register struct uba_hd *uhp = uhp0;
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u_short *reg, *ap, addr;
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struct uba_driver *udp;
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int i, (*ivec)();
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caddr_t ualloc;
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volatile extern int br, cvec;
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volatile extern int rbr, rcvec;
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#if DW780 || DWBUA
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struct uba_regs *vubp = uhp->uh_uba;
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#endif
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/*
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* Initialize the UNIBUS, by freeing the map
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* registers and the buffered data path registers
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*/
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uhp->uh_map = (struct map *)
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malloc((u_long)(UAMSIZ * sizeof (struct map)), M_DEVBUF,
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M_NOWAIT);
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if (uhp->uh_map == 0)
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panic("no mem for unibus map");
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bzero((caddr_t)uhp->uh_map, (unsigned)(UAMSIZ * sizeof (struct map)));
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ubainitmaps(uhp);
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/*
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* Initialize space for the UNIBUS interrupt vectors.
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* On the 8600, can't use first slot in UNIvec
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* (the vectors for the second SBI overlap it);
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* move each set of vectors forward.
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*/
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#if VAX8600
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if (cpu == VAX_8600)
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uhp->uh_vec = UNIvec[numuba + 1];
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else
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#endif
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uhp->Nuh_vec = vekmatris[numuba];
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for (i = 0; i < 128; i++)
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uhp->Nuh_vec[i] = ubastray;
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/*
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* Set last free interrupt vector for devices with
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* programmable interrupt vectors. Use is to decrement
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* this number and use result as interrupt vector.
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*/
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uhp->uh_lastiv = 0x200;
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#ifdef DWBUA
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if (uhp->uh_type == DWBUA)
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BUA(vubp)->bua_offset = (int)uhp->uh_vec - (int)&scb[0];
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#endif
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#ifdef DW780
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if (uhp->uh_type == DW780) {
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vubp->uba_sr = vubp->uba_sr;
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vubp->uba_cr = UBACR_IFS|UBACR_BRIE;
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}
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#endif
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/*
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* First configure devices that have unibus memory,
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* allowing them to allocate the correct map registers.
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*/
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ubameminit(numuba);
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/*
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* Grab some memory to record the umem address space we allocate,
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* so we can be sure not to place two devices at the same address.
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*
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* We could use just 1/8 of this (we only want a 1 bit flag) but
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* we are going to give it back anyway, and that would make the
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* code here bigger (which we can't give back), so ...
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*
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* One day, someone will make a unibus with something other than
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* an 8K i/o address space, & screw this totally.
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*/
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ualloc = (caddr_t)malloc((u_long)(8 * 1024), M_TEMP, M_NOWAIT);
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if (ualloc == (caddr_t)0)
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panic("no mem for unifind");
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bzero(ualloc, 8*1024);
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/*
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* Map the first page of UNIBUS i/o
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* space to the first page of memory
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* for devices which will need to dma
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* output to produce an interrupt.
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*/
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*(int *)(&uhp->uh_mr[0]) = UBAMR_MRV;
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#define ubaddr(uhp, off) (u_short *)((int)(uhp)->uh_iopage + ubdevreg(off))
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/*
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* Check each unibus mass storage controller.
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* For each one which is potentially on this uba,
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* see if it is really there, and if it is record it and
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* then go looking for slaves.
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*/
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for (um = ubminit; udp = um->um_driver; um++) {
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if (um->um_ubanum != numuba && um->um_ubanum != '?' ||
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um->um_alive)
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continue;
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addr = (u_short)(u_long)um->um_addr;
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/*
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* use the particular address specified first,
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* or if it is given as "0", of there is no device
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* at that address, try all the standard addresses
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* in the driver til we find it
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*/
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for (ap = udp->ud_addr; addr || (addr = *ap++); addr = 0) {
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if (ualloc[ubdevreg(addr)])
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continue;
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reg = ubaddr(uhp, addr);
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if (badaddr((caddr_t)reg, 2))
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continue;
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#ifdef DW780
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if (uhp->uh_type == DW780 && vubp->uba_sr) {
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vubp->uba_sr = vubp->uba_sr;
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continue;
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}
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#endif
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cvec = 0x200;
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rcvec = 0x200;
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i = (*udp->ud_probe)(reg, um->um_ctlr, um);
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#ifdef DW780
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if (uhp->uh_type == DW780 && vubp->uba_sr) {
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vubp->uba_sr = vubp->uba_sr;
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continue;
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}
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#endif
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if (i == 0)
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continue;
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printf("%s%d at uba%d csr %o ",
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udp->ud_mname, um->um_ctlr, numuba, addr);
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if (rcvec == 0) {
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printf("zero vector\n");
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continue;
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}
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if (rcvec == 0x200) {
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printf("didn't interrupt\n");
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continue;
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}
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interinfo[numuba][rcvec]=um->um_ctlr;
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printf("vec %o, ipl %x\n", rcvec, rbr);
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csralloc(ualloc, addr, i);
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um->um_alive = 1;
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um->um_ubanum = numuba;
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um->um_hd = uhp;
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um->um_addr = (caddr_t)reg;
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udp->ud_minfo[um->um_ctlr] = um;
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uhp->Nuh_vec[rcvec] = um->um_intr;
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for (ui = ubdinit; ui->ui_driver; ui++) {
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int t;
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if (ui->ui_driver != udp || ui->ui_alive ||
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ui->ui_ctlr != um->um_ctlr && ui->ui_ctlr != '?' ||
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ui->ui_ubanum != numuba && ui->ui_ubanum != '?')
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continue;
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t = ui->ui_ctlr;
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ui->ui_ctlr = um->um_ctlr;
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if ((*udp->ud_slave)(ui, reg) == 0)
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ui->ui_ctlr = t;
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else {
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ui->ui_alive = 1;
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ui->ui_ubanum = numuba;
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ui->ui_hd = uhp;
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ui->ui_addr = (caddr_t)reg;
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ui->ui_physaddr = pumem + ubdevreg(addr);
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if (ui->ui_dk && dkn < DK_NDRIVE)
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ui->ui_dk = dkn++;
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else
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ui->ui_dk = -1;
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ui->ui_mi = um;
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/* ui_type comes from driver */
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udp->ud_dinfo[ui->ui_unit] = ui;
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printf("%s%d at %s%d slave %d",
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udp->ud_dname, ui->ui_unit,
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udp->ud_mname, um->um_ctlr, ui->ui_slave);
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(*udp->ud_attach)(ui);
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printf("\n");
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}
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}
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break;
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}
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}
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/*
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* Now look for non-mass storage peripherals.
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*/
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for (ui = ubdinit; udp = ui->ui_driver; ui++) {
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if (ui->ui_ubanum != numuba && ui->ui_ubanum != '?' ||
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ui->ui_alive || ui->ui_slave != -1)
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continue;
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addr = (u_short)(u_long)ui->ui_addr;
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for (ap = udp->ud_addr; addr || (addr = *ap++); addr = 0) {
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if (ualloc[ubdevreg(addr)])
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continue;
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reg = ubaddr(uhp, addr);
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if (badaddr((caddr_t)reg, 2))
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continue;
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#ifdef DW780
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if (uhp->uh_type == DW780 && vubp->uba_sr) {
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vubp->uba_sr = vubp->uba_sr;
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continue;
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}
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#endif
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rcvec = 0x200;
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cvec = 0x200;
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i = (*udp->ud_probe)(reg, ui);
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#ifdef DW780
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if (uhp->uh_type == DW780 && vubp->uba_sr) {
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vubp->uba_sr = vubp->uba_sr;
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continue;
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}
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#endif
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if (i == 0)
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continue;
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printf("%s%d at uba%d csr %o ",
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ui->ui_driver->ud_dname, ui->ui_unit, numuba, addr);
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if (rcvec == 0) {
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printf("zero vector\n");
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continue;
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}
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if (rcvec == 0x200) {
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printf("didn't interrupt\n");
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continue;
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}
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interinfo[numuba][rcvec]=ui->ui_unit;
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printf("vec %o, ipl %x\n", rcvec, rbr);
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csralloc(ualloc, addr, i);
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ui->ui_hd = uhp;
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uhp->Nuh_vec[rcvec] = ui->ui_intr;
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ui->ui_alive = 1;
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ui->ui_ubanum = numuba;
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ui->ui_addr = (caddr_t)reg;
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ui->ui_physaddr = pumem + ubdevreg(addr);
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ui->ui_dk = -1;
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/* ui_type comes from driver */
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udp->ud_dinfo[ui->ui_unit] = ui;
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(*udp->ud_attach)(ui);
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break;
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}
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}
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#ifdef DW780
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if (uhp->uh_type == DW780)
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uhp->uh_uba->uba_cr = UBACR_IFS | UBACR_BRIE |
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UBACR_USEFIE | UBACR_SUEFIE |
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(uhp->uh_uba->uba_cr & 0x7c000000);
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#endif
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numuba++;
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#ifdef AUTO_DEBUG
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printf("Unibus allocation map");
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for (i = 0; i < 8*1024; ) {
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register n, m;
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if ((i % 128) == 0) {
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printf("\n%6o:", i);
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for (n = 0; n < 128; n++)
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if (ualloc[i+n])
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break;
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if (n == 128) {
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i += 128;
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continue;
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}
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}
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for (n = m = 0; n < 16; n++) {
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m <<= 1;
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m |= ualloc[i++];
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}
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printf(" %4x", m);
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}
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printf("\n");
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#endif
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free(ualloc, M_TEMP);
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}
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#ifdef DW780
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char ubasr_bits[] = UBASR_BITS;
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#endif
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#define spluba splbio /* IPL 17 */
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/*
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* Do transfer on device argument. The controller
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* and uba involved are implied by the device.
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* We queue for resource wait in the uba code if necessary.
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* We return 1 if the transfer was started, 0 if it was not.
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*
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* The onq argument must be zero iff the device is not on the
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* queue for this UBA. If onq is set, the device must be at the
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* head of the queue. In any case, if the transfer is started,
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* the device will be off the queue, and if not, it will be on.
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*
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* Drivers that allocate one BDP and hold it for some time should
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* set ud_keepbdp. In this case um_bdp tells which BDP is allocated
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* to the controller, unless it is zero, indicating that the controller
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* does not now have a BDP.
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*/
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ubaqueue(ui, onq)
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register struct uba_device *ui;
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int onq;
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{
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register struct uba_ctlr *um = ui->ui_mi;
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register struct uba_hd *uh;
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register struct uba_driver *ud;
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register int s, unit;
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uh = &uba_hd[um->um_ubanum];
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ud = um->um_driver;
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s = spluba();
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/*
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* Honor exclusive BDP use requests.
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*/
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if (ud->ud_xclu && uh->uh_users > 0 || uh->uh_xclu)
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goto rwait;
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if (ud->ud_keepbdp) {
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/*
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* First get just a BDP (though in fact it comes with
|
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* one map register too).
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*/
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if (um->um_bdp == 0) {
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um->um_bdp = uballoc(um->um_ubanum,
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(caddr_t)0, 0, UBA_NEEDBDP|UBA_CANTWAIT);
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if (um->um_bdp == 0)
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goto rwait;
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}
|
|
/* now share it with this transfer */
|
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um->um_ubinfo = ubasetup(um->um_ubanum,
|
|
um->um_tab.b_actf->b_actf,
|
|
um->um_bdp|UBA_HAVEBDP|UBA_CANTWAIT);
|
|
} else
|
|
um->um_ubinfo = ubasetup(um->um_ubanum,
|
|
um->um_tab.b_actf->b_actf, UBA_NEEDBDP|UBA_CANTWAIT);
|
|
if (um->um_ubinfo == 0)
|
|
goto rwait;
|
|
uh->uh_users++;
|
|
if (ud->ud_xclu)
|
|
uh->uh_xclu = 1;
|
|
splx(s);
|
|
if (ui->ui_dk >= 0) {
|
|
unit = ui->ui_dk;
|
|
dk_busy |= 1<<unit;
|
|
dk_xfer[unit]++;
|
|
dk_wds[unit] += um->um_tab.b_actf->b_actf->b_bcount>>6;
|
|
}
|
|
if (onq)
|
|
uh->uh_actf = ui->ui_forw;
|
|
(*ud->ud_dgo)(um);
|
|
return (1);
|
|
rwait:
|
|
if (!onq) {
|
|
ui->ui_forw = NULL;
|
|
if (uh->uh_actf == NULL)
|
|
uh->uh_actf = ui;
|
|
else
|
|
uh->uh_actl->ui_forw = ui;
|
|
uh->uh_actl = ui;
|
|
}
|
|
splx(s);
|
|
return (0);
|
|
}
|
|
|
|
ubadone(um)
|
|
register struct uba_ctlr *um;
|
|
{
|
|
register struct uba_hd *uh = &uba_hd[um->um_ubanum];
|
|
|
|
if (um->um_driver->ud_xclu)
|
|
uh->uh_xclu = 0;
|
|
uh->uh_users--;
|
|
if (um->um_driver->ud_keepbdp)
|
|
um->um_ubinfo &= ~BDPMASK; /* keep BDP for misers */
|
|
ubarelse(um->um_ubanum, &um->um_ubinfo);
|
|
}
|
|
|
|
/*
|
|
* Allocate and setup UBA map registers, and bdp's
|
|
* Flags says whether bdp is needed, whether the caller can't
|
|
* wait (e.g. if the caller is at interrupt level).
|
|
* Return value encodes map register plus page offset,
|
|
* bdp number and number of map registers.
|
|
*/
|
|
ubasetup(int uban,struct buf *bp,int flags) {
|
|
struct uba_hd *uh = &uba_hd[uban];
|
|
struct pte *pte, *io;
|
|
int npf;
|
|
int pfnum, temp;
|
|
int reg, bdp;
|
|
unsigned v;
|
|
struct proc *rp;
|
|
int a, o, ubinfo;
|
|
|
|
#ifdef DW730
|
|
if (uh->uh_type == DW730)
|
|
flags &= ~UBA_NEEDBDP;
|
|
#endif
|
|
#ifdef QBA
|
|
if (uh->uh_type == QBA)
|
|
flags &= ~UBA_NEEDBDP;
|
|
#endif
|
|
o = (int)bp->b_un.b_addr & PGOFSET;
|
|
npf = btoc(bp->b_bcount + o) + 1;
|
|
if (npf > UBA_MAXNMR)
|
|
panic("uba xfer too big");
|
|
a = spluba();
|
|
while ((reg = rmalloc(uh->uh_map, (long)npf)) == 0) {
|
|
if (flags & UBA_CANTWAIT) {
|
|
splx(a);
|
|
return (0);
|
|
}
|
|
uh->uh_mrwant++;
|
|
sleep((caddr_t)&uh->uh_mrwant, PSWP);
|
|
}
|
|
if ((flags & UBA_NEED16) && reg + npf > 128) {
|
|
/*
|
|
* Could hang around and try again (if we can ever succeed).
|
|
* Won't help any current device...
|
|
*/
|
|
rmfree(uh->uh_map, (long)npf, (long)reg);
|
|
splx(a);
|
|
return (0);
|
|
}
|
|
bdp = 0;
|
|
if (flags & UBA_NEEDBDP) {
|
|
while ((bdp = ffs((long)uh->uh_bdpfree)) == 0) {
|
|
if (flags & UBA_CANTWAIT) {
|
|
rmfree(uh->uh_map, (long)npf, (long)reg);
|
|
splx(a);
|
|
return (0);
|
|
}
|
|
uh->uh_bdpwant++;
|
|
sleep((caddr_t)&uh->uh_bdpwant, PSWP);
|
|
}
|
|
uh->uh_bdpfree &= ~(1 << (bdp-1));
|
|
} else if (flags & UBA_HAVEBDP)
|
|
bdp = (flags >> 28) & 0xf;
|
|
splx(a);
|
|
reg--;
|
|
ubinfo = UBAI_INFO(o, reg, npf, bdp);
|
|
temp = (bdp << 21) | UBAMR_MRV;
|
|
if (bdp && (o & 01))
|
|
temp |= UBAMR_BO;
|
|
if ((bp->b_flags & B_PHYS) == 0)
|
|
pte = (struct pte *)kvtopte(bp->b_un.b_addr);
|
|
else if (bp->b_flags & B_PAGET) {
|
|
panic("ubasetup: B_PAGET");
|
|
} else {
|
|
if( bp->b_flags&B_DIRTY){
|
|
rp=&pageproc[2];
|
|
panic("ubasetup: B_DIRTY");
|
|
} else {
|
|
rp =bp->b_proc;
|
|
}
|
|
v = vax_btop((u_int)bp->b_un.b_addr&0x3fffffff);
|
|
if (bp->b_flags & B_UAREA){
|
|
panic("ubasetup: B_UAREA");
|
|
} else {
|
|
/*
|
|
* It may be better to use pmap_extract() here somewhere,
|
|
* but so far we do it "the hard way" :)
|
|
*/
|
|
u_int *hej;
|
|
|
|
if(((u_int)bp->b_un.b_addr<0x40000000)||
|
|
((u_int)bp->b_un.b_addr>0x7fffffff)){
|
|
hej=rp->p_vmspace->vm_pmap.pm_pcb->P0BR;
|
|
} else {
|
|
hej=rp->p_vmspace->vm_pmap.pm_pcb->P1BR;
|
|
}
|
|
pte=(struct pte*)&hej[v];
|
|
}
|
|
}
|
|
io = &uh->uh_mr[reg];
|
|
while (--npf > 0) {
|
|
pfnum = pte->pg_pfn;
|
|
if (pfnum == 0)
|
|
panic("uba zero uentry");
|
|
pte++;
|
|
*(int *)io++ = pfnum | temp;
|
|
}
|
|
*(int *)io = 0;
|
|
return (ubinfo);
|
|
}
|
|
|
|
/*
|
|
* Non buffer setup interface... set up a buffer and call ubasetup.
|
|
*/
|
|
uballoc(int uban,caddr_t addr,int bcnt,int flags) {
|
|
struct buf ubabuf;
|
|
|
|
ubabuf.b_un.b_addr = addr;
|
|
ubabuf.b_flags = B_BUSY;
|
|
ubabuf.b_bcount = bcnt;
|
|
/* that's all the fields ubasetup() needs */
|
|
return (ubasetup(uban, &ubabuf, flags));
|
|
}
|
|
|
|
/*
|
|
* Release resources on uba uban, and then unblock resource waiters.
|
|
* The map register parameter is by value since we need to block
|
|
* against uba resets on 11/780's.
|
|
*/
|
|
ubarelse(uban, amr)
|
|
int *amr;
|
|
{
|
|
register struct uba_hd *uh = &uba_hd[uban];
|
|
register int bdp, reg, npf, s;
|
|
int mr;
|
|
|
|
/*
|
|
* Carefully see if we should release the space, since
|
|
* it may be released asynchronously at uba reset time.
|
|
*/
|
|
s = spluba();
|
|
mr = *amr;
|
|
if (mr == 0) {
|
|
/*
|
|
* A ubareset() occurred before we got around
|
|
* to releasing the space... no need to bother.
|
|
*/
|
|
splx(s);
|
|
return;
|
|
}
|
|
*amr = 0;
|
|
bdp = UBAI_BDP(mr);
|
|
if (bdp) {
|
|
switch (uh->uh_type) {
|
|
#ifdef DWBUA
|
|
case DWBUA:
|
|
BUA(uh->uh_uba)->bua_dpr[bdp] |= BUADPR_PURGE;
|
|
break;
|
|
#endif
|
|
#ifdef DW780
|
|
sdjhfgsadjkfhgasj
|
|
case DW780:
|
|
uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
|
|
break;
|
|
#endif
|
|
#ifdef DW750
|
|
case DW750:
|
|
uh->uh_uba->uba_dpr[bdp] |=
|
|
UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
|
|
break;
|
|
#endif
|
|
default:
|
|
break;
|
|
}
|
|
uh->uh_bdpfree |= 1 << (bdp-1); /* atomic */
|
|
if (uh->uh_bdpwant) {
|
|
uh->uh_bdpwant = 0;
|
|
wakeup((caddr_t)&uh->uh_bdpwant);
|
|
}
|
|
}
|
|
/*
|
|
* Put back the registers in the resource map.
|
|
* The map code must not be reentered,
|
|
* nor can the registers be freed twice.
|
|
* Unblock interrupts once this is done.
|
|
*/
|
|
npf = UBAI_NMR(mr);
|
|
reg = UBAI_MR(mr) + 1;
|
|
rmfree(uh->uh_map, (long)npf, (long)reg);
|
|
splx(s);
|
|
|
|
/*
|
|
* Wakeup sleepers for map registers,
|
|
* and also, if there are processes blocked in dgo(),
|
|
* give them a chance at the UNIBUS.
|
|
*/
|
|
if (uh->uh_mrwant) {
|
|
uh->uh_mrwant = 0;
|
|
wakeup((caddr_t)&uh->uh_mrwant);
|
|
}
|
|
while (uh->uh_actf && ubaqueue(uh->uh_actf, 1))
|
|
;
|
|
}
|
|
|
|
ubapurge(um)
|
|
register struct uba_ctlr *um;
|
|
{
|
|
register struct uba_hd *uh = um->um_hd;
|
|
register int bdp = UBAI_BDP(um->um_ubinfo);
|
|
|
|
switch (uh->uh_type) {
|
|
#ifdef DWBUA
|
|
case DWBUA:
|
|
BUA(uh->uh_uba)->bua_dpr[bdp] |= BUADPR_PURGE;
|
|
break;
|
|
#endif
|
|
#ifdef DW780
|
|
case DW780:
|
|
uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
|
|
break;
|
|
#endif
|
|
#ifdef DW750
|
|
case DW750:
|
|
uh->uh_uba->uba_dpr[bdp] |= UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
|
|
break;
|
|
#endif
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
ubainitmaps(uhp)
|
|
register struct uba_hd *uhp;
|
|
{
|
|
|
|
if (uhp->uh_memsize > UBA_MAXMR)
|
|
uhp->uh_memsize = UBA_MAXMR;
|
|
rminit(uhp->uh_map, (long)uhp->uh_memsize, (long)1, "uba", UAMSIZ);
|
|
switch (uhp->uh_type) {
|
|
#ifdef DWBUA
|
|
case DWBUA:
|
|
uhp->uh_bdpfree = (1<<NBDPBUA) - 1;
|
|
break;
|
|
#endif
|
|
#ifdef DW780
|
|
case DW780:
|
|
uhp->uh_bdpfree = (1<<NBDP780) - 1;
|
|
break;
|
|
#endif
|
|
#ifdef DW750
|
|
case DW750:
|
|
uhp->uh_bdpfree = (1<<NBDP750) - 1;
|
|
break;
|
|
#endif
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Generate a reset on uba number uban. Then
|
|
* call each device in the character device table,
|
|
* giving it a chance to clean up so as to be able to continue.
|
|
*/
|
|
ubareset(uban)
|
|
int uban;
|
|
{
|
|
register struct cdevsw *cdp;
|
|
register struct uba_hd *uh = &uba_hd[uban];
|
|
int s;
|
|
|
|
s = spluba();
|
|
uh->uh_users = 0;
|
|
uh->uh_zvcnt = 0;
|
|
uh->uh_xclu = 0;
|
|
uh->uh_actf = uh->uh_actl = 0;
|
|
uh->uh_bdpwant = 0;
|
|
uh->uh_mrwant = 0;
|
|
ubainitmaps(uh);
|
|
wakeup((caddr_t)&uh->uh_bdpwant);
|
|
wakeup((caddr_t)&uh->uh_mrwant);
|
|
printf("uba%d: reset", uban);
|
|
ubainit(uh->uh_uba);
|
|
ubameminit(uban);
|
|
/* XXX Intressant, vi m}ste l|sa det h{r med ubareset() p} n}t smart
|
|
* s{tt. En l{nkad lista som s{tts upp vid autoconfiggen? Kanske.
|
|
* N{r anv{nds dom? Jag vet faktiskt inte; det verkar vara en
|
|
* ren sm|rja den gamla koden. F}r peturba lite mer docs...
|
|
* 950428/Ragge
|
|
*/
|
|
/* for (cdp = cdevsw; cdp < cdevsw + nchrdev; cdp++)
|
|
(*cdp->d_reset)(uban);
|
|
ifubareset(uban);
|
|
*/
|
|
printf("\n");
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Init a uba. This is called with a pointer
|
|
* rather than a virtual address since it is called
|
|
* by code which runs with memory mapping disabled.
|
|
* In these cases we really don't need the interrupts
|
|
* enabled, but since we run with ipl high, we don't care
|
|
* if they are, they will never happen anyways.
|
|
* SHOULD GET POINTER TO UBA_HD INSTEAD OF UBA.
|
|
*/
|
|
ubainit(uba)
|
|
register struct uba_regs *uba;
|
|
{
|
|
register struct uba_hd *uhp;
|
|
#ifdef QBA
|
|
int isphys = 0;
|
|
#endif
|
|
|
|
for (uhp = uba_hd; uhp < uba_hd + numuba; uhp++) {
|
|
if (uhp->uh_uba == uba)
|
|
break;
|
|
if (uhp->uh_physuba == uba) {
|
|
#ifdef QBA
|
|
isphys++;
|
|
#endif
|
|
break;
|
|
}
|
|
}
|
|
if (uhp >= uba_hd + numuba) {
|
|
printf("init unknown uba\n");
|
|
return;
|
|
}
|
|
|
|
switch (uhp->uh_type) {
|
|
#ifdef DWBUA
|
|
case DWBUA:
|
|
BUA(uba)->bua_csr |= BUACSR_UPI;
|
|
/* give devices time to recover from power fail */
|
|
waitabit(500);
|
|
break;
|
|
#endif
|
|
#ifdef DW780
|
|
case DW780:
|
|
uba->uba_cr = UBACR_ADINIT;
|
|
uba->uba_cr = UBACR_IFS|UBACR_BRIE|UBACR_USEFIE|UBACR_SUEFIE;
|
|
while ((uba->uba_cnfgr & UBACNFGR_UBIC) == 0)
|
|
;
|
|
break;
|
|
#endif
|
|
#ifdef DW750
|
|
case DW750:
|
|
#endif
|
|
#ifdef DW730
|
|
case DW730:
|
|
#endif
|
|
#ifdef QBA
|
|
case QBA:
|
|
#endif
|
|
#if DW750 || DW730 || QBA
|
|
mtpr(0, PR_IUR);
|
|
/* give devices time to recover from power fail */
|
|
#if 0
|
|
/* THIS IS PROBABLY UNNECESSARY */
|
|
waitabit(50);
|
|
/* END PROBABLY UNNECESSARY */
|
|
#endif
|
|
#ifdef QBA
|
|
/*
|
|
* Re-enable local memory access
|
|
* from the Q-bus.
|
|
*/
|
|
if (uhp->uh_type == QBA) {
|
|
if (isphys)
|
|
*((char *)QIOPAGE630 + QIPCR) = Q_LMEAE;
|
|
else
|
|
*(uhp->uh_iopage + QIPCR) = Q_LMEAE;
|
|
}
|
|
#endif QBA
|
|
break;
|
|
#endif DW750 || DW730 || QBA
|
|
}
|
|
}
|
|
|
|
#ifdef QBA
|
|
/*
|
|
* Determine the interrupt priority of a Q-bus
|
|
* peripheral. The device probe routine must spl6(),
|
|
* attempt to make the device request an interrupt,
|
|
* delaying as necessary, then call this routine
|
|
* before resetting the device.
|
|
*/
|
|
qbgetpri()
|
|
{
|
|
int pri;
|
|
extern int cvec;
|
|
|
|
for (pri = 0x17; pri > 0x14; ) {
|
|
if (cvec && cvec != 0x200) /* interrupted at pri */
|
|
break;
|
|
pri--;
|
|
splx(pri - 1);
|
|
}
|
|
(void) spl0();
|
|
return (pri);
|
|
}
|
|
#endif
|
|
|
|
#ifdef DW780
|
|
int ubawedgecnt = 10;
|
|
int ubacrazy = 500;
|
|
int zvcnt_max = 5000; /* in 8 sec */
|
|
/*
|
|
* This routine is called by the locore code to process a UBA
|
|
* error on an 11/780 or 8600. The arguments are passed
|
|
* on the stack, and value-result (through some trickery).
|
|
* In particular, the uvec argument is used for further
|
|
* uba processing so the result aspect of it is very important.
|
|
* It must not be declared register.
|
|
*/
|
|
/*ARGSUSED*/
|
|
ubaerror(uban, uh, ipl, uvec, uba)
|
|
register int uban;
|
|
register struct uba_hd *uh;
|
|
int ipl, uvec;
|
|
register struct uba_regs *uba;
|
|
{
|
|
register sr, s;
|
|
|
|
if (uvec == 0) {
|
|
/*
|
|
* Declare dt as unsigned so that negative values
|
|
* are handled as >8 below, in case time was set back.
|
|
*/
|
|
u_long dt = time.tv_sec - uh->uh_zvtime;
|
|
|
|
uh->uh_zvtotal++;
|
|
if (dt > 8) {
|
|
uh->uh_zvtime = time.tv_sec;
|
|
uh->uh_zvcnt = 0;
|
|
}
|
|
if (++uh->uh_zvcnt > zvcnt_max) {
|
|
printf("uba%d: too many zero vectors (%d in <%d sec)\n",
|
|
uban, uh->uh_zvcnt, dt + 1);
|
|
printf("\tIPL 0x%x\n\tcnfgr: %b Adapter Code: 0x%x\n",
|
|
ipl, uba->uba_cnfgr&(~0xff), UBACNFGR_BITS,
|
|
uba->uba_cnfgr&0xff);
|
|
printf("\tsr: %b\n\tdcr: %x (MIC %sOK)\n",
|
|
uba->uba_sr, ubasr_bits, uba->uba_dcr,
|
|
(uba->uba_dcr&0x8000000)?"":"NOT ");
|
|
ubareset(uban);
|
|
}
|
|
return;
|
|
}
|
|
if (uba->uba_cnfgr & NEX_CFGFLT) {
|
|
printf("uba%d: sbi fault sr=%b cnfgr=%b\n",
|
|
uban, uba->uba_sr, ubasr_bits,
|
|
uba->uba_cnfgr, NEXFLT_BITS);
|
|
ubareset(uban);
|
|
uvec = 0;
|
|
return;
|
|
}
|
|
sr = uba->uba_sr;
|
|
s = spluba();
|
|
printf("uba%d: uba error sr=%b fmer=%x fubar=%o\n",
|
|
uban, uba->uba_sr, ubasr_bits, uba->uba_fmer, 4*uba->uba_fubar);
|
|
splx(s);
|
|
uba->uba_sr = sr;
|
|
uvec &= UBABRRVR_DIV;
|
|
if (++uh->uh_errcnt % ubawedgecnt == 0) {
|
|
if (uh->uh_errcnt > ubacrazy)
|
|
panic("uba crazy");
|
|
printf("ERROR LIMIT ");
|
|
ubareset(uban);
|
|
uvec = 0;
|
|
return;
|
|
}
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Look for devices with unibus memory, allow them to configure, then disable
|
|
* map registers as necessary. Called during autoconfiguration and ubareset.
|
|
* The device ubamem routine returns 0 on success, 1 on success if it is fully
|
|
* configured (has no csr or interrupt, so doesn't need to be probed),
|
|
* and -1 on failure.
|
|
*/
|
|
ubameminit(uban)
|
|
{
|
|
register struct uba_device *ui;
|
|
register struct uba_hd *uh = &uba_hd[uban];
|
|
caddr_t umembase = Tumem(uban) + 0x3e000, addr;
|
|
#define ubaoff(off) ((int)(off) & 0x1fff)
|
|
|
|
uh->uh_lastmem = 0;
|
|
for (ui = ubdinit; ui->ui_driver; ui++) {
|
|
if (ui->ui_ubanum != uban && ui->ui_ubanum != '?')
|
|
continue;
|
|
if (ui->ui_driver->ud_ubamem) {
|
|
/*
|
|
* During autoconfiguration, need to fudge ui_addr.
|
|
*/
|
|
addr = ui->ui_addr;
|
|
ui->ui_addr = umembase + ubaoff(addr);
|
|
switch ((*ui->ui_driver->ud_ubamem)(ui, uban)) {
|
|
case 1:
|
|
ui->ui_alive = 1;
|
|
/* FALLTHROUGH */
|
|
case 0:
|
|
ui->ui_ubanum = uban;
|
|
break;
|
|
}
|
|
ui->ui_addr = addr;
|
|
}
|
|
}
|
|
#ifdef DW780
|
|
jdhfgsjdkfhgsdjkfghak
|
|
/*
|
|
* On a DW780, throw away any map registers disabled by rounding
|
|
* the map disable in the configuration register
|
|
* up to the next 8K boundary, or below the last unibus memory.
|
|
*/
|
|
if (uh->uh_type == DW780) {
|
|
register i;
|
|
|
|
i = vax_btop(((uh->uh_lastmem + 8191) / 8192) * 8192);
|
|
while (i)
|
|
(void) rmget(uh->uh_map, 1, i--);
|
|
}
|
|
#endif
|
|
}
|
|
|
|
rmget(){
|
|
showstate(curproc);
|
|
panic("rmget() not implemented. (in uba.c)");
|
|
}
|
|
|
|
/*
|
|
* Allocate UNIBUS memory. Allocates and initializes
|
|
* sufficient mapping registers for access. On a 780,
|
|
* the configuration register is setup to disable UBA
|
|
* response on DMA transfers to addresses controlled
|
|
* by the disabled mapping registers.
|
|
* On a DW780, should only be called from ubameminit, or in ascending order
|
|
* from 0 with 8K-sized and -aligned addresses; freeing memory that isn't
|
|
* the last unibus memory would free unusable map registers.
|
|
* Doalloc is 1 to allocate, 0 to deallocate.
|
|
*/
|
|
ubamem(uban, addr, npg, doalloc)
|
|
int uban, addr, npg, doalloc;
|
|
{
|
|
register struct uba_hd *uh = &uba_hd[uban];
|
|
register int a;
|
|
int s;
|
|
|
|
a = (addr >> 9) + 1;
|
|
s = spluba();
|
|
if (doalloc)
|
|
a = rmget(uh->uh_map, npg, a);
|
|
else
|
|
rmfree(uh->uh_map, (long)npg, (long)a);
|
|
splx(s);
|
|
if (a) {
|
|
register int i, *m;
|
|
|
|
m = (int *)&uh->uh_mr[a - 1];
|
|
for (i = 0; i < npg; i++)
|
|
*m++ = 0; /* All off, especially 'valid' */
|
|
i = addr + npg * 512;
|
|
if (doalloc && i > uh->uh_lastmem)
|
|
uh->uh_lastmem = i;
|
|
else if (doalloc == 0 && i == uh->uh_lastmem)
|
|
uh->uh_lastmem = addr;
|
|
#ifdef DW780
|
|
/*
|
|
* On a 780, set up the map register disable
|
|
* field in the configuration register. Beware
|
|
* of callers that request memory ``out of order''
|
|
* or in sections other than 8K multiples.
|
|
* Ubameminit handles such requests properly, however.
|
|
*/
|
|
if (uh->uh_type == DW780) {
|
|
i = uh->uh_uba->uba_cr &~ 0x7c000000;
|
|
i |= ((uh->uh_lastmem + 8191) / 8192) << 26;
|
|
uh->uh_uba->uba_cr = i;
|
|
}
|
|
#endif
|
|
}
|
|
return (a);
|
|
}
|
|
|
|
#include "ik.h"
|
|
#include "vs.h"
|
|
#if NIK > 0 || NVS > 0
|
|
/*
|
|
* Map a virtual address into users address space. Actually all we
|
|
* do is turn on the user mode write protection bits for the particular
|
|
* page of memory involved.
|
|
*/
|
|
maptouser(vaddress)
|
|
caddr_t vaddress;
|
|
{
|
|
|
|
kvtopte(vaddress)->pg_prot = (PG_UW >> 27);
|
|
}
|
|
|
|
unmaptouser(vaddress)
|
|
caddr_t vaddress;
|
|
{
|
|
|
|
kvtopte(vaddress)->pg_prot = (PG_KW >> 27);
|
|
}
|
|
#endif
|
|
|
|
resuba()
|
|
{
|
|
showstate(curproc);
|
|
panic("resuba");
|
|
}
|
|
|
|
int
|
|
uba_match(parent, cf, aux)
|
|
struct device *parent;
|
|
struct cfdata *cf;
|
|
void *aux;
|
|
{
|
|
struct sbi_attach_args *sa=(struct sbi_attach_args *)aux;
|
|
extern int numuba;
|
|
int ubanr;
|
|
|
|
#if VAX630
|
|
/*
|
|
* The MicroVAXII always has a single QBA.
|
|
*/
|
|
if (cpu_type == VAX_630)
|
|
if (numuba == 0)
|
|
return 1;
|
|
else
|
|
return 0;
|
|
#endif
|
|
if(numuba) return 0;
|
|
if((cf->cf_loc[0]!=sa->nexnum)&&(cf->cf_loc[0]>-1))
|
|
return 0; /* UBA doesn't match spec's */
|
|
|
|
switch(sa->type){
|
|
case NEX_UBA0:
|
|
case NEX_UBA1:
|
|
case NEX_UBA2:
|
|
case NEX_UBA3:
|
|
return 1;
|
|
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
void
|
|
uba_attach(parent, self, aux)
|
|
struct device *parent, *self;
|
|
void *aux;
|
|
{
|
|
struct sbi_attach_args *sa=(struct sbi_attach_args *)aux;
|
|
extern struct uba_hd uba_hd[];
|
|
struct uba_regs *ubar=(struct uba_regs *)sa->nexaddr;
|
|
struct uba_hd *uhp = &uba_hd[numuba];
|
|
void ubascan();
|
|
|
|
printf("\n");
|
|
switch (cpunumber) {
|
|
#if VAX750
|
|
case VAX_750:
|
|
uhp->uh_mr = (void *)ubar->uba_map;
|
|
uhp->uh_type = DW750;
|
|
uhp->uh_uba = (void*)ubar;
|
|
uhp->uh_physuba = (void*)0xf20000+sa->nexnum*0x2000;
|
|
uhp->uh_memsize = UBAPAGES;
|
|
uhp->uh_mem = Tumem(numuba);
|
|
uhp->uh_iopage = Tumem(numuba) + (uhp->uh_memsize * NBPG);
|
|
ioaccess(UMEM750(numuba), UMEMmap[numuba], (UBAPAGES+UBAIOPAGES)*NBPG);
|
|
/* Now everything should be set up (I hope...) */
|
|
#ifdef notyet
|
|
config_scan(ubascan,self);
|
|
|
|
#else
|
|
unifind(uhp, UMEM750(numuba) + (uhp->uh_memsize * NBPG));
|
|
#endif
|
|
break;
|
|
#endif
|
|
#if VAX630 || VAX410
|
|
case VAX_78032:
|
|
switch (cpu_type) {
|
|
#if VAX630
|
|
case VAX_630:
|
|
uhp->uh_mr = (void *)sa->nexaddr;
|
|
uhp->uh_type = QBA;
|
|
uhp->uh_uba = (void*)ubar;
|
|
uhp->uh_physuba = (void*)QBAMAP630;
|
|
uhp->uh_memsize = QBAPAGES;
|
|
uhp->uh_mem = Numem;
|
|
uhp->uh_iopage = Numem + (uhp->uh_memsize * NBPG);
|
|
|
|
/*
|
|
* For the MicroVAXII, the qbus address space is not contiguous
|
|
* in physical address space. I also map the page that has the
|
|
* memory error registers and the watch chip here and init them,
|
|
* for want of a better place to do it.
|
|
*/
|
|
ioaccess(QMEM630, UMEMmap[0], QBAPAGES * NBPG);
|
|
ioaccess(QIOPAGE630, UMEMmap[0] + QBAPAGES, UBAIOPAGES * NBPG);
|
|
ioaccess(UVAXIICPU, UMEMmap[0] + QBAPAGES + UBAIOPAGES, NBPG);
|
|
uvaxIIcpu_ptr =
|
|
(struct uvaxIIcpu *)(Numem+(QBAPAGES+UBAIOPAGES)*NBPG);
|
|
ioaccess(KA630CLK,UMEMmap[0] + QBAPAGES + UBAIOPAGES + 1,NBPG);
|
|
ka630clk_ptr =
|
|
(struct ka630clock *)(Numem+(QBAPAGES+UBAIOPAGES+1)*NBPG);
|
|
|
|
/*
|
|
* Clear restart and boot in progress flags in the CPMBX.
|
|
*/
|
|
ka630clk_ptr->cpmbx = (ka630clk_ptr->cpmbx & KA630CLK_LANG);
|
|
|
|
/*
|
|
* Enable memory parity error detection and clear error bits.
|
|
*/
|
|
uvaxIIcpu_ptr->uvaxII_mser = (UVAXIIMSER_PEN|UVAXIIMSER_MERR|
|
|
UVAXIIMSER_LEB);
|
|
|
|
/*
|
|
* Now that QBus space is mapped, set the local memory external
|
|
* access enable.
|
|
*/
|
|
*((u_short *)(uhp->uh_iopage + QIPCR)) = Q_LMEAE;
|
|
/* Now everything should be set up (I hope...) */
|
|
#ifdef notyet
|
|
config_scan(ubascan,self);
|
|
|
|
#else
|
|
unifind(uhp, QIOPAGE630);
|
|
#endif
|
|
break;
|
|
#endif
|
|
};
|
|
break;
|
|
#endif
|
|
};
|
|
numuba++;
|
|
}
|
|
|
|
|
|
|
|
struct cfdriver ubacd=
|
|
{ NULL, "uba", uba_match, uba_attach, DV_CPU, sizeof(struct device),1,0};
|
|
|
|
|
|
|