76 lines
1.7 KiB
Plaintext
76 lines
1.7 KiB
Plaintext
# $NetBSD: SIMULATOR,v 1.12 2006/08/12 15:29:53 christos Exp $
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# NetBSD/sh5 on the simple `chess' based simulator.
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#
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# This won't get to single-user, but it serves as a useful way to debug
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# startup code.
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include "arch/evbsh5/conf/std.evbsh5.el"
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maxusers 2
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options INCLUDE_CONFIG_FILE
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options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
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options SH5_SIM
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options KERNEL_IPT_SIZE=0x8000
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options SH5_CPU_SPEED=10
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#ident "SIMULATOR-$Revision: 1.12 $"
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# Uncomment this to build a 64-bit kernel
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#makeoptions SH5_ABI=64
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makeoptions DEFCOPTS="-g"
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makeoptions DEBUG="-g"
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options DIAGNOSTIC
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options DEBUG
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options DDB
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options KTRACE # system call tracing via ktrace(1)
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#options SYSTRACE # system call vetting via systrace(1)
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file-system FFS
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file-system KERNFS
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file-system MFS
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options FFS_NO_SNAPSHOT # No FFS snapshot support
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options INET
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config netbsd root on ? type ?
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pseudo-device loop
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pseudo-device bpfilter
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pseudo-device pty
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pseudo-device rnd
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# The mainbus to which all devices attach
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mainbus0 at root
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#
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# The SuperHyway bus is the main interconnect between the constituent
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# "modules" which make up an SH-5 system
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#
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superhyway0 at mainbus0
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#
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# Only the CPU and a cut-down Peripheral Bridge module exists on the simulator.
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#
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cpu0 at superhyway0 pport 0x0d # A single CPU
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pbridge0 at superhyway0 pport 0x09 # Peripheral Bridge
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#
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# The simulated Peripheral Bridge has the following devices:
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#
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cprc0 at pbridge0 # Clock, Power & Reset Control
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intc0 at pbridge0 # Interrupt controller
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tmu0 at pbridge0 ipl 14 intevt 0x400 # Timer
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rtc0 at pbridge0 # Battery-backed Date/Time chip
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clock0 at cprc0 # Primary clock generator
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#
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# The DTF debug interface.
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#
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dtfcons0 at mainbus0
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