NetBSD/sys/arch/x68k/include/cpu.h

222 lines
6.6 KiB
C

/* $NetBSD: cpu.h,v 1.9 1998/08/22 14:38:38 minoura Exp $ */
/*
* Copyright (c) 1988 University of Utah.
* Copyright (c) 1982, 1990, 1993
* The Regents of the University of California. All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: Utah $Hdr: cpu.h 1.16 91/03/25$
*
* @(#)cpu.h 8.4 (Berkeley) 1/5/94
*/
#ifndef _X68K_CPU_H_
#define _X68K_CPU_H_
/*
* Exported definitions unique to x68k/68k cpu support.
*/
/*
* Get common m68k CPU definitions.
*/
#include <m68k/cpu.h>
#define M68K_MMU_MOTOROLA
/*
* definitions of cpu-dependent requirements
* referenced in generic code
*/
#define cpu_swapin(p) /* nothing */
#define cpu_wait(p) /* nothing */
#define cpu_swapout(p) /* nothing */
/*
* Arguments to hardclock and gatherstats encapsulate the previous
* machine state in an opaque clockframe. One the x68k, we use
* what the hardware pushes on an interrupt (frame format 0).
*/
struct clockframe {
u_short sr; /* sr at time of interrupt */
u_long pc; /* pc at time of interrupt */
u_short vo; /* vector offset (4-word frame) */
};
#define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
#define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
#define CLKF_PC(framep) ((framep)->pc)
#if 0
/* We would like to do it this way... */
#define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
#else
/* but until we start using PSL_M, we have to do this instead */
#define CLKF_INTR(framep) (0) /* XXX */
#endif
/*
* Preempt the current process if in interrupt from user mode,
* or after the current trap/syscall if in system mode.
*/
extern int want_resched; /* resched() was called */
#define need_resched() { want_resched++; aston(); }
/*
* Give a profiling tick to the current process when the user profiling
* buffer pages are invalid. On the x68k, request an ast to send us
* through trap, marking the proc as needing a profiling tick.
*/
#define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
/*
* Notify the current process (p) that it has a signal pending,
* process as soon as possible.
*/
#define signotify(p) aston()
extern int astpending; /* need to trap before returning to user mode */
#define aston() (astpending++)
/*
* simulated software interrupt register
*/
extern unsigned char ssir;
#define SIR_NET 0x1
#define SIR_CLOCK 0x2
#define SIR_SERIAL 0x4
#define SIR_KBD 0x8
#define siroff(x) ssir &= ~(x)
#define setsoftnet() ssir |= SIR_NET
#define setsoftclock() ssir |= SIR_CLOCK
#define setsoftserial() ssir |= SIR_SERIAL
#define setsoftkbd() ssir |= SIR_KBD
/*
* CTL_MACHDEP definitions.
*/
#define CPU_CONSDEV 1 /* dev_t: console terminal device */
#define CPU_MAXID 2 /* number of valid machdep ids */
#define CTL_MACHDEP_NAMES { \
{ 0, 0 }, \
{ "console_device", CTLTYPE_STRUCT }, \
}
/*
* The rest of this should probably be moved to ../x68k/x68kcpu.h,
* although some of it could probably be put into generic 68k headers.
*/
/* values for cpuspeed (not really related to clock speed due to caches) */
#define MHZ_8 1
#define MHZ_16 2
#define MHZ_25 3
#define MHZ_33 4
#define MHZ_50 6
#ifdef _KERNEL
extern int machineid;
extern char *intiolimit;
/* autoconf.c functions */
void configure __P((void));
void config_console __P((void));
/* fpu.c functions */
int fpu_probe __P((void));
/* machdep.c functions */
void dumpconf __P((void));
void dumpsys __P((void));
/* locore.s functions */
struct pcb;
struct fpframe;
void savectx __P((struct pcb *));
void switch_exit __P((struct proc *));
void proc_trampoline __P((void));
void loadustp __P((int));
void m68881_save __P((struct fpframe *));
void m68881_restore __P((struct fpframe *));
void DCIS __P((void));
void DCIU __P((void));
void ICIA __P((void));
void ICPA __P((void));
void PCIA __P((void));
void TBIA __P((void));
void TBIS __P((vaddr_t));
void TBIAS __P((void));
void TBIAU __P((void));
#if defined(M68040) || defined(M68060)
void DCFA __P((void));
void DCFP __P((vaddr_t));
void DCFL __P((vaddr_t));
void DCPL __P((vaddr_t));
void DCPP __P((vaddr_t));
void ICPL __P((vaddr_t));
void ICPP __P((vaddr_t));
#endif
/* sys_machdep.c functions */
int cachectl __P((int, caddr_t, int));
int dma_cachectl __P((caddr_t, int));
/* vm_machdep.c functions */
void physaccess __P((caddr_t, caddr_t, int, int));
void physunaccess __P((caddr_t, int));
int kvtop __P((caddr_t));
#endif
/* physical memory sections */
#define INTIOBASE (0x00C00000)
#define INTIOTOP (0x01000000)
/*
* Internal IO space:
*
* Ranges from 0xC00000 to 0x1000000 (IIOMAPSIZE).
*
* Internal IO space is mapped in the kernel from ``IODEVbase'' to
* ``intiolimit'' (defined in locore.s). Since it is always mapped,
* conversion between physical and kernel virtual addresses is easy.
*/
#define IIOPOFF(pa) ((int)(pa)-INTIOBASE)
#define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 4mb */
#endif /* _X68K_CPU_H_ */