524 lines
12 KiB
C
524 lines
12 KiB
C
/* $NetBSD: cpu.c,v 1.11 1997/02/04 06:30:57 mark Exp $ */
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/*
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* Copyright (c) 1995 Mark Brinicombe.
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* Copyright (c) 1995 Brini.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* cpu.c
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*
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* Probing and configuration for the master cpu
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*
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* Created : 10/10/95
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/conf.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <vm/vm_kern.h>
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#include <machine/bootconfig.h>
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#include <machine/io.h>
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#include <machine/conf.h>
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#include <machine/katelib.h>
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#include <machine/cpu.h>
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#include <machine/cpus.h>
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#include <machine/undefined.h>
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#include "cpu.h"
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#if NCPU != 1
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#error Need 1 CPU configured
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#endif
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/* Array of cpu structures, one per possible cpu */
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cpu_t cpus[MAX_CPUS];
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char cpu_model[48];
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extern int cpu_ctrl; /* Control bits for boot CPU */
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volatile int undefined_test; /* Used for FPA test */
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/* Declare prototypes */
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/* Prototypes */
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void identify_master_cpu __P((int cpu_number, char *dev_name));
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void identify_arm_cpu __P((int cpu_number));
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void identify_arm_fpu __P((int cpu_number));
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extern int initialise_arm_fpe __P((cpu_t *cpu));
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extern int initialise_fpe __P((cpu_t *cpu));
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/*
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* int cpumatch(struct device *parent, void *match, void *aux)
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*
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* Probe for the main cpu. Currently all this does is return 1 to
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* indicate that the cpu was found.
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*/
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int
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cpumatch(parent, match, aux)
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struct device *parent;
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void *match;
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void *aux;
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{
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struct device *dev = match;
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if (dev->dv_unit == 0)
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return(1);
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return(0);
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}
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/*
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* void cpusattach(struct device *parent, struct device *dev, void *aux)
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*
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* Attach the main cpu
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*/
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void
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cpuattach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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int loop;
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for (loop = 0; loop < MAX_CPUS; ++loop)
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bzero(&cpus[loop], sizeof(cpu_t));
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identify_master_cpu(CPU_MASTER, self->dv_xname);
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}
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struct cfattach cpu_ca = {
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sizeof(struct cpu_softc), cpumatch, cpuattach
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};
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struct cfdriver cpu_cd = {
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NULL, "cpu", DV_DULL, 1
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};
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/*
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* Used to test for an FPA. The following function is installed as a coproc1
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* handler on the undefined instruction vector and then we issue a FPA
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* instruction. If undefined_test is non zero then the FPA did not handle
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* the instruction so must be absent.
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*/
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int
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fpa_test(address, instruction, frame)
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u_int address;
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u_int instruction;
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trapframe_t *frame;
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{
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++undefined_test;
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return(0);
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}
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/*
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* If an FPA was found then this function is installed as the coproc1 handler
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* on the undefined instruction vector. Currently we don't support FPA's
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* so this just triggers an exception.
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*/
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int
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fpa_handler(address, instruction, frame, fault_code)
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u_int address;
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u_int instruction;
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trapframe_t *frame;
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int fault_code;
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{
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u_int fpsr;
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__asm __volatile("stmfd sp!, {r0}; .word 0xee300110; mov %0, r0; ldmfd sp!, {r0}" : "=r" (fpsr));
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printf("FPA exception: fpsr = %08x\n", fpsr);
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return(1);
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}
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/*
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* Identify the master (boot) CPU
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* This also probes for an FPU and will install an FPE if necessary
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*/
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void
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identify_master_cpu(cpu_number, dev_name)
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int cpu_number;
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char *dev_name;
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{
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u_int fpsr;
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cpus[cpu_number].cpu_class = CPU_CLASS_ARM;
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cpus[cpu_number].cpu_host = CPU_HOST_MAINBUS;
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cpus[cpu_number].cpu_flags = CPU_FLAG_PRESENT;
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cpus[cpu_number].cpu_ctrl = cpu_ctrl;
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/* Get the cpu ID from coprocessor 15 */
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cpus[cpu_number].cpu_id = cpu_id();
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identify_arm_cpu(cpu_number);
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strcpy(cpu_model, cpus[cpu_number].cpu_model);
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if (cpus[CPU_MASTER].cpu_class == CPU_CLASS_SARM
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&& (cpus[CPU_MASTER].cpu_id & CPU_ID_REVISION_MASK) < 3) {
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printf("%s: SA-110 with bugged STM^ instruction\n", dev_name);
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}
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/*
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* Ok now we test for an FPA
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* At this point no floating point emulator has been installed.
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* This means any FP instruction will cause undefined exception.
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* We install a temporay coproc 1 handler which will modify undefined_test
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* if it is called.
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* We then try to read the FP status register. If undefined_test has been
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* decremented then the instruction was not handled by an FPA so we know
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* the FPA is missing. If undefined_test is still 1 then we know the
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* instruction was handled by an FPA.
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* We then remove our test handler and look at the
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* FP status register for identification.
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*/
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install_coproc_handler(FP_COPROC, fpa_test);
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undefined_test = 0;
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__asm __volatile("stmfd sp!, {r0}; .word 0xee300110; mov %0, r0; ldmfd sp!, {r0}" : "=r" (fpsr));
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if (undefined_test == 0) {
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cpus[cpu_number].fpu_type = (fpsr >> 24);
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switch (fpsr >> 24) {
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case 0x81 :
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cpus[cpu_number].fpu_class = FPU_CLASS_FPA;
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break;
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default :
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cpus[cpu_number].fpu_class = FPU_CLASS_FPU;
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break;
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}
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cpus[cpu_number].fpu_flags = 0;
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install_coproc_handler(FP_COPROC, fpa_handler);
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} else {
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cpus[cpu_number].fpu_class = FPU_CLASS_NONE;
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cpus[cpu_number].fpu_flags = 0;
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/*
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* Ok if ARMFPE is defined and the boot options request the ARM FPE then
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* it will be installed as the FPE. If the installation fails the existing
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* FPE is used as a fall back.
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* If either ARMFPE is not defined or the boot args did not request it the
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* old FPE is installed.
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* This is just while I work on integrating the new FPE.
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* It means the new FPE gets installed if compiled int (ARMFPE defined)
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* and also gives me a on/off option when I boot in case the new FPE is
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* causing panics.
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* In all cases it falls back on the existing FPE is the ARMFPE was not
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* successfully installed.
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*/
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#ifdef ARMFPE
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if (boot_args) {
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char *ptr;
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ptr = strstr(boot_args, "noarmfpe");
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if (!ptr) {
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if (initialise_arm_fpe(&cpus[cpu_number]) != 0) {
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identify_arm_fpu(cpu_number);
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#ifdef FPE
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initialise_fpe(&cpus[cpu_number]);
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#endif
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}
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#ifdef FPE
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} else
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initialise_fpe(&cpus[cpu_number]);
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} else
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initialise_fpe(&cpus[cpu_number]);
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#else
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}
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}
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#endif
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#else
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#ifdef FPE
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initialise_fpe(&cpus[cpu_number]);
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#else
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#error No FPE built in
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#endif
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#endif
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}
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identify_arm_fpu(cpu_number);
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}
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/*
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* Report the type of the specifed arm processor. This uses the generic and
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* arm specific information in the cpu structure to identify the processor.
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* The remaining fields in the cpu structure are filled in appropriately.
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*/
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void
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identify_arm_cpu(cpu_number)
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int cpu_number;
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{
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cpu_t *cpu;
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u_int cpuid;
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cpu = &cpus[cpu_number];
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if (cpu->cpu_host == CPU_HOST_NONE || cpu->cpu_class == CPU_CLASS_NONE) {
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printf("No installed processor\n");
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return;
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}
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if (cpu->cpu_class != CPU_CLASS_ARM && cpu->cpu_class != CPU_CLASS_SARM) {
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printf("identify_arm_cpu: Can only identify ARM CPU's\n");
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return;
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}
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cpuid = cpu->cpu_id;
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if (cpuid == 0) {
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printf("Processor failed probe - no CPU ID\n");
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return;
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}
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/* if ((cpuid & CPU_ID_DESIGNER_MASK) != CPU_ID_ARM_LTD)
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printf("Unrecognised designer ID = %08x\n", cpuid);*/
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switch (cpuid & CPU_ID_CPU_MASK) {
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case ID_ARM610:
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cpu->cpu_type = cpuid & CPU_ID_CPU_MASK;
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break;
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case ID_ARM710 :
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case ID_ARM700 :
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cpu->cpu_type = (cpuid & CPU_ID_CPU_MASK) >> 4;
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break;
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case ID_ARM810 :
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cpu->cpu_type = (cpuid & CPU_ID_CPU_MASK) >> 4;
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break;
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case ID_SA110 :
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cpu->cpu_type = (cpuid & CPU_ID_CPU_MASK) >> 4;
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cpu->cpu_class = CPU_CLASS_SARM;
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sprintf(cpu->cpu_model, "SA-110 rev %d",
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cpuid & CPU_ID_REVISION_MASK);
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break;
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default :
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printf("Unrecognised processor ID = %08x\n", cpuid);
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cpu->cpu_type = cpuid & CPU_ID_CPU_MASK;
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break;
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}
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if (cpu->cpu_class == CPU_CLASS_ARM) {
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sprintf(cpu->cpu_model, "ARM%x rev %d", cpu->cpu_type,
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cpuid & CPU_ID_REVISION_MASK);
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if ((cpu->cpu_ctrl & CPU_CONTROL_IDC_ENABLE) == 0)
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strcat(cpu->cpu_model, " IDC disabled");
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else
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strcat(cpu->cpu_model, " IDC enabled");
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} else if (cpu->cpu_class == CPU_CLASS_SARM) {
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if ((cpu->cpu_ctrl & CPU_CONTROL_DC_ENABLE) == 0)
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strcat(cpu->cpu_model, " DC disabled");
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else
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strcat(cpu->cpu_model, " DC enabled");
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if ((cpu->cpu_ctrl & CPU_CONTROL_IC_ENABLE) == 0)
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strcat(cpu->cpu_model, " IC disabled");
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else
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strcat(cpu->cpu_model, " IC enabled");
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}
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if ((cpu->cpu_ctrl & CPU_CONTROL_WBUF_ENABLE) == 0)
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strcat(cpu->cpu_model, " WB disabled");
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else
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strcat(cpu->cpu_model, " WB enabled");
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if (cpu->cpu_ctrl & CPU_CONTROL_LABT_ENABLE)
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strcat(cpu->cpu_model, " LABT");
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else
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strcat(cpu->cpu_model, " EABT");
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/* Print the info */
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printf(": %s\n", cpu->cpu_model);
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}
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/*
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* Report the type of the specifed arm fpu. This uses the generic and arm
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* specific information in the cpu structure to identify the fpu. The
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* remaining fields in the cpu structure are filled in appropriately.
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*/
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void
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identify_arm_fpu(cpu_number)
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int cpu_number;
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{
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cpu_t *cpu;
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cpu = &cpus[cpu_number];
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if (cpu->cpu_host == CPU_HOST_NONE || cpu->cpu_class == CPU_CLASS_NONE) {
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printf("No installed processor\n");
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return;
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}
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if (cpu->cpu_class != CPU_CLASS_ARM && cpu->cpu_class != CPU_CLASS_SARM) {
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printf("identify_arm_cpu: Can only identify ARM hosted FPUs\n");
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return;
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}
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/* Now for the FP info */
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switch (cpu->fpu_class) {
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case FPU_CLASS_NONE :
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strcpy(cpu->fpu_model, "None");
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break;
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case FPU_CLASS_FPE :
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printf("fpe%d at cpu%d: %s\n", cpu_number, cpu_number,
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cpu->fpu_model);
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printf("fpe%d: no hardware found\n", cpu_number);
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break;
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case FPU_CLASS_FPA :
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printf("fpe%d at cpu%d: %s\n", cpu_number, cpu_number,
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cpu->fpu_model);
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if (cpu->fpu_type == FPU_TYPE_FPA11) {
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strcpy(cpu->fpu_model, "FPA11");
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printf("fpe%d: FPA11 found\n", cpu_number);
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} else {
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strcpy(cpu->fpu_model, "FPA");
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printf("fpe%d: FPA10 found\n", cpu_number);
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}
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if ((cpu->fpu_flags & 4) == 0)
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strcat(cpu->fpu_model, "");
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else
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strcat(cpu->fpu_model, " clk/2");
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break;
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case FPU_CLASS_FPU :
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sprintf(cpu->fpu_model, "Unknown FPU (ID=%02x)\n",
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cpu->fpu_type);
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printf("fpu%d at cpu%d: %s\n", cpu_number, cpu_number,
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cpu->fpu_model);
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break;
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}
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}
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int
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cpuopen(dev, flag, mode, p)
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dev_t dev;
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int flag;
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int mode;
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struct proc *p;
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{
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struct cpu_softc *sc;
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int unit;
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int s;
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unit = minor(dev);
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if (unit >= cpu_cd.cd_ndevs)
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return(ENXIO);
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sc = cpu_cd.cd_devs[unit];
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if (!sc) return(ENXIO);
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s = splhigh();
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if (sc->sc_open) {
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(void)splx(s);
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return(EBUSY);
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}
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++sc->sc_open;
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(void)splx(s);
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return(0);
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}
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int
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cpuclose(dev, flag, mode, p)
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dev_t dev;
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int flag;
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int mode;
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struct proc *p;
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{
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struct cpu_softc *sc;
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int unit;
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int s;
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unit = minor(dev);
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sc = cpu_cd.cd_devs[unit];
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if (sc->sc_open == 0) return(ENXIO);
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s = splhigh();
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--sc->sc_open;
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(void)splx(s);
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return(0);
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}
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int
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cpuioctl(dev, cmd, data, flag, p)
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dev_t dev;
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u_long cmd;
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caddr_t data;
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int flag;
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struct proc *p;
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{
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struct cpu_softc *sc;
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int unit;
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unit = minor(dev);
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sc = cpu_cd.cd_devs[unit];
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switch (cmd) {
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default:
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return(ENXIO);
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break;
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}
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return(0);
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}
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/* End of cpu.c */
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