766 lines
20 KiB
C
766 lines
20 KiB
C
/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
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* $Id: isa.c,v 1.37 1994/03/01 18:16:33 mycroft Exp $
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*/
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/*
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* code to manage AT bus
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*
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* 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
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* Fixed uninitialized variable problem and added code to deal
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* with DMA page boundaries in isa_dmarangecheck(). Fixed word
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* mode DMA count compution and reorganized DMA setup code in
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* isa_dmastart()
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/buf.h>
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#include <sys/uio.h>
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#include <sys/syslog.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <machine/segments.h>
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#include <machine/pio.h>
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#include <machine/cpufunc.h>
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#include <i386/isa/isa_device.h>
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#include <i386/isa/isa.h>
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#include <i386/isa/icu.h>
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#include <i386/isa/ic/i8237.h>
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#include <i386/isa/ic/i8042.h>
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#include <i386/isa/timerreg.h>
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#include <i386/isa/spkr_reg.h>
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/* sorry, has to be here, no place else really suitable */
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#include <machine/pc/display.h>
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u_short *Crtat = (u_short *)MONO_BUF;
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/*
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** Register definitions for DMA controller 1 (channels 0..3):
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*/
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#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
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#define DMA1_SR (IO_DMA1 + 1*8) /* status register */
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#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
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#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
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#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
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/*
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** Register definitions for DMA controller 2 (channels 4..7):
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*/
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#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
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#define DMA2_SR (IO_DMA2 + 2*8) /* status register */
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#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
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#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
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#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
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int config_isadev(struct isa_device *, u_int *);
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void config_attach(struct isa_driver *, struct isa_device *);
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static void sysbeepstop(int);
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/*
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* Configure all ISA devices
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*/
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void
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isa_configure()
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{
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struct isa_device *dvp;
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struct isa_driver *dp;
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splhigh();
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INTREN(IRQ_SLAVE);
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enable_intr();
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for (dvp = isa_devtab_tty; config_isadev(dvp, &ttymask); dvp++)
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;
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for (dvp = isa_devtab_bio; config_isadev(dvp, &biomask); dvp++)
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;
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for (dvp = isa_devtab_net; config_isadev(dvp, &netmask); dvp++)
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;
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for (dvp = isa_devtab_null; config_isadev(dvp, (u_int *) NULL); dvp++)
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;
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printf("biomask %x ttymask %x netmask %x\n",
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biomask, ttymask, netmask);
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clockmask |= astmask;
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biomask |= astmask;
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ttymask |= astmask;
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netmask |= astmask;
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impmask = netmask | ttymask;
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spl0();
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}
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/*
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* Configure an ISA device.
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*/
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int
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config_isadev(isdp, mp)
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struct isa_device *isdp;
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u_int *mp;
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{
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struct isa_driver *dp;
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if (dp = isdp->id_driver) {
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if (isdp->id_maddr) {
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extern u_int atdevbase;
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isdp->id_maddr -= 0xa0000; /* XXX should be a define */
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isdp->id_maddr += atdevbase;
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}
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isdp->id_alive = (*dp->probe)(isdp);
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if (isdp->id_irq == (u_short)-1)
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isdp->id_alive = 0;
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/*
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* Only print the I/O address range if id_alive != -1
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* Right now this is a temporary fix just for the new
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* NPX code so that if it finds a 486 that can use trap
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* 16 it will not report I/O addresses.
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* Rod Grimes 04/26/94
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*
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* XXX -- cgd
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*/
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if (isdp->id_alive) {
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printf("%s%d", dp->name, isdp->id_unit);
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if (isdp->id_iobase) {
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printf(" at 0x%x", isdp->id_iobase);
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if ((isdp->id_iobase + isdp->id_alive - 1) !=
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isdp->id_iobase)
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printf("-0x%x", isdp->id_iobase +
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isdp->id_alive - 1);
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}
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if (isdp->id_irq != 0)
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printf(" irq %d", ffs(isdp->id_irq)-1);
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if (isdp->id_drq != -1)
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printf(" drq %d", isdp->id_drq);
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if (isdp->id_maddr != 0)
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printf(" maddr 0x%x", kvtop(isdp->id_maddr));
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if (isdp->id_msize != 0)
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printf("-0x%x", kvtop(isdp->id_maddr) +
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isdp->id_msize - 1);
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if (isdp->id_flags != 0)
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printf(" flags 0x%x", isdp->id_flags);
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printf(" on isa\n");
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config_attach(dp, isdp);
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if (isdp->id_irq) {
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int intrno;
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intrno = ffs(isdp->id_irq)-1;
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setidt(ICU_OFFSET+intrno, isdp->id_intr,
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SDT_SYS386IGT, SEL_KPL);
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if(mp)
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INTRMASK(*mp,isdp->id_irq);
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INTREN(isdp->id_irq);
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}
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}
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return (1);
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} else return(0);
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}
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void
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config_attach(struct isa_driver *dp, struct isa_device *isdp)
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{
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extern struct isa_device isa_subdev[];
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struct isa_device *dvp;
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if(isdp->id_masunit==-1) {
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(void)(*dp->attach)(isdp);
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return;
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}
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if(isdp->id_masunit==0) {
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for(dvp = isa_subdev; dvp->id_driver; dvp++) {
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if (dvp->id_driver != dp)
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continue;
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if (dvp->id_masunit != isdp->id_unit)
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continue;
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if (dvp->id_physid == -1)
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continue;
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dvp->id_alive = (*dp->attach)(dvp);
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}
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for(dvp = isa_subdev; dvp->id_driver; dvp++) {
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if (dvp->id_driver != dp)
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continue;
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if (dvp->id_masunit != isdp->id_unit)
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continue;
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if (dvp->id_physid != -1)
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continue;
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dvp->id_alive = (*dp->attach)(dvp);
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}
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return;
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}
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printf("id_masunit has weird value\n");
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}
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#define IDTVEC(name) __CONCAT(X,name)
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/* default interrupt vector table entries */
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extern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3),
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IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7),
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IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11),
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IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15);
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static *defvec[16] = {
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&IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
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&IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
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&IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
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&IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) };
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/* out of range default interrupt vector gate entry */
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extern IDTVEC(intrdefault);
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/*
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* Fill in default interrupt table (in case of spuruious interrupt
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* during configuration of kernel, setup interrupt control unit
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*/
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void
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isa_defaultirq() {
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int i;
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/* icu vectors */
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for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++)
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setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL);
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/* out of range vectors */
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for (i = NRSVIDT; i < NIDT; i++)
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setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL);
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/* initialize 8259's */
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outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
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outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+1, 1); /* 8086 mode */
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#endif
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outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
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outb(IO_ICU1, 0x0a); /* default to IRR on read */
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#ifdef REORDER_IRQ
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outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
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#endif
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outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */
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outb(IO_ICU2+1,2); /* my slave id is 2 */
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#ifdef AUTO_EOI_2
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outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU2+1,1); /* 8086 mode */
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#endif
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outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
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outb(IO_ICU2, 0x0a); /* default to IRR on read */
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}
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/* region of physical memory known to be contiguous */
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vm_offset_t isaphysmem;
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static caddr_t dma_bounce[8]; /* XXX */
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static char bounced[8]; /* XXX */
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#define MAXDMASZ 512 /* XXX */
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/* high byte of address is stored in this port for i-th dma channel */
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static short dmapageport[8] =
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{ 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
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/*
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* isa_dmacascade(): program 8237 DMA controller channel to accept
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* external dma control by a board.
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*/
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void
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isa_dmacascade(chan)
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int chan;
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{
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#ifdef DIAGNOSTIC
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if (chan < 0 || chan > 7)
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panic("isa_dmacascade: impossible request");
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#endif
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/* set dma channel mode, and set dma channel mode */
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if ((chan & 4) == 0) {
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outb(DMA1_MODE, DMA37MD_CASCADE | chan);
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outb(DMA1_SMSK, chan);
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} else {
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outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
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outb(DMA2_SMSK, chan & 3);
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}
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}
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/*
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* isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
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* problems by using a bounce buffer.
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*/
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void
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isa_dmastart(flags, addr, nbytes, chan)
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int flags;
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caddr_t addr;
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vm_size_t nbytes;
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int chan;
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{
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vm_offset_t phys;
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int waport;
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caddr_t newaddr;
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#ifdef DIAGNOSTIC
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if (chan < 0 || chan > 7 ||
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((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) :
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(nbytes >= (1<<16))))
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panic("isa_dmastart: impossible request");
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#endif
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if (isa_dmarangecheck(addr, nbytes, chan)) {
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if (dma_bounce[chan] == 0)
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dma_bounce[chan] =
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/*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
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(caddr_t) isaphysmem + NBPG*chan;
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bounced[chan] = 1;
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newaddr = dma_bounce[chan];
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*(int *) newaddr = 0; /* XXX */
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/* copy bounce buffer on write */
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if ((flags & B_READ) == 0)
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bcopy(addr, newaddr, nbytes);
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addr = newaddr;
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}
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/* translate to physical */
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phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
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if ((chan & 4) == 0) {
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/*
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* Program one of DMA channels 0..3. These are
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* byte mode channels.
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*/
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/* set dma channel mode, and reset address ff */
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if (flags & B_READ)
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outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_WRITE);
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else
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outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_READ);
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outb(DMA1_FFC, 0);
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/* send start address */
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waport = DMA1_CHN(chan);
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outb(waport, phys);
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outb(waport, phys>>8);
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outb(dmapageport[chan], phys>>16);
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/* send count */
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outb(waport + 1, --nbytes);
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outb(waport + 1, nbytes>>8);
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/* unmask channel */
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outb(DMA1_SMSK, chan | DMA37SM_CLEAR);
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} else {
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/*
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* Program one of DMA channels 4..7. These are
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* word mode channels.
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*/
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/* set dma channel mode, and reset address ff */
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if (flags & B_READ)
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outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_WRITE);
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else
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outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_READ);
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outb(DMA2_FFC, 0);
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/* send start address */
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waport = DMA2_CHN(chan & 3);
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outb(waport, phys>>1);
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outb(waport, phys>>9);
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outb(dmapageport[chan], phys>>16);
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/* send count */
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nbytes >>= 1;
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outb(waport + 2, --nbytes);
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outb(waport + 2, nbytes>>8);
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/* unmask channel */
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outb(DMA2_SMSK, (chan & 3) | DMA37SM_CLEAR);
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}
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}
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void
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isa_dmadone(flags, addr, nbytes, chan)
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int flags;
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caddr_t addr;
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vm_size_t nbytes;
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int chan;
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{
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u_char tc;
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#ifdef DIAGNOSTIC
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if (chan < 0 || chan > 7)
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panic("isa_dmadone: impossible request");
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#endif
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/* check that the terminal count was reached */
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if ((chan & 4) == 0)
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tc = inb(DMA1_SR) & (1 << chan);
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else
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tc = inb(DMA2_SR) & (1 << (chan & 3));
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if (tc == 0)
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/* XXX probably should panic or something */
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log(LOG_ERR, "dma channel %d not finished\n", chan);
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/* copy bounce buffer on read */
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if (bounced[chan]) {
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bcopy(dma_bounce[chan], addr, nbytes);
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bounced[chan] = 0;
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}
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/* mask channel */
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if ((chan & 4) == 0)
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outb(DMA1_SMSK, DMA37SM_SET | chan);
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else
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outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
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}
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/*
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* Check for problems with the address range of a DMA transfer
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* (non-contiguous physical pages, outside of bus address space,
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* crossing DMA page boundaries).
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* Return true if special handling needed.
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*/
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int
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isa_dmarangecheck(va, length, chan)
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vm_offset_t va;
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u_long length;
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int chan;
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{
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vm_offset_t phys, priorpage = 0, endva;
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u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
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endva = round_page(va + length);
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for (; va < endva ; va += NBPG) {
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phys = trunc_page(pmap_extract(pmap_kernel(), va));
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if (phys == 0)
|
|
panic("isa_dmacheck: no physical page present");
|
|
if (phys >= (1<<24))
|
|
return 1;
|
|
if (priorpage) {
|
|
if (priorpage + NBPG != phys)
|
|
return 1;
|
|
/* check if crossing a DMA page boundary */
|
|
if ((priorpage ^ phys) & dma_pgmsk)
|
|
return 1;
|
|
}
|
|
priorpage = phys;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/* head of queue waiting for physmem to become available */
|
|
struct buf isa_physmemq;
|
|
|
|
/* blocked waiting for resource to become free for exclusive use */
|
|
static isaphysmemflag;
|
|
/* if waited for and call requested when free (B_CALL) */
|
|
static void (*isaphysmemunblock)(); /* needs to be a list */
|
|
|
|
/*
|
|
* Allocate contiguous physical memory for transfer, returning
|
|
* a *virtual* address to region. May block waiting for resource.
|
|
* (assumed to be called at splbio())
|
|
*/
|
|
caddr_t
|
|
isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
|
|
|
|
isaphysmemunblock = func;
|
|
while (isaphysmemflag & B_BUSY) {
|
|
isaphysmemflag |= B_WANTED;
|
|
sleep((caddr_t)&isaphysmemflag, PRIBIO);
|
|
}
|
|
isaphysmemflag |= B_BUSY;
|
|
|
|
return((caddr_t)isaphysmem);
|
|
}
|
|
|
|
/*
|
|
* Free contiguous physical memory used for transfer.
|
|
* (assumed to be called at splbio())
|
|
*/
|
|
void
|
|
isa_freephysmem(caddr_t va, unsigned length) {
|
|
|
|
isaphysmemflag &= ~B_BUSY;
|
|
if (isaphysmemflag & B_WANTED) {
|
|
isaphysmemflag &= B_WANTED;
|
|
wakeup((caddr_t)&isaphysmemflag);
|
|
if (isaphysmemunblock)
|
|
(*isaphysmemunblock)();
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Handle a NMI, possibly a machine check.
|
|
* return true to panic system, false to ignore.
|
|
*/
|
|
int
|
|
isa_nmi(cd) {
|
|
|
|
log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70));
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* Caught a stray interrupt, notify
|
|
*/
|
|
void
|
|
isa_strayintr(d) {
|
|
|
|
/* DON'T BOTHER FOR NOW! */
|
|
/* for some reason, we get bursts of intr #7, even if not enabled! */
|
|
/*
|
|
* Well the reason you got bursts of intr #7 is because someone
|
|
* raised an interrupt line and dropped it before the 8259 could
|
|
* prioritize it. This is documented in the intel data book. This
|
|
* means you have BAD hardware! I have changed this so that only
|
|
* the first 5 get logged, then it quits logging them, and puts
|
|
* out a special message. rgrimes 3/25/1993
|
|
*/
|
|
extern u_long intrcnt_stray;
|
|
|
|
intrcnt_stray++;
|
|
if (intrcnt_stray <= 5)
|
|
log(LOG_ERR,"ISA strayintr %x\n", d);
|
|
if (intrcnt_stray == 5)
|
|
log(LOG_CRIT,"Too many ISA strayintr not logging any more\n");
|
|
}
|
|
|
|
/*
|
|
* Wait "n" microseconds.
|
|
* Relies on timer 1 counting down from (TIMER_FREQ / hz) at
|
|
* (1 * TIMER_FREQ) Hz.
|
|
* Note: timer had better have been programmed before this is first used!
|
|
* (Note that we use `rate generator' mode, which counts at 1:1; `square
|
|
* wave' mode counts at 2:1).
|
|
*/
|
|
#define CF (1 * TIMER_FREQ)
|
|
|
|
extern int hz; /* XXX - should be elsewhere */
|
|
|
|
void
|
|
DELAY(n)
|
|
int n;
|
|
{
|
|
int counter_limit;
|
|
int prev_tick;
|
|
int tick;
|
|
int ticks_left;
|
|
int sec;
|
|
int usec;
|
|
|
|
#ifdef DELAYDEBUG
|
|
int gettick_calls = 1;
|
|
int n1;
|
|
static int state = 0;
|
|
|
|
if (state == 0) {
|
|
state = 1;
|
|
for (n1 = 1; n1 <= 10000000; n1 *= 10)
|
|
DELAY(n1);
|
|
state = 2;
|
|
}
|
|
if (state == 1)
|
|
printf("DELAY(%d)...", n);
|
|
#endif
|
|
|
|
/*
|
|
* Read the counter first, so that the rest of the setup overhead is
|
|
* counted. Guess the initial overhead is 20 usec (on most systems it
|
|
* takes about 1.5 usec for each of the i/o's in gettick(). The loop
|
|
* takes about 6 usec on a 486/33 and 13 usec on a 386/20. The
|
|
* multiplications and divisions to scale the count take a while).
|
|
*/
|
|
prev_tick = gettick();
|
|
n -= 20;
|
|
|
|
/*
|
|
* Calculate (n * (CF / 1e6)) without using floating point and without
|
|
* any avoidable overflows.
|
|
*/
|
|
sec = n / 1000000;
|
|
usec = n - sec * 1000000;
|
|
ticks_left = sec * CF
|
|
+ usec * (CF / 1000000)
|
|
+ usec * ((CF % 1000000) / 1000) / 1000
|
|
+ usec * (CF % 1000) / 1000000;
|
|
|
|
counter_limit = TIMER_FREQ / hz;
|
|
while (ticks_left > 0) {
|
|
tick = gettick();
|
|
#ifdef DELAYDEBUG
|
|
++gettick_calls;
|
|
#endif
|
|
if (tick > prev_tick)
|
|
ticks_left -= prev_tick - (tick - counter_limit);
|
|
else
|
|
ticks_left -= prev_tick - tick;
|
|
prev_tick = tick;
|
|
}
|
|
#ifdef DELAYDEBUG
|
|
if (state == 1)
|
|
printf(" %d calls to gettick() at %d usec each\n",
|
|
gettick_calls, (n + 5) / gettick_calls);
|
|
#endif
|
|
}
|
|
|
|
int
|
|
gettick() {
|
|
int high;
|
|
int low;
|
|
|
|
/*
|
|
* Protect ourself against interrupts.
|
|
*/
|
|
disable_intr();
|
|
/*
|
|
* Latch the count for 'timer' (cc00xxxx, c = counter, x = any).
|
|
*/
|
|
outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
|
|
low = inb(TIMER_CNTR0);
|
|
high = inb(TIMER_CNTR0);
|
|
enable_intr();
|
|
return ((high << 8) | low);
|
|
}
|
|
|
|
static beeping;
|
|
static void
|
|
sysbeepstop(int f)
|
|
{
|
|
int s = splhigh();
|
|
|
|
/* disable counter 2 */
|
|
disable_intr();
|
|
outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR);
|
|
enable_intr();
|
|
if (f)
|
|
timeout((timeout_t)sysbeepstop, (caddr_t)0, f);
|
|
else
|
|
beeping = 0;
|
|
|
|
splx(s);
|
|
}
|
|
|
|
void
|
|
sysbeep(int pitch, int period)
|
|
{
|
|
int s = splhigh();
|
|
static int last_pitch, last_period;
|
|
|
|
if (beeping) {
|
|
untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2));
|
|
untimeout((timeout_t)sysbeepstop, (caddr_t)0);
|
|
}
|
|
if (!beeping || last_pitch != pitch) {
|
|
/*
|
|
* XXX - move timer stuff to clock.c.
|
|
*/
|
|
disable_intr();
|
|
outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE);
|
|
outb(TIMER_CNTR2, TIMER_DIV(pitch)%256);
|
|
outb(TIMER_CNTR2, TIMER_DIV(pitch)/256);
|
|
outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */
|
|
enable_intr();
|
|
}
|
|
last_pitch = pitch;
|
|
beeping = last_period = period;
|
|
timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period);
|
|
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Pass command to keyboard controller (8042)
|
|
*/
|
|
unsigned
|
|
kbc_8042cmd(int val)
|
|
{
|
|
while (inb(KBSTATP)&KBS_IBF);
|
|
if (val) outb(KBCMDP, val);
|
|
while (inb(KBSTATP)&KBS_IBF);
|
|
return (inb(KBDATAP));
|
|
}
|
|
|
|
/*
|
|
* find an ISA device in a given isa_devtab_* table, given
|
|
* the table to search, the expected id_driver entry, and the unit number.
|
|
*
|
|
* this function is defined in isa_device.h, and this location is debatable;
|
|
* i put it there because it's useless w/o, and directly operates on
|
|
* the other stuff in that file.
|
|
*
|
|
*/
|
|
|
|
struct isa_device *find_isadev(table, driverp, unit)
|
|
struct isa_device *table;
|
|
struct isa_driver *driverp;
|
|
int unit;
|
|
{
|
|
if (driverp == NULL) /* sanity check */
|
|
return NULL;
|
|
|
|
while ((table->id_driver != driverp) || (table->id_unit != unit)) {
|
|
if (table->id_driver == 0)
|
|
return NULL;
|
|
|
|
table++;
|
|
}
|
|
|
|
return table;
|
|
}
|
|
|
|
/*
|
|
* Return nonzero if a (masked) irq is pending for a given device.
|
|
*/
|
|
int
|
|
isa_irq_pending(dvp)
|
|
struct isa_device *dvp;
|
|
{
|
|
unsigned id_irq;
|
|
|
|
id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */
|
|
if (id_irq & 0xff)
|
|
return (inb(IO_ICU1) & id_irq);
|
|
return (inb(IO_ICU2) & (id_irq >> 8));
|
|
}
|