75 lines
2.9 KiB
C
75 lines
2.9 KiB
C
/* $NetBSD: vrpciureg.h,v 1.1 2001/06/13 07:32:48 enami Exp $ */
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/*-
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* Copyright (c) 2001 Enami Tsugutomo.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#define VRPCIU_BASE 0x0f000c00 /* vr4122 */
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/*
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* Master Memory/IO Address Window.
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*/
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#define VRPCIU_MMAW1REG 0x0000
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#define VRPCIU_MMAW2REG 0x0004
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#define VRPCIU_MIOAWREG 0x0010
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#define VRPCIU_MAW_IBAMASK 0xff000000 /* Internal Bus Base Address */
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#define VRPCIU_MAW_ADDRMASK(reg) \
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((((reg) >> 13) & 0x7f) << 24) /* Address Mask */
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#define VRPCIU_MAW_ADDR(reg) \
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(((reg) & VRPCIU_MAW_IBAMASK) & VRPCIU_MAW_ADDRMASK(reg))
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#define VRPCIU_MAW_SIZE(reg) (~(VRPCIU_MAW_ADDRMASK(reg) | 0x80000000))
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#define VRPCIU_MAW_WINEN (1 << 12) /* PCI access is enabled */
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#define VRPCIU_MAW_PCIADDR(reg) (((reg) & 0xff) << 24) /* PCI Address */
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#define VRPCIU_MAW(start, size) /* XXX */
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/*
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* Target Address Window.
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*/
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#define VRPCIU_TAW1REG 0x0008
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#define VRPCIU_TAW2REG 0x000c
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#define VRPCIU_TAW_ADDRMASK(reg) \
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((((reg) >> 13) & 0x7f) << 21) /* Address Mask */
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#define VRPCIU_TAW_WINEN (1 << 12) /* PCI access is enabled */
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#define VRPCIU_TAW_IBA(reg) (((reg) & 0x7ff) << 21) /* Internal Bus Address */
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#define VRPCIU_CONFDREG 0x0014
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#define VRPCIU_CONFAREG 0x0018
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#define VRPCIU_MAILREG 0x001c
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#define VRPCIU_BUSERRADREG 0x0024
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#define VRPCIU_INTCNTSTAREG 0x0028
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#define VRPCIU_EXACCREG 0x002c
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#define VRPCIU_RECONTREG 0x0030
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#define VRPCIU_ENREG 0x0034
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#define VRPCIU_CLKSELREG 0x0038
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#define VRPCIU_TRDYVREG 0x003c
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#define VRPCIU_CLKRUNREG 0x0060
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#define VRPCIU_CONF_TYPE1 0x1
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#define VRPCIU_CONF_BASE (0x0f000d00 - VRPCIU_BASE)
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#define VRPCIU_CONF_MAILREG 0x10
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#define VRPCIU_CONF_MBA1REG 0x14
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#define VRPCIU_CONF_MBA2REG 0x18
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