518 lines
14 KiB
C
518 lines
14 KiB
C
/* $NetBSD: nfsmb.c,v 1.21 2010/05/08 07:41:44 pgoyette Exp $ */
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/*
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* Copyright (c) 2007 KIYOHARA Takashi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: nfsmb.c,v 1.21 2010/05/08 07:41:44 pgoyette Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/errno.h>
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#include <sys/kernel.h>
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#include <sys/rwlock.h>
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#include <sys/proc.h>
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#include <sys/bus.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/nfsmbreg.h>
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struct nfsmbc_attach_args {
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int nfsmb_num;
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bus_space_tag_t nfsmb_iot;
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int nfsmb_addr;
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};
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struct nfsmb_softc;
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struct nfsmbc_softc {
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device_t sc_dev;
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_tag;
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struct pci_attach_args *sc_pa;
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bus_space_tag_t sc_iot;
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device_t sc_nfsmb[2];
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};
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struct nfsmb_softc {
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device_t sc_dev;
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int sc_num;
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device_t sc_nfsmbc;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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struct i2c_controller sc_i2c; /* i2c controller info */
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krwlock_t sc_rwlock;
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};
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static int nfsmbc_match(device_t, cfdata_t, void *);
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static void nfsmbc_attach(device_t, device_t, void *);
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static int nfsmbc_print(void *, const char *);
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static int nfsmb_match(device_t, cfdata_t, void *);
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static void nfsmb_attach(device_t, device_t, void *);
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static int nfsmb_acquire_bus(void *, int);
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static void nfsmb_release_bus(void *, int);
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static int nfsmb_exec(
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void *, i2c_op_t, i2c_addr_t, const void *, size_t, void *, size_t, int);
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static int nfsmb_check_done(struct nfsmb_softc *);
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static int
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nfsmb_send_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
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static int nfsmb_write_1(
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struct nfsmb_softc *, uint8_t, uint8_t, i2c_addr_t, i2c_op_t, int);
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static int nfsmb_write_2(
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struct nfsmb_softc *, uint8_t, uint16_t, i2c_addr_t, i2c_op_t, int);
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static int nfsmb_receive_1(struct nfsmb_softc *, i2c_addr_t, i2c_op_t, int);
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static int
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nfsmb_read_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
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static int
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nfsmb_read_2(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
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static int
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nfsmb_quick(struct nfsmb_softc *, i2c_addr_t, i2c_op_t, int);
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CFATTACH_DECL_NEW(nfsmbc, sizeof(struct nfsmbc_softc),
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nfsmbc_match, nfsmbc_attach, NULL, NULL);
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static int
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nfsmbc_match(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) {
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
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case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
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case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
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case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
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case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
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case PCI_PRODUCT_NVIDIA_NFORCE430_SMBUS:
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case PCI_PRODUCT_NVIDIA_MCP04_SMBUS:
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case PCI_PRODUCT_NVIDIA_MCP55_SMB:
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case PCI_PRODUCT_NVIDIA_MCP61_SMB:
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case PCI_PRODUCT_NVIDIA_MCP65_SMB:
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case PCI_PRODUCT_NVIDIA_MCP67_SMB:
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case PCI_PRODUCT_NVIDIA_MCP73_SMB:
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case PCI_PRODUCT_NVIDIA_MCP78S_SMB:
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case PCI_PRODUCT_NVIDIA_MCP79_SMB:
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return 1;
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}
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}
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return 0;
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}
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static void
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nfsmbc_attach(device_t parent, device_t self, void *aux)
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{
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struct nfsmbc_softc *sc = device_private(self);
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struct pci_attach_args *pa = aux;
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struct nfsmbc_attach_args nfsmbca;
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pcireg_t reg;
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int baseregs[2];
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char devinfo[256];
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aprint_naive("\n");
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
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aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
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PCI_REVISION(pa->pa_class));
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sc->sc_dev = self;
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sc->sc_pc = pa->pa_pc;
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sc->sc_tag = pa->pa_tag;
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sc->sc_pa = pa;
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sc->sc_iot = pa->pa_iot;
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nfsmbca.nfsmb_iot = sc->sc_iot;
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
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case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
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case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
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case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
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case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
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baseregs[0] = NFORCE_OLD_SMB1;
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baseregs[1] = NFORCE_OLD_SMB2;
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break;
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default:
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baseregs[0] = NFORCE_SMB1;
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baseregs[1] = NFORCE_SMB2;
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break;
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}
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, baseregs[0]);
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nfsmbca.nfsmb_num = 1;
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nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
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sc->sc_nfsmb[0] = config_found(sc->sc_dev, &nfsmbca, nfsmbc_print);
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, baseregs[1]);
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nfsmbca.nfsmb_num = 2;
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nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
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sc->sc_nfsmb[1] = config_found(sc->sc_dev, &nfsmbca, nfsmbc_print);
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/* This driver is similar to an ISA bridge that doesn't
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* need any special handling. So registering NULL handlers
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* are sufficent. */
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if (!pmf_device_register(self, NULL, NULL))
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aprint_error_dev(self, "couldn't establish power handler\n");
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}
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static int
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nfsmbc_print(void *aux, const char *pnp)
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{
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struct nfsmbc_attach_args *nfsmbcap = aux;
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if (pnp)
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aprint_normal("nfsmb SMBus %d at %s",
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nfsmbcap->nfsmb_num, pnp);
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else
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aprint_normal(" SMBus %d", nfsmbcap->nfsmb_num);
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return UNCONF;
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}
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CFATTACH_DECL_NEW(nfsmb, sizeof(struct nfsmb_softc),
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nfsmb_match, nfsmb_attach, NULL, NULL);
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static int
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nfsmb_match(device_t parent, cfdata_t match, void *aux)
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{
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struct nfsmbc_attach_args *nfsmbcap = aux;
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if (nfsmbcap->nfsmb_num == 1 || nfsmbcap->nfsmb_num == 2)
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return 1;
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return 0;
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}
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static void
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nfsmb_attach(device_t parent, device_t self, void *aux)
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{
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struct nfsmb_softc *sc = device_private(self);
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struct nfsmbc_attach_args *nfsmbcap = aux;
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struct i2cbus_attach_args iba;
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aprint_naive("\n");
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aprint_normal("\n");
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sc->sc_dev = self;
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sc->sc_nfsmbc = parent;
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sc->sc_num = nfsmbcap->nfsmb_num;
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sc->sc_iot = nfsmbcap->nfsmb_iot;
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/* register with iic */
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sc->sc_i2c.ic_cookie = sc;
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sc->sc_i2c.ic_acquire_bus = nfsmb_acquire_bus;
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sc->sc_i2c.ic_release_bus = nfsmb_release_bus;
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sc->sc_i2c.ic_send_start = NULL;
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sc->sc_i2c.ic_send_stop = NULL;
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sc->sc_i2c.ic_initiate_xfer = NULL;
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sc->sc_i2c.ic_read_byte = NULL;
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sc->sc_i2c.ic_write_byte = NULL;
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sc->sc_i2c.ic_exec = nfsmb_exec;
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rw_init(&sc->sc_rwlock);
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if (bus_space_map(sc->sc_iot, nfsmbcap->nfsmb_addr, NFORCE_SMBSIZE, 0,
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&sc->sc_ioh) != 0) {
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aprint_error_dev(self, "failed to map SMBus space\n");
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return;
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}
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iba.iba_type = I2C_TYPE_SMBUS;
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iba.iba_tag = &sc->sc_i2c;
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(void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
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/* This driver is similar to an ISA bridge that doesn't
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* need any special handling. So registering NULL handlers
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* are sufficent. */
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if (!pmf_device_register(self, NULL, NULL))
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aprint_error_dev(self, "couldn't establish power handler\n");
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}
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static int
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nfsmb_acquire_bus(void *cookie, int flags)
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{
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struct nfsmb_softc *sc = cookie;
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rw_enter(&sc->sc_rwlock, RW_WRITER);
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return 0;
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}
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static void
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nfsmb_release_bus(void *cookie, int flags)
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{
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struct nfsmb_softc *sc = cookie;
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rw_exit(&sc->sc_rwlock);
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}
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static int
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nfsmb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *cmd,
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size_t cmdlen, void *vbuf, size_t buflen, int flags)
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{
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struct nfsmb_softc *sc = (struct nfsmb_softc *)cookie;
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uint8_t *p = vbuf;
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int rv;
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if ((cmdlen == 0) && (buflen == 0)) {
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return nfsmb_quick(sc, addr, op, flags);
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}
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if (I2C_OP_READ_P(op) && (cmdlen == 0) && (buflen == 1)) {
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rv = nfsmb_receive_1(sc, addr, op, flags);
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if (rv == -1)
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return -1;
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*p = (uint8_t)rv;
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return 0;
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}
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if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 1)) {
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rv = nfsmb_read_1(sc, *(const uint8_t*)cmd, addr, op, flags);
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if (rv == -1)
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return -1;
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*p = (uint8_t)rv;
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return 0;
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}
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if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 2)) {
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rv = nfsmb_read_2(sc, *(const uint8_t*)cmd, addr, op, flags);
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if (rv == -1)
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return -1;
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*(uint16_t *)p = (uint16_t)rv;
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return 0;
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}
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if ((I2C_OP_WRITE_P(op)) && (cmdlen == 0) && (buflen == 1))
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return nfsmb_send_1(sc, *(uint8_t*)vbuf, addr, op, flags);
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if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 1))
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return nfsmb_write_1(sc, *(const uint8_t*)cmd, *(uint8_t*)vbuf,
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addr, op, flags);
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if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 2))
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return nfsmb_write_2(sc,
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*(const uint8_t*)cmd, *((uint16_t *)vbuf), addr, op, flags);
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return -1;
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}
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static int
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nfsmb_check_done(struct nfsmb_softc *sc)
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{
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int us;
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uint8_t stat;
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us = 10 * 1000; /* XXXX: wait maximum 10 msec */
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do {
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delay(10);
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us -= 10;
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if (us <= 0)
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return -1;
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} while (bus_space_read_1(sc->sc_iot, sc->sc_ioh,
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NFORCE_SMB_PROTOCOL) != 0);
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stat = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_STATUS);
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if ((stat & NFORCE_SMB_STATUS_DONE) &&
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!(stat & NFORCE_SMB_STATUS_STATUS))
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return 0;
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return -1;
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}
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/* ARGSUSED */
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static int
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nfsmb_quick(struct nfsmb_softc *sc, i2c_addr_t addr, i2c_op_t op, int flags)
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{
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uint8_t data;
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/* write smbus slave address to register */
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data = addr << 1;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
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/* write smbus protocol to register */
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data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_QUICK;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
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return nfsmb_check_done(sc);
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}
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/* ARGSUSED */
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static int
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nfsmb_send_1(struct nfsmb_softc *sc, uint8_t val, i2c_addr_t addr, i2c_op_t op,
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int flags)
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{
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uint8_t data;
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/* store cmd */
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, val);
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/* write smbus slave address to register */
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data = addr << 1;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
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/* write smbus protocol to register */
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data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
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return nfsmb_check_done(sc);
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}
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/* ARGSUSED */
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static int
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nfsmb_write_1(struct nfsmb_softc *sc, uint8_t cmd, uint8_t val, i2c_addr_t addr,
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i2c_op_t op, int flags)
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{
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uint8_t data;
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/* store cmd */
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
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/* store data */
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, val);
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/* write smbus slave address to register */
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data = addr << 1;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
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/* write smbus protocol to register */
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data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
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return nfsmb_check_done(sc);
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}
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static int
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nfsmb_write_2(struct nfsmb_softc *sc, uint8_t cmd, uint16_t val,
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i2c_addr_t addr, i2c_op_t op, int flags)
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{
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uint8_t data, low, high;
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/* store cmd */
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
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/* store data */
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low = val;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, low);
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high = val >> 8;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA + 1, high);
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/* write smbus slave address to register */
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data = addr << 1;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
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/* write smbus protocol to register */
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data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_WORD_DATA;
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if (flags & I2C_F_PEC)
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data |= NFORCE_SMB_PROTOCOL_PEC;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
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return nfsmb_check_done(sc);
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}
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/* ARGSUSED */
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static int
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nfsmb_receive_1(struct nfsmb_softc *sc, i2c_addr_t addr, i2c_op_t op, int flags)
|
|
{
|
|
uint8_t data;
|
|
|
|
/* write smbus slave address to register */
|
|
data = addr << 1;
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
|
|
|
|
/* write smbus protocol to register */
|
|
data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
|
|
|
|
/* check for errors */
|
|
if (nfsmb_check_done(sc) < 0)
|
|
return -1;
|
|
|
|
/* read data */
|
|
return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
|
|
}
|
|
|
|
/* ARGSUSED */
|
|
static int
|
|
nfsmb_read_1(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
|
|
int flags)
|
|
{
|
|
uint8_t data;
|
|
|
|
/* store cmd */
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
|
|
|
|
/* write smbus slave address to register */
|
|
data = addr << 1;
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
|
|
|
|
/* write smbus protocol to register */
|
|
data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
|
|
|
|
/* check for errors */
|
|
if (nfsmb_check_done(sc) < 0)
|
|
return -1;
|
|
|
|
/* read data */
|
|
return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
|
|
}
|
|
|
|
static int
|
|
nfsmb_read_2(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
|
|
int flags)
|
|
{
|
|
uint8_t data, low, high;
|
|
|
|
/* store cmd */
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
|
|
|
|
/* write smbus slave address to register */
|
|
data = addr << 1;
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
|
|
|
|
/* write smbus protocol to register */
|
|
data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_WORD_DATA;
|
|
if (flags & I2C_F_PEC)
|
|
data |= NFORCE_SMB_PROTOCOL_PEC;
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
|
|
|
|
/* check for errors */
|
|
if (nfsmb_check_done(sc) < 0)
|
|
return -1;
|
|
|
|
/* read data */
|
|
low = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
|
|
high = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA + 1);
|
|
return low | high << 8;
|
|
}
|