162 lines
5.0 KiB
C
162 lines
5.0 KiB
C
/* $NetBSD: chipsfb.c,v 1.30 2011/07/22 14:34:38 njoly Exp $ */
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/*
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* Copyright (c) 2006 Michael Lorenz
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* A console driver for Chips & Technologies 65550 graphics controllers
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* tested on macppc only so far
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: chipsfb.c,v 1.30 2011/07/22 14:34:38 njoly Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/kauth.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciio.h>
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#include <dev/pci/wsdisplay_pci.h>
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#include <dev/ic/ct65550reg.h>
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#include <dev/ic/ct65550var.h>
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#include "opt_wsemul.h"
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#include "opt_chipsfb.h"
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struct chipsfb_pci_softc {
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struct chipsfb_softc sc_chips;
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_pcitag;
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};
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static int chipsfb_pci_match(device_t, cfdata_t, void *);
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static void chipsfb_pci_attach(device_t, device_t, void *);
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static int chipsfb_pci_ioctl(void *, void *, u_long, void *, int,
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struct lwp *);
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CFATTACH_DECL_NEW(chipsfb_pci, sizeof(struct chipsfb_pci_softc),
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chipsfb_pci_match, chipsfb_pci_attach, NULL, NULL);
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static int
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chipsfb_pci_match(device_t parent, cfdata_t match, void *aux)
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{
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const struct pci_attach_args *pa = (const struct pci_attach_args *)aux;
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if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY ||
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PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
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return 0;
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if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) &&
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(PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65550))
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return 100;
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if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) &&
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(PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65554))
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return 100;
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return 0;
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}
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static void
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chipsfb_pci_attach(device_t parent, device_t self, void *aux)
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{
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struct chipsfb_pci_softc *scp = device_private(self);
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struct chipsfb_softc *sc = &scp->sc_chips;
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const struct pci_attach_args *pa = aux;
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char devinfo[256];
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pcireg_t screg;
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scp->sc_pc = pa->pa_pc;
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scp->sc_pcitag = pa->pa_tag;
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sc->sc_dev = self;
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screg = pci_conf_read(scp->sc_pc, scp->sc_pcitag,
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PCI_COMMAND_STATUS_REG);
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screg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
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pci_conf_write(scp->sc_pc, scp->sc_pcitag, PCI_COMMAND_STATUS_REG,
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screg);
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
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aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
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PCI_REVISION(pa->pa_class));
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sc->sc_memt = pa->pa_memt;
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sc->sc_iot = pa->pa_iot;
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sc->sc_ioctl = chipsfb_pci_ioctl;
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sc->sc_mmap = NULL;
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/* the framebuffer */
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sc->sc_fb = (pci_conf_read(scp->sc_pc, scp->sc_pcitag, PCI_BAR0) &
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~PCI_MAPREG_MEM_TYPE_MASK);
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sc->sc_fbsize = 0x01000000; /* 16MB aperture */
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if (bus_space_map(sc->sc_memt, sc->sc_fb, 0x400000,
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BUS_SPACE_MAP_LINEAR, &sc->sc_fbh)) {
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aprint_error_dev(sc->sc_dev,
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"failed to map the frame buffer.\n");
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}
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if (bus_space_map(sc->sc_memt, sc->sc_fb + CT_OFF_BITBLT, 0x20000,
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BUS_SPACE_MAP_LINEAR, &sc->sc_mmregh)) {
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aprint_error_dev(sc->sc_dev,
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"failed to map MMIO registers.\n");
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}
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/* IO-mapped registers */
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if (bus_space_map(sc->sc_iot, 0x0, 0x400, 0, &sc->sc_ioregh) != 0) {
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aprint_error_dev(sc->sc_dev, "failed to map IO registers.\n");
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}
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sc->memsize = chipsfb_probe_vram(sc);
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chipsfb_do_attach(sc);
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}
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static int
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chipsfb_pci_ioctl(void *v, void *vs, u_long cmd, void *data, int flag,
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struct lwp *l)
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{
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struct vcons_data *vd = v;
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struct chipsfb_softc *sc = vd->cookie;
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struct chipsfb_pci_softc *scp = vd->cookie;
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switch (cmd) {
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/* PCI config read/write passthrough. */
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case PCI_IOC_CFGREAD:
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case PCI_IOC_CFGWRITE:
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return pci_devioctl(scp->sc_pc, scp->sc_pcitag,
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cmd, data, flag, l);
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case WSDISPLAYIO_GET_BUSID:
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return wsdisplayio_busid_pci(sc->sc_dev, scp->sc_pc,
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scp->sc_pcitag, data);
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}
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return EPASSTHROUGH;
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}
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