351 lines
8.9 KiB
C
351 lines
8.9 KiB
C
/* $NetBSD: agp_via.c,v 1.21 2011/02/19 20:07:02 jmcneill Exp $ */
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/*-
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* Copyright (c) 2000 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/sys/pci/agp_via.c,v 1.3 2001/07/05 21:28:47 jhb Exp $
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: agp_via.c,v 1.21 2011/02/19 20:07:02 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/proc.h>
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#include <sys/conf.h>
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#include <sys/device.h>
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#include <sys/agpio.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/agpvar.h>
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#include <dev/pci/agpreg.h>
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#include <dev/pci/pcidevs.h>
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#include <sys/bus.h>
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static u_int32_t agp_via_get_aperture(struct agp_softc *);
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static int agp_via_set_aperture(struct agp_softc *, u_int32_t);
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static int agp_via_bind_page(struct agp_softc *, off_t, bus_addr_t);
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static int agp_via_unbind_page(struct agp_softc *, off_t);
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static void agp_via_flush_tlb(struct agp_softc *);
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static struct agp_methods agp_via_methods = {
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agp_via_get_aperture,
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agp_via_set_aperture,
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agp_via_bind_page,
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agp_via_unbind_page,
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agp_via_flush_tlb,
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agp_generic_enable,
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agp_generic_alloc_memory,
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agp_generic_free_memory,
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agp_generic_bind_memory,
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agp_generic_unbind_memory,
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};
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struct agp_via_softc {
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u_int32_t initial_aperture; /* aperture size at startup */
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struct agp_gatt *gatt;
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int *regs;
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};
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#define REG_GARTCTRL 0
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#define REG_APSIZE 1
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#define REG_ATTBASE 2
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static int via_v2_regs[] =
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{ AGP_VIA_GARTCTRL, AGP_VIA_APSIZE, AGP_VIA_ATTBASE };
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static int via_v3_regs[] =
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{ AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE, AGP3_VIA_ATTBASE };
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int
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agp_via_attach(device_t parent, device_t self, void *aux)
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{
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struct pci_attach_args *pa = aux;
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struct agp_softc *sc = device_private(self);
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struct agp_via_softc *asc;
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struct agp_gatt *gatt;
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pcireg_t agpsel, capval;
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asc = malloc(sizeof *asc, M_AGP, M_NOWAIT|M_ZERO);
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if (asc == NULL) {
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aprint_error(": can't allocate chipset-specific softc\n");
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return ENOMEM;
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}
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sc->as_chipc = asc;
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sc->as_methods = &agp_via_methods;
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pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
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&capval);
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if (PCI_CAP_AGP_MAJOR(capval) >= 3) {
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agpsel = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_VIA_AGPSEL);
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if ((agpsel & (1 << 9)) == 0) {
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asc->regs = via_v3_regs;
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aprint_debug(" (v3)");
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} else {
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asc->regs = via_v2_regs;
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aprint_debug(" (v2 compat mode)");
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}
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} else {
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asc->regs = via_v2_regs;
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aprint_debug(" (v2)");
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}
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if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) {
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aprint_error(": can't map aperture\n");
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free(asc, M_AGP);
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return ENXIO;
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}
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asc->initial_aperture = AGP_GET_APERTURE(sc);
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for (;;) {
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gatt = agp_alloc_gatt(sc);
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if (gatt)
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break;
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/*
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* Probably contigmalloc failure. Try reducing the
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* aperture so that the gatt size reduces.
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*/
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if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
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agp_generic_detach(sc);
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aprint_error(": can't set aperture size\n");
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return ENOMEM;
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}
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}
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asc->gatt = gatt;
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if (asc->regs == via_v2_regs) {
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/* Install the gatt. */
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pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_ATTBASE],
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gatt->ag_physical | 3);
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/* Enable the aperture. */
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pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_GARTCTRL],
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0x0000000f);
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} else {
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pcireg_t gartctrl;
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/* Install the gatt. */
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pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_ATTBASE],
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gatt->ag_physical);
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/* Enable the aperture. */
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gartctrl = pci_conf_read(pa->pa_pc, pa->pa_tag,
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asc->regs[REG_GARTCTRL]);
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pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_GARTCTRL],
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gartctrl | (3 << 7));
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}
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return 0;
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}
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#if 0
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static int
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agp_via_detach(struct agp_softc *sc)
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{
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struct agp_via_softc *asc = sc->as_chipc;
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int error;
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error = agp_generic_detach(sc);
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if (error)
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return error;
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pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL], 0);
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pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_ATTBASE], 0);
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AGP_SET_APERTURE(sc, asc->initial_aperture);
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agp_free_gatt(sc, asc->gatt);
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return 0;
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}
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#endif
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static u_int32_t
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agp_via_get_aperture(struct agp_softc *sc)
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{
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struct agp_via_softc *asc = sc->as_chipc;
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u_int32_t apsize;
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if (asc->regs == via_v2_regs) {
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apsize = pci_conf_read(sc->as_pc, sc->as_tag,
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asc->regs[REG_APSIZE]) & 0xff;
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/*
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* The size is determined by the number of low bits of
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* register APBASE which are forced to zero. The low 20 bits
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* are always forced to zero and each zero bit in the apsize
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* field just read forces the corresponding bit in the 27:20
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* to be zero. We calculate the aperture size accordingly.
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*/
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return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
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} else {
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apsize = pci_conf_read(sc->as_pc, sc->as_tag,
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asc->regs[REG_APSIZE]) & 0xfff;
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switch (apsize) {
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case 0x800:
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return 0x80000000;
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case 0xc00:
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return 0x40000000;
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case 0xe00:
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return 0x20000000;
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case 0xf00:
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return 0x10000000;
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case 0xf20:
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return 0x08000000;
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case 0xf30:
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return 0x04000000;
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case 0xf38:
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return 0x02000000;
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case 0xf3c:
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return 0x01000000;
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case 0xf3e:
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return 0x00800000;
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case 0xf3f:
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return 0x00400000;
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default:
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aprint_error_dev(sc->as_dev,
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"invalid aperture setting 0x%x\n", apsize);
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return 0;
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}
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}
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}
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static int
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agp_via_set_aperture(struct agp_softc *sc, u_int32_t aperture)
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{
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struct agp_via_softc *asc = sc->as_chipc;
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u_int32_t apsize, key;
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pcireg_t reg;
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if (asc->regs == via_v2_regs) {
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/*
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* Reverse the magic from get_aperture.
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*/
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apsize = ((aperture - 1) >> 20) ^ 0xff;
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/*
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* Double check for sanity.
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*/
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if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
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return EINVAL;
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reg = pci_conf_read(sc->as_pc, sc->as_tag,
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asc->regs[REG_APSIZE]);
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reg &= ~0xff;
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reg |= apsize;
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pci_conf_write(sc->as_pc, sc->as_tag,
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asc->regs[REG_APSIZE], reg);
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} else {
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switch (aperture) {
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case 0x80000000:
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key = 0x800;
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break;
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case 0x40000000:
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key = 0xc00;
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break;
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case 0x20000000:
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key = 0xe00;
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break;
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case 0x10000000:
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key = 0xf00;
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break;
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case 0x08000000:
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key = 0xf20;
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break;
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case 0x04000000:
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key = 0xf30;
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break;
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case 0x02000000:
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key = 0xf38;
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break;
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case 0x01000000:
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key = 0xf3c;
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break;
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case 0x00800000:
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key = 0xf3e;
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break;
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case 0x00400000:
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key = 0xf3f;
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break;
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default:
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aprint_error_dev(sc->as_dev,
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"invalid aperture size (%dMB)\n",
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aperture / 1024 / 1024);
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return EINVAL;
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}
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reg = pci_conf_read(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE]);
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reg &= ~0xfff;
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reg |= key;
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pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE], reg);
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}
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return 0;
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}
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static int
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agp_via_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
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{
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struct agp_via_softc *asc = sc->as_chipc;
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if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
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return 0;
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}
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static int
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agp_via_unbind_page(struct agp_softc *sc, off_t offset)
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{
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struct agp_via_softc *asc = sc->as_chipc;
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if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
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return 0;
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}
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static void
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agp_via_flush_tlb(struct agp_softc *sc)
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{
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struct agp_via_softc *asc = sc->as_chipc;
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pcireg_t gartctrl;
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if (asc->regs == via_v2_regs) {
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pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
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0x8f);
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pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
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0x0f);
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} else {
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gartctrl = pci_conf_read(sc->as_pc, sc->as_tag,
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asc->regs[REG_GARTCTRL]);
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pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
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gartctrl & ~(1 << 7));
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pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
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gartctrl);
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}
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}
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