d85a75f583
is the historical name for this interrupt level, and the historical name is going to go away in the near future).
86 lines
3.3 KiB
C
86 lines
3.3 KiB
C
/* $NetBSD: intr.h,v 1.10 2001/01/14 02:00:39 thorpej Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ATARI_INTR_H_
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#define _ATARI_INTR_H_
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#define IPL_NONE 0 /* disable no interrupts */
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#define IPL_BIO (PSL_S|PSL_IPL3) /* disable block I/O interrupts */
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#define IPL_NET (PSL_S|PSL_IPL3) /* disable network interrupts */
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#define IPL_TTY (PSL_S|PSL_IPL4) /* disable terminal interrupts */
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#define IPL_CLOCK (PSL_S|PSL_IPL6) /* disable clock interrupts */
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#define IPL_HIGH (PSL_S|PSL_IPL7) /* disable all interrupts */
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#define IST_UNUSABLE -1 /* interrupt cannot be used */
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#define IST_NONE 0 /* none (dummy) */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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/*
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* spl functions; all but spl0 are done in-line
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*/
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#include <machine/psl.h>
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/* spl0 requires checking for software interrupts */
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#define splnone() spl0()
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#define spllowersoftclock() spl1()
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#define splsoftclock() splraise1()
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#define splsoftnet() splraise1()
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#define splbio() _splraise(PSL_S|PSL_IPL3)
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#define splnet() _splraise(PSL_S|PSL_IPL3)
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#define spltty() _splraise(PSL_S|PSL_IPL4)
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#define splimp() _splraise(PSL_S|PSL_IPL4)
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#define splvm() _splraise(PSL_S|PSL_IPL4)
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#define spllpt() spltty()
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#define splclock() splraise6()
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#define splstatclock() splraise6()
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#define splhigh() spl7()
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#define splsched() spl7()
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#define spllock() spl7()
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#define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0())
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#ifdef _KERNEL
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int spl0 __P((void));
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#endif /* _KERNEL */
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#endif /* _ATARI_INTR_H_ */
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