f06013108d
"same" code before and after.
281 lines
8.1 KiB
C
281 lines
8.1 KiB
C
/* $NetBSD: if_iee_gsc.c,v 1.15 2009/05/24 06:53:35 skrll Exp $ */
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/*
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* Copyright (c) 2003 Jochen Kunz.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Jochen Kunz may not be used to endorse or promote
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* products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY JOCHEN KUNZ
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL JOCHEN KUNZ
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* hp700 GSC bus MD frontend for the iee(4) Intel i82596 Ethernet driver.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_iee_gsc.c,v 1.15 2009/05/24 06:53:35 skrll Exp $");
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/* autoconfig and device stuff */
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/conf.h>
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#include <machine/iomod.h>
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#include <machine/autoconf.h>
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#include <hp700/dev/cpudevs.h>
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#include <hp700/gsc/gscbusvar.h>
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#include "locators.h"
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#include "ioconf.h"
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/* bus_space / bus_dma etc. */
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#include <machine/bus.h>
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#include <machine/intr.h>
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/* general system data and functions */
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#include <sys/systm.h>
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#include <sys/ioctl.h>
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#include <sys/ioccom.h>
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#include <sys/types.h>
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/* tsleep / sleep / wakeup */
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#include <sys/proc.h>
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/* hz for above */
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#include <sys/kernel.h>
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/* network stuff */
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_ether.h>
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#include <sys/socket.h>
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#include <sys/mbuf.h>
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#include "bpfilter.h"
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#endif
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#include <dev/ic/i82596reg.h>
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#include <dev/ic/i82596var.h>
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#define IEE_GSC_IO_SZ 12
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#define IEE_GSC_RESET 0
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#define IEE_GSC_PORT 4
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#define IEE_GSC_CHANATT 8
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#define IEE_ISCP_BUSSY 0x1
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/* autoconfig stuff */
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static int iee_gsc_match(device_t, cfdata_t, void *);
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static void iee_gsc_attach(device_t, device_t, void *);
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static int iee_gsc_detach(device_t, int);
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struct iee_gsc_softc {
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struct iee_softc iee_sc;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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void *sc_ih;
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};
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CFATTACH_DECL_NEW(
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iee_gsc,
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sizeof(struct iee_gsc_softc),
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iee_gsc_match,
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iee_gsc_attach,
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iee_gsc_detach,
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NULL
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);
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int iee_gsc_cmd(struct iee_softc *, uint32_t);
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int iee_gsc_reset(struct iee_softc *);
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int
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iee_gsc_cmd(struct iee_softc *sc, uint32_t cmd)
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{
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struct iee_gsc_softc *sc_gsc = (struct iee_gsc_softc *)sc;
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int n;
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uint16_t ack;
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SC_SCB(sc)->scb_cmd = cmd;
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IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
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/* Issue a Channel Attention to force the chip to read the cmd. */
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bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_CHANATT, 0);
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/* Wait for the cmd to finish */
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for (n = 0 ; n < 100000; n++) {
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DELAY(1);
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IEE_SCBSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
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ack = SC_SCB(sc)->scb_cmd;
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IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD);
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if (ack == 0)
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break;
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}
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if (n < 100000)
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return 0;
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printf("%s: iee_gsc_cmd: timeout n=%d\n", device_xname(sc->sc_dev), n);
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return -1;
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}
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int
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iee_gsc_reset(struct iee_softc *sc)
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{
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struct iee_gsc_softc *sc_gsc = (struct iee_gsc_softc *)sc;
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int n;
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uint32_t cmd;
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uint16_t ack;
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/* Make sure the bussy byte is set and the cache is flushed. */
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SC_ISCP(sc)->iscp_bussy = IEE_ISCP_BUSSY;
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IEE_ISCPSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
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/* Setup the PORT Command with pointer to SCP. */
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cmd = IEE_PORT_SCP | IEE_PHYS_SHMEM(sc->sc_scp_off);
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/* Write a word to IEE_GSC_RESET to initiate a Hardware reset. */
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bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_RESET, 0);
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DELAY(1000);
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/* Write it to the chip, it wants this in two 16 bit parts. */
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if (sc->sc_type == I82596_CA) {
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bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_PORT,
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(cmd & 0xffff));
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DELAY(1000);
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bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_PORT,
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(cmd >> 16));
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} else {
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bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_PORT,
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(cmd >> 16));
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DELAY(1000);
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bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_PORT,
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(cmd & 0xffff));
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}
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DELAY(1000);
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/* Issue a Channel Attention to read SCP */
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bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_CHANATT, 0);
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/* Wait for the chip to initialize and read SCP and ISCP. */
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for (n = 0 ; n < 1000; n++) {
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IEE_ISCPSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
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ack = SC_ISCP(sc)->iscp_bussy;
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IEE_ISCPSYNC(sc, BUS_DMASYNC_PREREAD);
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if (ack != IEE_ISCP_BUSSY)
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break;
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DELAY(100);
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}
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if (n < 1000) {
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/* ACK interrupts we may have caused */
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(sc->sc_iee_cmd)(sc, IEE_SCB_ACK);
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return 0;
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}
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printf("%s: iee_gsc_reset timeout bussy=0x%x\n",
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device_xname(sc->sc_dev), SC_ISCP(sc)->iscp_bussy);
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return -1;
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}
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static int
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iee_gsc_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct gsc_attach_args *ga = aux;
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if (ga->ga_type.iodc_type == HPPA_TYPE_FIO
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&& (ga->ga_type.iodc_sv_model == HPPA_FIO_LAN
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|| ga->ga_type.iodc_sv_model == HPPA_FIO_GLAN))
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/* beat old ie(4) i82586 driver */
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return 10;
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return 0;
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}
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static void
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iee_gsc_attach(device_t parent, device_t self, void *aux)
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{
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struct iee_gsc_softc *sc_gsc = device_private(self);
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struct iee_softc *sc = &sc_gsc->iee_sc;
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struct gsc_attach_args *ga = aux;
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enum hppa_cpu_type cpu_type;
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int media[2];
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sc->sc_dev = self;
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if (ga->ga_type.iodc_sv_model == HPPA_FIO_LAN)
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sc->sc_type = I82596_DX; /* ASP(2) based */
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else
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sc->sc_type = I82596_CA; /* LASI based */
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/*
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* Pre PA7100LC CPUs don't support uncacheable mappings. So make
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* descriptors align to cache lines. Needed to avoid race conditions
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* caused by flushing cache lines that overlap multiple descriptors.
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*/
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cpu_type = hppa_cpu_info->hci_cputype;
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if (cpu_type == hpcx || cpu_type == hpcxs || cpu_type == hpcxt)
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sc->sc_cl_align = 32;
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else
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sc->sc_cl_align = 1;
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sc_gsc->sc_iot = ga->ga_iot;
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if (bus_space_map(sc_gsc->sc_iot, ga->ga_hpa, IEE_GSC_IO_SZ, 0,
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&sc_gsc->sc_ioh)) {
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aprint_error(": iee_gsc_attach: can't map I/O space\n");
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return;
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}
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sc->sc_dmat = ga->ga_dmatag;
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/* Setup SYSBUS byte. */
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if (ga->ga_type.iodc_sv_model == HPPA_FIO_LAN) {
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/*
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* Some earlier machines have 82596DX Rev A1 chip
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* which doesn't have IEE_SYSBUS_BE for 32-bit BE pointers.
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*
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* XXX: How can we detect chip revision at runtime?
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* Should we check cpu_models instead?
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* 715/50, 735/99: Rev A1? (per PR port-hp700/35531)
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* 735/125: Rev C
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*/
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sc->sc_sysbus = IEE_SYSBUS_INT |
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IEE_SYSBUS_TRG | IEE_SYSBUS_LIEAR | IEE_SYSBUS_STD;
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sc->sc_flags = IEE_NEED_SWAP | IEE_REV_A;
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} else {
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sc->sc_sysbus = IEE_SYSBUS_BE | IEE_SYSBUS_INT |
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IEE_SYSBUS_TRG | IEE_SYSBUS_LIEAR | IEE_SYSBUS_STD;
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sc->sc_flags = IEE_NEED_SWAP;
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}
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sc_gsc->sc_ih = hp700_intr_establish(self, IPL_NET,
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iee_intr, sc, ga->ga_int_reg, ga->ga_irq);
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sc->sc_iee_reset = iee_gsc_reset;
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sc->sc_iee_cmd = iee_gsc_cmd;
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sc->sc_mediachange = NULL;
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sc->sc_mediastatus = NULL;
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media[0] = IFM_ETHER | IFM_MANUAL;
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media[1] = IFM_ETHER | IFM_AUTO;
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iee_attach(sc, ga->ga_ether_address, media, 2, IFM_ETHER | IFM_AUTO);
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}
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int
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iee_gsc_detach(device_t self, int flags)
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{
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struct iee_gsc_softc *sc_gsc = device_private(self);
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struct iee_softc *sc = &sc_gsc->iee_sc;
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iee_detach(sc, flags);
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bus_space_unmap(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_IO_SZ);
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/* There is no hp700_intr_disestablish()! */
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return 0;
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}
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