784 lines
20 KiB
C
784 lines
20 KiB
C
/* $NetBSD: if_de.c,v 1.8 2000/12/14 07:15:45 thorpej Exp $ */
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/*
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* Copyright (c) 1982, 1986, 1989 Regents of the University of California.
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* Copyright (c) 2000 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)if_de.c 7.12 (Berkeley) 12/16/90
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*/
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/*
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* DEC DEUNA interface
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*
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* Lou Salkind
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* New York University
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*
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* Rewritten by Ragge 30 April 2000 to match new world.
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*
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* TODO:
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* timeout routine (get statistics)
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*/
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#include "opt_inet.h"
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#include "bpfilter.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/buf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <net/if.h>
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#include <net/if_ether.h>
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#include <net/if_dl.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_inarp.h>
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#endif
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#include <net/bpfdesc.h>
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#endif
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#include <machine/bus.h>
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#include <dev/qbus/ubavar.h>
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#include <dev/qbus/if_dereg.h>
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#include "ioconf.h"
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/*
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* Be careful with transmit/receive buffers, each entry steals 4 map
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* registers, and there is only 496 on one unibus...
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*/
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#define NRCV 10 /* number of receive buffers (must be > 1) */
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#define NXMT 10 /* number of transmit buffers */
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/*
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* Structure containing the elements that must be in DMA-safe memory.
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*/
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struct de_cdata {
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/* the following structures are always mapped in */
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struct de_pcbb dc_pcbb; /* port control block */
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struct de_ring dc_xrent[NXMT]; /* transmit ring entrys */
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struct de_ring dc_rrent[NRCV]; /* receive ring entrys */
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struct de_udbbuf dc_udbbuf; /* UNIBUS data buffer */
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char dc_xbuf[NXMT][ETHER_MAX_LEN];
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/* end mapped area */
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};
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/*
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* Ethernet software status per interface.
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*
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* Each interface is referenced by a network interface structure,
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* ds_if, which the routing code uses to locate the interface.
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* This structure contains the output queue for the interface, its address, ...
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* We also have, for each interface, a UBA interface structure, which
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* contains information about the UNIBUS resources held by the interface:
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* map registers, buffered data paths, etc. Information is cached in this
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* structure for use by the if_uba.c routines in running the interface
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* efficiently.
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*/
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struct de_softc {
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struct device sc_dev; /* Configuration common part */
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struct evcnt sc_intrcnt; /* Interrupt counting */
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struct ethercom sc_ec; /* Ethernet common part */
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#define sc_if sc_ec.ec_if /* network-visible interface */
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bus_space_tag_t sc_iot;
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bus_addr_t sc_ioh;
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bus_dma_tag_t sc_dmat;
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bus_dmamap_t sc_cmap;
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struct de_cdata *sc_dedata; /* Control structure */
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struct de_cdata *sc_pdedata; /* Bus-mapped control structure */
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bus_dmamap_t sc_rcvmap[NRCV]; /* unibus receive maps */
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struct mbuf *sc_rxmbuf[NRCV];
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int sc_xindex; /* UNA index into transmit chain */
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int sc_rindex; /* UNA index into receive chain */
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int sc_xfree; /* index for next transmit buffer */
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int sc_nxmit; /* # of transmits in progress */
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void *sc_sh; /* shutdownhook cookie */
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};
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static int dematch(struct device *, struct cfdata *, void *);
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static void deattach(struct device *, struct device *, void *);
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static void dewait(struct de_softc *, char *);
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static void deinit(struct de_softc *);
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static int deioctl(struct ifnet *, u_long, caddr_t);
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static void dereset(struct device *);
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static void destart(struct ifnet *);
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static void derecv(struct de_softc *);
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static void deintr(void *);
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static int de_add_rxbuf(struct de_softc *, int);
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static void deshutdown(void *);
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struct cfattach de_ca = {
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sizeof(struct de_softc), dematch, deattach
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};
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#define DE_WCSR(csr, val) \
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)
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#define DE_WLOW(val) \
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0, val)
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#define DE_WHIGH(val) \
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0 + 1, val)
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#define DE_RCSR(csr) \
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bus_space_read_2(sc->sc_iot, sc->sc_ioh, csr)
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#define LOWORD(x) ((int)(x) & 0xffff)
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#define HIWORD(x) (((int)(x) >> 16) & 0x3)
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/*
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* Interface exists: make available by filling in network interface
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* record. System will initialize the interface when it is ready
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* to accept packets. We get the ethernet address here.
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*/
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void
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deattach(struct device *parent, struct device *self, void *aux)
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{
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struct uba_attach_args *ua = aux;
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struct de_softc *sc = (struct de_softc *)self;
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struct ifnet *ifp = &sc->sc_if;
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u_int8_t myaddr[ETHER_ADDR_LEN];
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int csr1, rseg, error, i;
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bus_dma_segment_t seg;
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char *c;
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sc->sc_iot = ua->ua_iot;
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sc->sc_ioh = ua->ua_ioh;
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sc->sc_dmat = ua->ua_dmat;
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/*
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* What kind of a board is this?
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* The error bits 4-6 in pcsr1 are a device id as long as
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* the high byte is zero.
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*/
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csr1 = DE_RCSR(DE_PCSR1);
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if (csr1 & 0xff60)
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c = "broken";
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else if (csr1 & 0x10)
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c = "delua";
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else
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c = "deuna";
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/*
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* Reset the board and temporarily map
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* the pcbb buffer onto the Unibus.
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*/
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DE_WCSR(DE_PCSR0, 0); /* reset INTE */
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DELAY(100);
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DE_WCSR(DE_PCSR0, PCSR0_RSET);
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dewait(sc, "reset");
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if ((error = bus_dmamem_alloc(sc->sc_dmat,
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sizeof(struct de_cdata), NBPG, 0, &seg, 1, &rseg,
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BUS_DMA_NOWAIT)) != 0) {
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printf(": unable to allocate control data, error = %d\n",
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error);
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goto fail_0;
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}
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if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
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sizeof(struct de_cdata), (caddr_t *)&sc->sc_dedata,
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BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
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printf(": unable to map control data, error = %d\n", error);
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goto fail_1;
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}
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if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct de_cdata),
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1, sizeof(struct de_cdata), 0, BUS_DMA_NOWAIT,
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&sc->sc_cmap)) != 0) {
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printf(": unable to create control data DMA map, error = %d\n",
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error);
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goto fail_2;
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}
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if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmap,
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sc->sc_dedata, sizeof(struct de_cdata), NULL,
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BUS_DMA_NOWAIT)) != 0) {
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printf(": unable to load control data DMA map, error = %d\n",
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error);
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goto fail_3;
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}
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bzero(sc->sc_dedata, sizeof(struct de_cdata));
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sc->sc_pdedata = (struct de_cdata *)sc->sc_cmap->dm_segs[0].ds_addr;
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/*
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* Create receive buffer DMA maps.
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*/
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for (i = 0; i < NRCV; i++) {
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if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
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MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
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&sc->sc_rcvmap[i]))) {
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printf(": unable to create rx DMA map %d, error = %d\n",
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i, error);
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goto fail_5;
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}
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}
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/*
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* Pre-allocate the receive buffers.
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*/
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for (i = 0; i < NRCV; i++) {
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if ((error = de_add_rxbuf(sc, i)) != 0) {
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printf(": unable to allocate or map rx buffer %d\n,"
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" error = %d\n", i, error);
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goto fail_6;
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}
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}
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/*
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* Tell the DEUNA about our PCB
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*/
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DE_WCSR(DE_PCSR2, LOWORD(sc->sc_pdedata));
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DE_WCSR(DE_PCSR3, HIWORD(sc->sc_pdedata));
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DE_WLOW(CMD_GETPCBB);
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dewait(sc, "pcbb");
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sc->sc_dedata->dc_pcbb.pcbb0 = FC_RDPHYAD;
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DE_WLOW(CMD_GETCMD);
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dewait(sc, "read addr ");
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bcopy((caddr_t)&sc->sc_dedata->dc_pcbb.pcbb2, myaddr, sizeof (myaddr));
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printf("\n%s: %s, hardware address %s\n", sc->sc_dev.dv_xname, c,
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ether_sprintf(myaddr));
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uba_intr_establish(ua->ua_icookie, ua->ua_cvec, deintr, sc,
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&sc->sc_intrcnt);
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uba_reset_establish(dereset, &sc->sc_dev);
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evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
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sc->sc_dev.dv_xname, "intr");
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strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
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ifp->if_softc = sc;
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ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_MULTICAST|IFF_ALLMULTI;
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ifp->if_ioctl = deioctl;
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ifp->if_start = destart;
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IFQ_SET_READY(&ifp->if_snd);
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if_attach(ifp);
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ether_ifattach(ifp, myaddr);
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sc->sc_sh = shutdownhook_establish(deshutdown, sc);
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return;
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/*
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* Free any resources we've allocated during the failed attach
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* attempt. Do this in reverse order and fall through.
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*/
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fail_6:
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for (i = 0; i < NRCV; i++) {
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if (sc->sc_rxmbuf[i] != NULL) {
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bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]);
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m_freem(sc->sc_rxmbuf[i]);
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}
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}
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fail_5:
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for (i = 0; i < NRCV; i++) {
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if (sc->sc_rcvmap[i] != NULL)
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bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]);
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}
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fail_3:
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bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmap);
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fail_2:
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bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dedata,
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sizeof(struct de_cdata));
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fail_1:
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bus_dmamem_free(sc->sc_dmat, &seg, rseg);
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fail_0:
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return;
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}
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/*
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* Reset of interface after UNIBUS reset.
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*/
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void
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dereset(struct device *dev)
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{
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struct de_softc *sc = (void *)dev;
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sc->sc_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
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sc->sc_pdedata = NULL; /* All mappings lost */
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DE_WCSR(DE_PCSR0, PCSR0_RSET);
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dewait(sc, "reset");
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deinit(sc);
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}
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/*
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* Initialization of interface; clear recorded pending
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* operations, and reinitialize UNIBUS usage.
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*/
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void
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deinit(struct de_softc *sc)
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{
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struct de_cdata *dc, *pdc;
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int s, i;
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if (sc->sc_if.if_flags & IFF_RUNNING)
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return;
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/*
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* Tell the DEUNA about our PCB
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*/
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DE_WCSR(DE_PCSR2, LOWORD(sc->sc_pdedata));
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DE_WCSR(DE_PCSR3, HIWORD(sc->sc_pdedata));
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DE_WLOW(0); /* reset INTE */
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DELAY(500);
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DE_WLOW(CMD_GETPCBB);
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dewait(sc, "pcbb");
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dc = sc->sc_dedata;
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pdc = sc->sc_pdedata;
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/* set the transmit and receive ring header addresses */
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dc->dc_pcbb.pcbb0 = FC_WTRING;
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dc->dc_pcbb.pcbb2 = LOWORD(&pdc->dc_udbbuf);
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dc->dc_pcbb.pcbb4 = HIWORD(&pdc->dc_udbbuf);
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dc->dc_udbbuf.b_tdrbl = LOWORD(&pdc->dc_xrent[0]);
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dc->dc_udbbuf.b_tdrbh = HIWORD(&pdc->dc_xrent[0]);
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dc->dc_udbbuf.b_telen = sizeof (struct de_ring) / sizeof(u_int16_t);
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dc->dc_udbbuf.b_trlen = NXMT;
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dc->dc_udbbuf.b_rdrbl = LOWORD(&pdc->dc_rrent[0]);
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dc->dc_udbbuf.b_rdrbh = HIWORD(&pdc->dc_rrent[0]);
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dc->dc_udbbuf.b_relen = sizeof (struct de_ring) / sizeof(u_int16_t);
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dc->dc_udbbuf.b_rrlen = NRCV;
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DE_WLOW(CMD_GETCMD);
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dewait(sc, "wtring");
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sc->sc_dedata->dc_pcbb.pcbb0 = FC_WTMODE;
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sc->sc_dedata->dc_pcbb.pcbb2 = MOD_TPAD|MOD_HDX|MOD_DRDC|MOD_ENAL;
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DE_WLOW(CMD_GETCMD);
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dewait(sc, "wtmode");
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/* set up the receive and transmit ring entries */
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for (i = 0; i < NXMT; i++) {
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dc->dc_xrent[i].r_flags = 0;
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dc->dc_xrent[i].r_segbl = LOWORD(&pdc->dc_xbuf[i][0]);
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dc->dc_xrent[i].r_segbh = HIWORD(&pdc->dc_xbuf[i][0]);
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}
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for (i = 0; i < NRCV; i++)
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dc->dc_rrent[i].r_flags = RFLG_OWN;
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/* start up the board (rah rah) */
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s = splnet();
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sc->sc_rindex = sc->sc_xindex = sc->sc_xfree = sc->sc_nxmit = 0;
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sc->sc_if.if_flags |= IFF_RUNNING;
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DE_WLOW(PCSR0_INTE); /* avoid interlock */
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destart(&sc->sc_if); /* queue output packets */
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DE_WLOW(CMD_START|PCSR0_INTE);
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splx(s);
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}
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/*
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* Setup output on interface.
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* Get another datagram to send off of the interface queue,
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* and map it to the interface before starting the output.
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* Must be called from ipl >= our interrupt level.
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*/
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void
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destart(struct ifnet *ifp)
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{
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struct de_softc *sc = ifp->if_softc;
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struct de_cdata *dc;
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struct de_ring *rp;
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struct mbuf *m;
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int nxmit;
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/*
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* the following test is necessary, since
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* the code is not reentrant and we have
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* multiple transmission buffers.
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*/
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if (sc->sc_if.if_flags & IFF_OACTIVE)
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return;
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dc = sc->sc_dedata;
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for (nxmit = sc->sc_nxmit; nxmit < NXMT; nxmit++) {
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IFQ_DEQUEUE(&ifp->if_snd, m);
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if (m == 0)
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break;
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rp = &dc->dc_xrent[sc->sc_xfree];
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if (rp->r_flags & XFLG_OWN)
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panic("deuna xmit in progress");
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m_copydata(m, 0, m->m_pkthdr.len, &dc->dc_xbuf[sc->sc_xfree][0]);
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rp->r_slen = m->m_pkthdr.len;
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rp->r_tdrerr = 0;
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rp->r_flags = XFLG_STP|XFLG_ENP|XFLG_OWN;
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#if NBPFILTER > 0
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if (ifp->if_bpf)
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bpf_mtap(ifp->if_bpf, m);
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#endif
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m_freem(m);
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sc->sc_xfree++;
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if (sc->sc_xfree == NXMT)
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sc->sc_xfree = 0;
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}
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if (sc->sc_nxmit != nxmit) {
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sc->sc_nxmit = nxmit;
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if (ifp->if_flags & IFF_RUNNING)
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DE_WLOW(PCSR0_INTE|CMD_PDMD);
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}
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}
|
|
|
|
/*
|
|
* Command done interrupt.
|
|
*/
|
|
void
|
|
deintr(void *arg)
|
|
{
|
|
struct de_cdata *dc;
|
|
struct de_softc *sc = arg;
|
|
struct de_ring *rp;
|
|
short csr0;
|
|
|
|
/* save flags right away - clear out interrupt bits */
|
|
csr0 = DE_RCSR(DE_PCSR0);
|
|
DE_WHIGH(csr0 >> 8);
|
|
|
|
|
|
sc->sc_if.if_flags |= IFF_OACTIVE; /* prevent entering destart */
|
|
/*
|
|
* if receive, put receive buffer on mbuf
|
|
* and hang the request again
|
|
*/
|
|
derecv(sc);
|
|
|
|
/*
|
|
* Poll transmit ring and check status.
|
|
* Be careful about loopback requests.
|
|
* Then free buffer space and check for
|
|
* more transmit requests.
|
|
*/
|
|
dc = sc->sc_dedata;
|
|
for ( ; sc->sc_nxmit > 0; sc->sc_nxmit--) {
|
|
rp = &dc->dc_xrent[sc->sc_xindex];
|
|
if (rp->r_flags & XFLG_OWN)
|
|
break;
|
|
sc->sc_if.if_opackets++;
|
|
/* check for unusual conditions */
|
|
if (rp->r_flags & (XFLG_ERRS|XFLG_MTCH|XFLG_ONE|XFLG_MORE)) {
|
|
if (rp->r_flags & XFLG_ERRS) {
|
|
/* output error */
|
|
sc->sc_if.if_oerrors++;
|
|
} else if (rp->r_flags & XFLG_ONE) {
|
|
/* one collision */
|
|
sc->sc_if.if_collisions++;
|
|
} else if (rp->r_flags & XFLG_MORE) {
|
|
/* more than one collision */
|
|
sc->sc_if.if_collisions += 2; /* guess */
|
|
}
|
|
}
|
|
/* check if next transmit buffer also finished */
|
|
sc->sc_xindex++;
|
|
if (sc->sc_xindex == NXMT)
|
|
sc->sc_xindex = 0;
|
|
}
|
|
sc->sc_if.if_flags &= ~IFF_OACTIVE;
|
|
destart(&sc->sc_if);
|
|
|
|
if (csr0 & PCSR0_RCBI) {
|
|
DE_WLOW(PCSR0_INTE|CMD_PDMD);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Ethernet interface receiver interface.
|
|
* If input error just drop packet.
|
|
* Otherwise purge input buffered data path and examine
|
|
* packet to determine type. If can't determine length
|
|
* from type, then have to drop packet. Othewise decapsulate
|
|
* packet based on type and pass to type specific higher-level
|
|
* input routine.
|
|
*/
|
|
void
|
|
derecv(struct de_softc *sc)
|
|
{
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
struct de_ring *rp;
|
|
struct de_cdata *dc;
|
|
struct mbuf *m;
|
|
int len;
|
|
|
|
dc = sc->sc_dedata;
|
|
rp = &dc->dc_rrent[sc->sc_rindex];
|
|
while ((rp->r_flags & RFLG_OWN) == 0) {
|
|
sc->sc_if.if_ipackets++;
|
|
len = (rp->r_lenerr&RERR_MLEN) - ETHER_CRC_LEN;
|
|
/* check for errors */
|
|
if ((rp->r_flags & (RFLG_ERRS|RFLG_FRAM|RFLG_OFLO|RFLG_CRC)) ||
|
|
(rp->r_lenerr & (RERR_BUFL|RERR_UBTO))) {
|
|
sc->sc_if.if_ierrors++;
|
|
goto next;
|
|
}
|
|
m = sc->sc_rxmbuf[sc->sc_rindex];
|
|
#if NBPFILTER > 0
|
|
if (ifp->if_bpf)
|
|
bpf_mtap(ifp->if_bpf, m);
|
|
#endif
|
|
|
|
if (de_add_rxbuf(sc, sc->sc_rindex) == 0) {
|
|
m->m_pkthdr.rcvif = ifp;
|
|
m->m_pkthdr.len = m->m_len = len;
|
|
(*ifp->if_input)(ifp, m);
|
|
} else
|
|
sc->sc_if.if_ierrors++;
|
|
|
|
/* hang the receive buffer again */
|
|
next: rp->r_lenerr = 0;
|
|
rp->r_flags = RFLG_OWN;
|
|
|
|
/* check next receive buffer */
|
|
sc->sc_rindex++;
|
|
if (sc->sc_rindex == NRCV)
|
|
sc->sc_rindex = 0;
|
|
rp = &dc->dc_rrent[sc->sc_rindex];
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Add a receive buffer to the indicated descriptor.
|
|
*/
|
|
int
|
|
de_add_rxbuf(sc, i)
|
|
struct de_softc *sc;
|
|
int i;
|
|
{
|
|
struct mbuf *m;
|
|
struct de_ring *rp;
|
|
vaddr_t addr;
|
|
int error;
|
|
|
|
MGETHDR(m, M_DONTWAIT, MT_DATA);
|
|
if (m == NULL)
|
|
return (ENOBUFS);
|
|
|
|
MCLGET(m, M_DONTWAIT);
|
|
if ((m->m_flags & M_EXT) == 0) {
|
|
m_freem(m);
|
|
return (ENOBUFS);
|
|
}
|
|
|
|
if (sc->sc_rxmbuf[i] != NULL)
|
|
bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]);
|
|
|
|
error = bus_dmamap_load(sc->sc_dmat, sc->sc_rcvmap[i],
|
|
m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT);
|
|
if (error)
|
|
panic("%s: can't load rx DMA map %d, error = %d\n",
|
|
sc->sc_dev.dv_xname, i, error);
|
|
sc->sc_rxmbuf[i] = m;
|
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_rcvmap[i], 0,
|
|
sc->sc_rcvmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD);
|
|
|
|
/*
|
|
* We know that the mbuf cluster is page aligned. Also, be sure
|
|
* that the IP header will be longword aligned.
|
|
*/
|
|
m->m_data += 2;
|
|
addr = sc->sc_rcvmap[i]->dm_segs[0].ds_addr + 2;
|
|
rp = &sc->sc_dedata->dc_rrent[i];
|
|
rp->r_lenerr = 0;
|
|
rp->r_segbl = LOWORD(addr);
|
|
rp->r_segbh = HIWORD(addr);
|
|
rp->r_slen = m->m_ext.ext_size - 2;
|
|
rp->r_flags = RFLG_OWN;
|
|
|
|
return (0);
|
|
}
|
|
|
|
|
|
/*
|
|
* Process an ioctl request.
|
|
*/
|
|
int
|
|
deioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
|
|
{
|
|
struct ifaddr *ifa = (struct ifaddr *)data;
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
|
struct de_softc *sc = ifp->if_softc;
|
|
int s = splnet(), error = 0;
|
|
|
|
switch (cmd) {
|
|
|
|
case SIOCSIFADDR:
|
|
ifp->if_flags |= IFF_UP;
|
|
switch (ifa->ifa_addr->sa_family) {
|
|
#ifdef INET
|
|
case AF_INET:
|
|
deinit(sc);
|
|
arp_ifinit(ifp, ifa);
|
|
break;
|
|
#endif
|
|
}
|
|
break;
|
|
|
|
case SIOCSIFFLAGS:
|
|
if ((ifp->if_flags & IFF_UP) == 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) != 0) {
|
|
/*
|
|
* If interface is marked down and it is running,
|
|
* stop it.
|
|
*/
|
|
DE_WLOW(0);
|
|
DELAY(5000);
|
|
DE_WLOW(PCSR0_RSET);
|
|
ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
|
|
} else if ((ifp->if_flags & IFF_UP) != 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) == 0) {
|
|
/*
|
|
* If interface it marked up and it is stopped, then
|
|
* start it.
|
|
*/
|
|
deinit(sc);
|
|
} else if ((ifp->if_flags & IFF_UP) != 0) {
|
|
/*
|
|
* Send a new setup packet to match any new changes.
|
|
* (Like IFF_PROMISC etc)
|
|
*/
|
|
sc->sc_dedata->dc_pcbb.pcbb0 = FC_WTMODE;
|
|
sc->sc_dedata->dc_pcbb.pcbb2 =
|
|
MOD_TPAD|MOD_HDX|MOD_DRDC|MOD_ENAL;
|
|
if (ifp->if_flags & IFF_PROMISC)
|
|
sc->sc_dedata->dc_pcbb.pcbb2 |= MOD_PROM;
|
|
DE_WLOW(CMD_GETCMD|PCSR0_INTE);
|
|
dewait(sc, "chgmode");
|
|
}
|
|
break;
|
|
|
|
case SIOCADDMULTI:
|
|
case SIOCDELMULTI:
|
|
/*
|
|
* Update our multicast list.
|
|
*/
|
|
error = (cmd == SIOCADDMULTI) ?
|
|
ether_addmulti(ifr, &sc->sc_ec):
|
|
ether_delmulti(ifr, &sc->sc_ec);
|
|
|
|
if (error == ENETRESET) {
|
|
/*
|
|
* Multicast list has changed; set the hardware filter
|
|
* accordingly.
|
|
*/
|
|
error = 0;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
error = EINVAL;
|
|
}
|
|
splx(s);
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* Await completion of the named function
|
|
* and check for errors.
|
|
*/
|
|
void
|
|
dewait(struct de_softc *sc, char *fn)
|
|
{
|
|
int csr0;
|
|
|
|
while ((DE_RCSR(DE_PCSR0) & PCSR0_INTR) == 0)
|
|
;
|
|
csr0 = DE_RCSR(DE_PCSR0);
|
|
DE_WHIGH(csr0 >> 8);
|
|
if (csr0 & PCSR0_PCEI) {
|
|
char bits[64];
|
|
printf("%s: %s failed, csr0=%s ", sc->sc_dev.dv_xname, fn,
|
|
bitmask_snprintf(csr0, PCSR0_BITS, bits, sizeof(bits)));
|
|
printf("csr1=%s\n", bitmask_snprintf(DE_RCSR(DE_PCSR1),
|
|
PCSR1_BITS, bits, sizeof(bits)));
|
|
}
|
|
}
|
|
|
|
int
|
|
dematch(struct device *parent, struct cfdata *cf, void *aux)
|
|
{
|
|
struct uba_attach_args *ua = aux;
|
|
struct de_softc ssc;
|
|
struct de_softc *sc = &ssc;
|
|
int i;
|
|
|
|
sc->sc_iot = ua->ua_iot;
|
|
sc->sc_ioh = ua->ua_ioh;
|
|
/*
|
|
* Make sure self-test is finished before we screw with the board.
|
|
* Self-test on a DELUA can take 15 seconds (argh).
|
|
*/
|
|
for (i = 0;
|
|
(i < 160) &&
|
|
(DE_RCSR(DE_PCSR0) & PCSR0_FATI) == 0 &&
|
|
(DE_RCSR(DE_PCSR1) & PCSR1_STMASK) == STAT_RESET;
|
|
++i)
|
|
DELAY(50000);
|
|
if (((DE_RCSR(DE_PCSR0) & PCSR0_FATI) != 0) ||
|
|
(((DE_RCSR(DE_PCSR1) & PCSR1_STMASK) != STAT_READY) &&
|
|
((DE_RCSR(DE_PCSR1) & PCSR1_STMASK) != STAT_RUN)))
|
|
return(0);
|
|
|
|
DE_WCSR(DE_PCSR0, 0);
|
|
DELAY(5000);
|
|
DE_WCSR(DE_PCSR0, PCSR0_RSET);
|
|
while ((DE_RCSR(DE_PCSR0) & PCSR0_INTR) == 0)
|
|
;
|
|
/* make board interrupt by executing a GETPCBB command */
|
|
DE_WCSR(DE_PCSR0, PCSR0_INTE);
|
|
DE_WCSR(DE_PCSR2, 0);
|
|
DE_WCSR(DE_PCSR3, 0);
|
|
DE_WCSR(DE_PCSR0, PCSR0_INTE|CMD_GETPCBB);
|
|
DELAY(50000);
|
|
|
|
return 1;
|
|
}
|
|
|
|
void
|
|
deshutdown(void *arg)
|
|
{
|
|
struct de_softc *sc = arg;
|
|
|
|
DE_WCSR(DE_PCSR0, 0);
|
|
DELAY(1000);
|
|
DE_WCSR(DE_PCSR0, PCSR0_RSET);
|
|
dewait(sc, "shutdown");
|
|
}
|