763 lines
20 KiB
C
763 lines
20 KiB
C
/* $NetBSD: ad1848_isa.c,v 1.18 2000/12/20 21:06:41 thorpej Exp $ */
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Ken Hornstein and John Kohl.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1994 John Brezak
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* Copyright (c) 1991-1993 Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the Computer Systems
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* Engineering Group at Lawrence Berkeley Laboratory.
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* 4. Neither the name of the University nor of the Laboratory may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* Copyright by Hannu Savolainen 1994
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer. 2.
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* Portions of this code are from the VOXware support for the ad1848
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* by Hannu Savolainen <hannu@voxware.pp.fi>
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*
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* Portions also supplied from the SoundBlaster driver for NetBSD.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <sys/buf.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <sys/audioio.h>
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#include <dev/audio_if.h>
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#include <dev/auconv.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/ic/ad1848reg.h>
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#include <dev/ic/cs4231reg.h>
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#include <dev/ic/cs4237reg.h>
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#include <dev/isa/ad1848var.h>
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#include <dev/isa/cs4231var.h>
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#ifdef AUDIO_DEBUG
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#define DPRINTF(x) if (ad1848debug) printf x
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extern int ad1848debug;
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#else
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#define DPRINTF(x)
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#endif
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static int ad1848_isa_read __P(( struct ad1848_softc *, int));
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static void ad1848_isa_write __P(( struct ad1848_softc *, int, int));
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int
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ad1848_isa_read(sc, index)
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struct ad1848_softc *sc;
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int index;
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{
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return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, index));
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}
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void
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ad1848_isa_write(sc, index, value)
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struct ad1848_softc *sc;
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int index;
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int value;
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{
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, index, value);
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}
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/*
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* Map and probe for the ad1848 chip
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*/
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int
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ad1848_isa_mapprobe(isc, iobase)
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struct ad1848_isa_softc *isc;
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int iobase;
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{
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struct ad1848_softc *sc = &isc->sc_ad1848;
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if (!AD1848_BASE_VALID(iobase)) {
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#ifdef AUDIO_DEBUG
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printf("ad1848: configured iobase %04x invalid\n", iobase);
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#endif
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return 0;
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}
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/* Map the AD1848 ports */
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if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh))
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return 0;
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if (!ad1848_isa_probe(isc)) {
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
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return 0;
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} else
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return 1;
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}
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/*
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* Probe for the ad1848 chip
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*/
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int
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ad1848_isa_probe(isc)
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struct ad1848_isa_softc *isc;
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{
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struct ad1848_softc *sc = &isc->sc_ad1848;
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u_char tmp, tmp1 = 0xff, tmp2 = 0xff;
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int i;
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sc->sc_readreg = ad1848_isa_read;
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sc->sc_writereg = ad1848_isa_write;
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/* Is there an ad1848 chip ? */
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sc->MCE_bit = MODE_CHANGE_ENABLE;
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sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */
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/*
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* Check that the I/O address is in use.
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*
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* The SP_IN_INIT bit of the base I/O port is known to be 0 after the
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* chip has performed its power-on initialization. Just assume
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* this has happened before the OS is starting.
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*
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* If the I/O address is unused, inb() typically returns 0xff.
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*/
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tmp = ADREAD(sc, AD1848_IADDR);
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if (tmp & SP_IN_INIT) { /* Not a AD1848 */
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DPRINTF(("ad_detect_A %x\n", tmp));
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goto bad;
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}
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/*
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* Test if it's possible to change contents of the indirect registers.
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* Registers 0 and 1 are ADC volume registers. The bit 0x10 is read
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* only so try to avoid using it. The bit 0x20 is the mic preamp
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* enable; on some chips it is always the same in both registers, so
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* we avoid tests where they are different.
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*/
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ad_write(sc, 0, 0x8a);
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ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */
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tmp1 = ad_read(sc, 0);
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tmp2 = ad_read(sc, 1);
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if (tmp1 != 0x8a || tmp2 != 0x45) {
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DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2));
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goto bad;
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}
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ad_write(sc, 0, 0x65);
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ad_write(sc, 1, 0xaa);
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tmp1 = ad_read(sc, 0);
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tmp2 = ad_read(sc, 1);
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if (tmp1 != 0x65 || tmp2 != 0xaa) {
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DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2));
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goto bad;
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}
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/*
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* The indirect register I12 has some read only bits. Lets
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* try to change them.
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*/
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tmp = ad_read(sc, SP_MISC_INFO);
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ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f);
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if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) {
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DPRINTF(("ad_detect_D (%x)\n", tmp1));
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goto bad;
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}
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/*
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* MSB and 4 LSBs of the reg I12 tell the chip revision.
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*
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* A preliminary version of the AD1846 data sheet stated that it
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* used an ID field of 0x0B. The current version, however,
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* states that the AD1846 uses ID 0x0A, just like the AD1848K.
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*
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* this switch statement will need updating as newer clones arrive....
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*/
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switch (tmp1 & 0x8f) {
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case 0x09:
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sc->chip_name = "AD1848J";
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break;
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case 0x0A:
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sc->chip_name = "AD1848K";
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break;
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#if 0 /* See above */
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case 0x0B:
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sc->chip_name = "AD1846";
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break;
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#endif
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case 0x81:
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sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */
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break;
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case 0x89:
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sc->chip_name = "CS4248";
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break;
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case 0x8A:
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sc->chip_name = "broken"; /* CS4231/AD1845; see below */
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break;
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default:
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sc->chip_name = "unknown";
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DPRINTF(("ad1848: unknown codec version 0x%02x\n",
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tmp1 & 0x8f));
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break;
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}
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/*
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* The original AD1848/CS4248 has just 16 indirect registers. This
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* means that I0 and I16 should return the same value (etc.).
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* Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test
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* fails with CS4231, AD1845, etc.
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*/
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ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */
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for (i = 0; i < 16; i++)
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if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) {
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if (i != SP_TEST_AND_INIT) {
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DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2));
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goto bad;
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}
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}
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/*
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* Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit
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* The bit 0x80 is always 1 in CS4248, CS4231, and AD1845.
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*/
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ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */
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tmp1 = ad_read(sc, SP_MISC_INFO);
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if ((tmp1 & 0xc0) == (0x80 | MODE2)) {
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/*
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* CS4231 or AD1845 detected - is it?
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*
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* Verify that setting I2 doesn't change I18.
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*/
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ad_write(sc, 18, 0x88); /* Set I18 to known value */
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ad_write(sc, 2, 0x45);
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if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */
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ad_write(sc, 2, 0xaa);
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if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */
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DPRINTF(("ad_detect_H(%x)\n", tmp2));
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goto bad;
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}
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sc->mode = 2;
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/*
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* It's a CS4231, or another clone with 32 registers.
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* Let's find out which by checking I25.
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*/
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if ((tmp1 & 0x8f) == 0x8a) {
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tmp1 = ad_read(sc, CS_VERSION_ID);
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switch (tmp1 & 0xe7) {
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case 0xA0:
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sc->chip_name = "CS4231A";
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break;
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case 0x80:
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/* XXX I25 no good, AD1845 same as CS4231 */
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sc->chip_name = "CS4231 or AD1845";
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break;
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case 0x82:
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sc->chip_name = "CS4232";
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break;
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case 0x03:
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case 0x83:
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sc->chip_name = "CS4236";
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/*
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* Try to switch to mode3 (CS4236B or
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* CS4237B) by setting CMS to 3. A
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* plain CS4236 will not react to
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* LLBM settings.
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*/
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ad_write(sc, SP_MISC_INFO, MODE3);
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tmp1 = ad_read(sc, CS_LEFT_LINE_CONTROL);
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ad_write(sc, CS_LEFT_LINE_CONTROL, 0xe0);
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tmp2 = ad_read(sc, CS_LEFT_LINE_CONTROL);
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if (tmp2 == 0xe0) {
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/*
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* it's a CS4237B or another
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* clone supporting mode 3.
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* Let's determine which by
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* enabling extended registers
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* and checking X25.
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*/
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tmp2 = ad_xread(sc, CS_X_CHIP_VERSION);
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switch (tmp2 & X_CHIP_VERSIONF_CID) {
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case X_CHIP_CID_CS4236BB:
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sc->chip_name = "CS4236BrevB";
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break;
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case X_CHIP_CID_CS4236B:
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sc->chip_name = "CS4236B";
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break;
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case X_CHIP_CID_CS4237B:
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sc->chip_name = "CS4237B";
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break;
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default:
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sc->chip_name = "CS4236B compatible";
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DPRINTF(("cs4236: unknown mode 3 compatible codec, version 0x%02x\n", tmp2));
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break;
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}
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sc->mode = 3;
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}
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/* restore volume control information */
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ad_write(sc, CS_LEFT_LINE_CONTROL, tmp1);
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break;
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}
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}
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}
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}
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/* Wait for 1848 to init */
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while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT)
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;
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/* Wait for 1848 to autocal */
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ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
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while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG)
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;
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return 1;
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bad:
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return 0;
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}
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/* Unmap the I/O ports */
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void
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ad1848_isa_unmap(isc)
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struct ad1848_isa_softc *isc;
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{
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struct ad1848_softc *sc = &isc->sc_ad1848;
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
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}
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/*
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* Attach hardware to driver, attach hardware driver to audio
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* pseudo-device driver .
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*/
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void
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ad1848_isa_attach(isc)
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struct ad1848_isa_softc *isc;
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{
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struct ad1848_softc *sc = &isc->sc_ad1848;
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sc->sc_readreg = ad1848_isa_read;
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sc->sc_writereg = ad1848_isa_write;
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if (isc->sc_playdrq != -1)
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isc->sc_play_maxsize = isa_dmamaxsize(isc->sc_ic,
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isc->sc_playdrq);
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if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq)
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isc->sc_rec_maxsize = isa_dmamaxsize(isc->sc_ic,
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isc->sc_recdrq);
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ad1848_attach(sc);
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}
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int
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ad1848_isa_open(addr, flags)
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void *addr;
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int flags;
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{
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struct ad1848_isa_softc *isc = addr;
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struct ad1848_softc *sc = &isc->sc_ad1848;
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int error, state;
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DPRINTF(("ad1848_isa_open: sc=%p\n", isc));
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state = 0;
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if (isc->sc_playdrq != -1) {
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error = isa_dmamap_create(isc->sc_ic, isc->sc_playdrq,
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isc->sc_play_maxsize, BUS_DMA_NOWAIT);
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if (error) {
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printf("%s: can't create map for drq %d\n",
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sc->sc_dev.dv_xname, isc->sc_playdrq);
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goto bad;
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}
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state |= 1;
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}
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if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) {
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error = isa_dmamap_create(isc->sc_ic, isc->sc_recdrq,
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isc->sc_rec_maxsize, BUS_DMA_NOWAIT);
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if (error) {
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printf("%s: can't create map for drq %d\n",
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sc->sc_dev.dv_xname, isc->sc_recdrq);
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goto bad;
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}
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state |= 2;
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}
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#ifndef AUDIO_NO_POWER_CTL
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/* Power-up chip */
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if (isc->powerctl)
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isc->powerctl(isc->powerarg, flags);
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#endif
|
|
|
|
/* Init and mute wave output */
|
|
ad1848_mute_wave_output(sc, WAVE_MUTE2_INIT, 1);
|
|
|
|
error = ad1848_open(sc, flags);
|
|
if (error) {
|
|
#ifndef AUDIO_NO_POWER_CTL
|
|
if (isc->powerctl)
|
|
isc->powerctl(isc->powerarg, 0);
|
|
#endif
|
|
goto bad;
|
|
}
|
|
|
|
DPRINTF(("ad1848_isa_open: opened\n"));
|
|
return (0);
|
|
|
|
bad:
|
|
if (state & 1)
|
|
isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq);
|
|
if (state & 2)
|
|
isa_dmamap_destroy(isc->sc_ic, isc->sc_recdrq);
|
|
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* Close function is called at splaudio().
|
|
*/
|
|
void
|
|
ad1848_isa_close(addr)
|
|
void *addr;
|
|
{
|
|
struct ad1848_isa_softc *isc = addr;
|
|
struct ad1848_softc *sc = &isc->sc_ad1848;
|
|
|
|
ad1848_isa_halt_output(isc);
|
|
ad1848_isa_halt_input(isc);
|
|
|
|
isc->sc_pintr = isc->sc_rintr = NULL;
|
|
|
|
if (isc->sc_playdrq != -1)
|
|
isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq);
|
|
if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq)
|
|
isa_dmamap_destroy(isc->sc_ic, isc->sc_recdrq);
|
|
|
|
DPRINTF(("ad1848_isa_close: stop DMA\n"));
|
|
ad1848_close(sc);
|
|
|
|
#ifndef AUDIO_NO_POWER_CTL
|
|
/* Power-down chip */
|
|
if (isc->powerctl)
|
|
isc->powerctl(isc->powerarg, 0);
|
|
#endif
|
|
}
|
|
|
|
int
|
|
ad1848_isa_trigger_input(addr, start, end, blksize, intr, arg, param)
|
|
void *addr;
|
|
void *start, *end;
|
|
int blksize;
|
|
void (*intr) __P((void *));
|
|
void *arg;
|
|
struct audio_params *param;
|
|
{
|
|
struct ad1848_isa_softc *isc = addr;
|
|
struct ad1848_softc *sc = &isc->sc_ad1848;
|
|
u_int8_t reg;
|
|
|
|
isa_dmastart(isc->sc_ic, isc->sc_recdrq, start,
|
|
(char *)end - (char *)start, NULL,
|
|
DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
|
|
|
|
isc->sc_recrun = 1;
|
|
if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
|
|
isc->sc_rintr = intr;
|
|
isc->sc_rarg = arg;
|
|
} else {
|
|
isc->sc_pintr = intr;
|
|
isc->sc_parg = arg;
|
|
}
|
|
|
|
blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1;
|
|
|
|
if (sc->mode >= 2) {
|
|
ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff);
|
|
ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8);
|
|
} else {
|
|
ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
|
|
ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
|
|
}
|
|
|
|
reg = ad_read(sc, SP_INTERFACE_CONFIG);
|
|
ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg);
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ad1848_isa_trigger_output(addr, start, end, blksize, intr, arg, param)
|
|
void *addr;
|
|
void *start, *end;
|
|
int blksize;
|
|
void (*intr) __P((void *));
|
|
void *arg;
|
|
struct audio_params *param;
|
|
{
|
|
struct ad1848_isa_softc *isc = addr;
|
|
struct ad1848_softc *sc = &isc->sc_ad1848;
|
|
u_int8_t reg;
|
|
|
|
isa_dmastart(isc->sc_ic, isc->sc_playdrq, start,
|
|
(char *)end - (char *)start, NULL,
|
|
DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
|
|
|
|
isc->sc_playrun = 1;
|
|
isc->sc_pintr = intr;
|
|
isc->sc_parg = arg;
|
|
|
|
blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1;
|
|
|
|
ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
|
|
ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
|
|
|
|
/* Unmute wave output */
|
|
ad1848_mute_wave_output(sc, WAVE_MUTE2, 0);
|
|
|
|
reg = ad_read(sc, SP_INTERFACE_CONFIG);
|
|
ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg);
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ad1848_isa_halt_input(addr)
|
|
void *addr;
|
|
{
|
|
struct ad1848_isa_softc *isc = addr;
|
|
struct ad1848_softc *sc = &isc->sc_ad1848;
|
|
|
|
if (isc->sc_recrun) {
|
|
ad1848_halt_input(sc);
|
|
isa_dmaabort(isc->sc_ic, isc->sc_recdrq);
|
|
isc->sc_recrun = 0;
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ad1848_isa_halt_output(addr)
|
|
void *addr;
|
|
{
|
|
struct ad1848_isa_softc *isc = addr;
|
|
struct ad1848_softc *sc = &isc->sc_ad1848;
|
|
|
|
if (isc->sc_playrun) {
|
|
/* Mute wave output */
|
|
ad1848_mute_wave_output(sc, WAVE_MUTE2, 1);
|
|
|
|
ad1848_halt_output(sc);
|
|
isa_dmaabort(isc->sc_ic, isc->sc_playdrq);
|
|
isc->sc_playrun = 0;
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ad1848_isa_intr(arg)
|
|
void *arg;
|
|
{
|
|
struct ad1848_isa_softc *isc = arg;
|
|
struct ad1848_softc *sc = &isc->sc_ad1848;
|
|
int retval = 0;
|
|
u_char status;
|
|
|
|
/* Get intr status */
|
|
status = ADREAD(sc, AD1848_STATUS);
|
|
|
|
#ifdef AUDIO_DEBUG
|
|
if (ad1848debug > 1)
|
|
printf("ad1848_isa_intr: pintr=%p rintr=%p status=%x\n",
|
|
isc->sc_pintr, isc->sc_rintr, status);
|
|
#endif
|
|
isc->sc_interrupts++;
|
|
|
|
/* Handle interrupt */
|
|
if ((status & INTERRUPT_STATUS) != 0) {
|
|
if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
|
|
status = ad_read(sc, CS_IRQ_STATUS);
|
|
if ((status & CS_IRQ_PI) && isc->sc_pintr != NULL) {
|
|
(*isc->sc_pintr)(isc->sc_parg);
|
|
retval = 1;
|
|
}
|
|
if ((status & CS_IRQ_CI) && isc->sc_rintr != NULL) {
|
|
(*isc->sc_rintr)(isc->sc_rarg);
|
|
retval = 1;
|
|
}
|
|
} else {
|
|
if (isc->sc_pintr != NULL) {
|
|
(*isc->sc_pintr)(isc->sc_parg);
|
|
retval = 1;
|
|
}
|
|
}
|
|
|
|
/* Clear interrupt */
|
|
ADWRITE(sc, AD1848_STATUS, 0);
|
|
}
|
|
return(retval);
|
|
}
|
|
|
|
void *
|
|
ad1848_isa_malloc(addr, direction, size, pool, flags)
|
|
void *addr;
|
|
int direction;
|
|
size_t size;
|
|
int pool, flags;
|
|
{
|
|
struct ad1848_isa_softc *isc = addr;
|
|
int drq;
|
|
|
|
if (direction == AUMODE_PLAY)
|
|
drq = isc->sc_playdrq;
|
|
else
|
|
drq = isc->sc_recdrq;
|
|
return (isa_malloc(isc->sc_ic, drq, size, pool, flags));
|
|
}
|
|
|
|
void
|
|
ad1848_isa_free(addr, ptr, pool)
|
|
void *addr;
|
|
void *ptr;
|
|
int pool;
|
|
{
|
|
isa_free(ptr, pool);
|
|
}
|
|
|
|
size_t
|
|
ad1848_isa_round_buffersize(addr, direction, size)
|
|
void *addr;
|
|
int direction;
|
|
size_t size;
|
|
{
|
|
struct ad1848_isa_softc *isc = addr;
|
|
bus_size_t maxsize;
|
|
|
|
if (direction == AUMODE_PLAY)
|
|
maxsize = isc->sc_play_maxsize;
|
|
else if (isc->sc_recdrq == isc->sc_playdrq)
|
|
maxsize = isc->sc_play_maxsize;
|
|
else
|
|
maxsize = isc->sc_rec_maxsize;
|
|
|
|
if (size > maxsize)
|
|
size = maxsize;
|
|
return (size);
|
|
}
|
|
|
|
paddr_t
|
|
ad1848_isa_mappage(addr, mem, off, prot)
|
|
void *addr;
|
|
void *mem;
|
|
off_t off;
|
|
int prot;
|
|
{
|
|
return isa_mappage(mem, off, prot);
|
|
}
|
|
|
|
int
|
|
ad1848_isa_get_props(addr)
|
|
void *addr;
|
|
{
|
|
struct ad1848_isa_softc *isc = addr;
|
|
|
|
return (AUDIO_PROP_MMAP |
|
|
(isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0));
|
|
}
|