87 lines
3.5 KiB
C
87 lines
3.5 KiB
C
/* $NetBSD: hd64465reg.h,v 1.1 2002/02/11 17:27:16 uch Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* HD64465 power managerment and system configuration register.
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*/
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/* System Module Standby Register */
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#define HD64465_SMSCR 0xb0000000
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#define SMSCR_PS2ST 0x4000
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#define SMSCR_ADCST 0x1000
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#define SMSCR_UARTST 0x0800
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#define SMSCR_SCDIST 0x0200
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#define SMSCR_PPST 0x0100
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#define SMSCR_PC0ST 0x0040
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#define SMSCR_PC1ST 0x0020
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#define SMSCR_AFEST 0x0010
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#define SMSCR_TM0ST 0x0008
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#define SMSCR_TM1ST 0x0004
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#define SMSCR_IRDAST 0x0002
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#define SMSCR_KBCST 0x0001
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/* System Configuration Register */
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#define HD64465_SCONFR 0xb0000002
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/* System Bus Control Register */
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#define HD64465_SBCR 0xb0000004
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/* System Peripheral Clock Control Register */
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#define HD64465_SPCCR 0xb0000006
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#define SPCCR_ADCCLK 0x8000
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#define SPCCR_UARTCLK 0x2000
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#define SPCCR_PPCLK 0x1000
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#define SPCCR_FIRCLK 0x0800
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#define SPCCR_SIRCLK 0x0400
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#define SPCCR_SCDICLK 0x0200
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#define SPCCR_KBCCLK 0x0100
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#define SPCCR_USBCLK 0x0080
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#define SPCCR_AFECLK 0x0040
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#define SPCCR_UCKOSC 0x0002
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#define SPCCR_AFEOSC 0x0001
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/* System Peripheral S/W Reset Control Register */
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#define HD64465_SPSRCR 0xb0000008
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/* System PLL Control Register */
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#define HD64465_SPLLCR 0xb000000a
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/* System Revision Register */
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#define HD64465_SRR 0xb000000c
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/* System Test Mode Control Register */
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#define HD64465_STMCR 0xb000000e
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/* System Device ID Register */
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#define HD64465_SDIDR 0xb0000010 /* ro 0x8122 */
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/* System Debug Port Control Register */
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#define HD64465_SDPCR 0xb0000ff0
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