371 lines
13 KiB
C
371 lines
13 KiB
C
/* $NetBSD: pmap.h,v 1.68 2007/02/21 22:59:37 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center and by Chris G. Demetriou.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1991, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/10/93
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*/
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/*
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* Copyright (c) 1987 Carnegie-Mellon University
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/10/93
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*/
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#ifndef _PMAP_MACHINE_
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#define _PMAP_MACHINE_
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#if defined(_KERNEL_OPT)
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#include "opt_multiprocessor.h"
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#endif
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#include <sys/lock.h>
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#include <sys/queue.h>
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#include <machine/pte.h>
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/*
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* Machine-dependent virtual memory state.
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*
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* If we ever support processor numbers higher than 63, we'll have to
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* rethink the CPU mask.
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*
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* Note pm_asn and pm_asngen are arrays allocated in pmap_create().
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* Their size is based on the PCS count from the HWRPB, and indexed
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* by processor ID (from `whami').
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*
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* The kernel pmap is a special case; it gets statically-allocated
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* arrays which hold enough for ALPHA_MAXPROCS.
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*/
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struct pmap_asn_info {
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unsigned int pma_asn; /* address space number */
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unsigned long pma_asngen; /* ASN generation number */
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};
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struct pmap {
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TAILQ_ENTRY(pmap) pm_list; /* list of all pmaps */
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pt_entry_t *pm_lev1map; /* level 1 map */
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int pm_count; /* pmap reference count */
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struct simplelock pm_slock; /* lock on pmap */
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struct pmap_statistics pm_stats; /* pmap statistics */
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unsigned long pm_cpus; /* mask of CPUs using pmap */
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unsigned long pm_needisync; /* mask of CPUs needing isync */
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struct pmap_asn_info pm_asni[1]; /* ASN information */
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/* variable length */
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};
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typedef struct pmap *pmap_t;
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/*
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* Compute the sizeof of a pmap structure. Subtract one because one
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* ASN info structure is already included in the pmap structure itself.
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*/
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#define PMAP_SIZEOF(x) \
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(ALIGN(sizeof(struct pmap) + \
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(sizeof(struct pmap_asn_info) * ((x) - 1))))
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#define PMAP_ASN_RESERVED 0 /* reserved for Lev1map users */
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extern struct pmap kernel_pmap_store[];
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/*
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* For each struct vm_page, there is a list of all currently valid virtual
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* mappings of that page. An entry is a pv_entry_t, the list is pv_table.
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*/
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typedef struct pv_entry {
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struct pv_entry *pv_next; /* next pv_entry on list */
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struct pmap *pv_pmap; /* pmap where mapping lies */
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vaddr_t pv_va; /* virtual address for mapping */
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pt_entry_t *pv_pte; /* PTE that maps the VA */
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} *pv_entry_t;
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/* pvh_attrs */
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#define PGA_MODIFIED 0x01 /* modified */
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#define PGA_REFERENCED 0x02 /* referenced */
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/* pvh_usage */
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#define PGU_NORMAL 0 /* free or normal use */
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#define PGU_PVENT 1 /* PV entries */
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#define PGU_L1PT 2 /* level 1 page table */
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#define PGU_L2PT 3 /* level 2 page table */
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#define PGU_L3PT 4 /* level 3 page table */
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#ifdef _KERNEL
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#ifndef _LKM
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#include "opt_dec_kn8ae.h" /* XXX */
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#if defined(DEC_KN8AE)
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#define _PMAP_MAY_USE_PROM_CONSOLE
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#endif
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#if defined(MULTIPROCESSOR)
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struct cpu_info;
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struct trapframe;
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void pmap_do_reactivate(struct cpu_info *, struct trapframe *);
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void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, u_long *);
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void pmap_tlb_shootnow(u_long);
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void pmap_do_tlb_shootdown(struct cpu_info *, struct trapframe *);
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#define PMAP_TLB_SHOOTDOWN_CPUSET_DECL u_long shootset = 0;
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#define PMAP_TLB_SHOOTDOWN(pm, va, pte) \
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pmap_tlb_shootdown((pm), (va), (pte), &shootset)
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#define PMAP_TLB_SHOOTNOW() \
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pmap_tlb_shootnow(shootset)
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#else
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#define PMAP_TLB_SHOOTDOWN_CPUSET_DECL /* nothing */
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#define PMAP_TLB_SHOOTDOWN(pm, va, pte) /* nothing */
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#define PMAP_TLB_SHOOTNOW() /* nothing */
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#endif /* MULTIPROCESSOR */
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#endif /* _LKM */
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#define pmap_kernel() (kernel_pmap_store)
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
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#define pmap_copy(dp, sp, da, l, sa) /* nothing */
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#define pmap_update(pmap) /* nothing (yet) */
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static __inline void
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pmap_remove_all(struct pmap *pmap)
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{
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/* Nothing. */
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}
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#define pmap_is_referenced(pg) \
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(((pg)->mdpage.pvh_attrs & PGA_REFERENCED) != 0)
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#define pmap_is_modified(pg) \
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(((pg)->mdpage.pvh_attrs & PGA_MODIFIED) != 0)
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#define PMAP_STEAL_MEMORY /* enable pmap_steal_memory() */
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#define PMAP_GROWKERNEL /* enable pmap_growkernel() */
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/*
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* Alternate mapping hooks for pool pages. Avoids thrashing the TLB.
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*/
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#define PMAP_MAP_POOLPAGE(pa) ALPHA_PHYS_TO_K0SEG((pa))
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#define PMAP_UNMAP_POOLPAGE(va) ALPHA_K0SEG_TO_PHYS((va))
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/*
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* Other hooks for the pool allocator.
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*/
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#define POOL_VTOPHYS(va) ALPHA_K0SEG_TO_PHYS((vaddr_t) (va))
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bool pmap_pageidlezero(paddr_t);
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#define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa))
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paddr_t vtophys(vaddr_t);
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/* Machine-specific functions. */
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void pmap_bootstrap(paddr_t, u_int, u_long);
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int pmap_emulate_reference(struct lwp *, vaddr_t, int, int);
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#ifdef _PMAP_MAY_USE_PROM_CONSOLE
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int pmap_uses_prom_console(void);
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#endif
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#define pmap_pte_pa(pte) (PG_PFNUM(*(pte)) << PGSHIFT)
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#define pmap_pte_prot(pte) (*(pte) & PG_PROT)
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#define pmap_pte_w(pte) (*(pte) & PG_WIRED)
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#define pmap_pte_v(pte) (*(pte) & PG_V)
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#define pmap_pte_pv(pte) (*(pte) & PG_PVLIST)
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#define pmap_pte_asm(pte) (*(pte) & PG_ASM)
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#define pmap_pte_exec(pte) (*(pte) & PG_EXEC)
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#define pmap_pte_set_w(pte, v) \
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do { \
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if (v) \
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*(pte) |= PG_WIRED; \
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else \
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*(pte) &= ~PG_WIRED; \
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} while (0)
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#define pmap_pte_w_chg(pte, nw) ((nw) ^ pmap_pte_w(pte))
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#define pmap_pte_set_prot(pte, np) \
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do { \
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*(pte) &= ~PG_PROT; \
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*(pte) |= (np); \
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} while (0)
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#define pmap_pte_prot_chg(pte, np) ((np) ^ pmap_pte_prot(pte))
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static __inline pt_entry_t *pmap_l2pte(pmap_t, vaddr_t, pt_entry_t *);
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static __inline pt_entry_t *pmap_l3pte(pmap_t, vaddr_t, pt_entry_t *);
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#define pmap_l1pte(pmap, v) \
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(&(pmap)->pm_lev1map[l1pte_index((vaddr_t)(v))])
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static __inline pt_entry_t *
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pmap_l2pte(pmap, v, l1pte)
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pmap_t pmap;
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vaddr_t v;
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pt_entry_t *l1pte;
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{
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pt_entry_t *lev2map;
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if (l1pte == NULL) {
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l1pte = pmap_l1pte(pmap, v);
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if (pmap_pte_v(l1pte) == 0)
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return (NULL);
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}
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lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte));
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return (&lev2map[l2pte_index(v)]);
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}
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static __inline pt_entry_t *
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pmap_l3pte(pmap, v, l2pte)
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pmap_t pmap;
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vaddr_t v;
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pt_entry_t *l2pte;
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{
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pt_entry_t *l1pte, *lev2map, *lev3map;
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if (l2pte == NULL) {
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l1pte = pmap_l1pte(pmap, v);
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if (pmap_pte_v(l1pte) == 0)
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return (NULL);
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lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte));
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l2pte = &lev2map[l2pte_index(v)];
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if (pmap_pte_v(l2pte) == 0)
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return (NULL);
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}
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lev3map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l2pte));
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return (&lev3map[l3pte_index(v)]);
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}
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/*
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* Macros for locking pmap structures.
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*
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* Note that we if we access the kernel pmap in interrupt context, it
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* is only to update statistics. Since stats are updated using atomic
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* operations, locking the kernel pmap is not necessary. Therefore,
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* it is not necessary to block interrupts when locking pmap strucutres.
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*/
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#define PMAP_LOCK(pmap) simple_lock(&(pmap)->pm_slock)
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#define PMAP_UNLOCK(pmap) simple_unlock(&(pmap)->pm_slock)
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/*
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* Macro for processing deferred I-stream synchronization.
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*
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* The pmap module may defer syncing the user I-stream until the
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* return to userspace, since the IMB PALcode op can be quite
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* expensive. Since user instructions won't be executed until
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* the return to userspace, this can be deferred until userret().
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*/
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#define PMAP_USERRET(pmap) \
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do { \
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u_long cpu_mask = (1UL << cpu_number()); \
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\
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if ((pmap)->pm_needisync & cpu_mask) { \
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atomic_clearbits_ulong(&(pmap)->pm_needisync, \
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cpu_mask); \
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alpha_pal_imb(); \
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} \
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} while (0)
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#endif /* _KERNEL */
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#endif /* _PMAP_MACHINE_ */
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