460 lines
11 KiB
C
460 lines
11 KiB
C
/* $NetBSD: si.c,v 1.3 2000/02/08 16:17:32 tsutsui Exp $ */
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/*
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file contains the machine-dependent parts of the Sony CXD1180
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* controller. The machine-independent parts are in ncr5380sbc.c.
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* Written by Izumi Tsutsui.
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*
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* This code is based on arch/vax/vsa/ncr.c and sun3/dev/si.c
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/buf.h>
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#include <machine/cpu.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/ic/ncr5380reg.h>
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#include <dev/ic/ncr5380var.h>
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#include <news68k/dev/hbvar.h>
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#include <news68k/dev/dmac_0266.h>
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#define MIN_DMA_LEN 128
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#define DMAC_BASE 0xe0e80000 /* XXX */
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struct si_dma_handle {
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int dh_flags;
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#define SIDH_BUSY 0x01
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#define SIDH_OUT 0x02
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caddr_t dh_addr;
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int dh_len;
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};
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struct si_softc {
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struct ncr5380_softc ncr_sc;
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int sc_options;
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volatile struct dma_regs *sc_regs;
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struct si_dma_handle ncr_dma[SCI_OPENINGS];
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};
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void si_attach __P((struct device *, struct device *, void *));
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int si_match __P((struct device *, struct cfdata *, void *));
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int si_intr __P((int));
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void si_dma_alloc __P((struct ncr5380_softc *));
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void si_dma_free __P((struct ncr5380_softc *));
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void si_dma_setup __P((struct ncr5380_softc *));
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void si_dma_start __P((struct ncr5380_softc *));
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void si_dma_poll __P((struct ncr5380_softc *));
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void si_dma_eop __P((struct ncr5380_softc *));
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void si_dma_stop __P((struct ncr5380_softc *));
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struct scsipi_device si_scsidev = {
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NULL, /* use default error handler */
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NULL, /* do not have a start functio */
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NULL, /* have no async handler */
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NULL, /* Use default done routine */
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};
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struct cfattach si_ca = {
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sizeof(struct si_softc), si_match, si_attach
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};
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/*
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* Options for disconnect/reselect, DMA, and interrupts.
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* By default, allow disconnect/reselect on targets 4-6.
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* Those are normally tapes that really need it enabled.
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* The options are taken from the config file.
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*/
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#define SI_NO_DISCONNECT 0x000ff
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#define SI_NO_PARITY_CHK 0x0ff00
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#define SI_FORCE_POLLING 0x10000
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#define SI_DISABLE_DMA 0x20000
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int si_options = 0x0f;
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int
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si_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct hb_attach_args *ha = aux;
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int addr;
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if (strcmp(ha->ha_name, "si"))
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return 0;
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addr = IIOV(ha->ha_address);
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if (badaddr((void *)addr, 1))
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return 0;
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return 1;
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}
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/*
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* Card attach function
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*/
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void
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si_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct si_softc *sc = (struct si_softc *)self;
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struct ncr5380_softc *ncr_sc = &sc->ncr_sc;
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struct cfdata *cf = self->dv_cfdata;
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struct hb_attach_args *ha = aux;
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u_char *addr;
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/* Get options from config flags if specified. */
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if (cf->cf_flags)
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sc->sc_options = cf->cf_flags;
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else
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sc->sc_options = si_options;
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printf(": options=0x%x\n", sc->sc_options);
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ncr_sc->sc_no_disconnect = (sc->sc_options & SI_NO_DISCONNECT);
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ncr_sc->sc_parity_disable = (sc->sc_options & SI_NO_PARITY_CHK) >> 8;
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if (sc->sc_options & SI_FORCE_POLLING)
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ncr_sc->sc_flags |= NCR5380_FORCE_POLLING;
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ncr_sc->sc_min_dma_len = MIN_DMA_LEN;
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ncr_sc->sc_dma_alloc = si_dma_alloc;
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ncr_sc->sc_dma_free = si_dma_free;
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ncr_sc->sc_dma_poll = si_dma_poll;
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ncr_sc->sc_dma_setup = si_dma_setup;
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ncr_sc->sc_dma_start = si_dma_start;
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ncr_sc->sc_dma_eop = si_dma_eop;
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ncr_sc->sc_dma_stop = si_dma_stop;
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if (sc->sc_options & SI_DISABLE_DMA)
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/* Override this function pointer. */
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ncr_sc->sc_dma_alloc = NULL;
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addr = (u_char *)IIOV(ha->ha_address);
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ncr_sc->sci_r0 = addr + 0;
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ncr_sc->sci_r1 = addr + 1;
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ncr_sc->sci_r2 = addr + 2;
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ncr_sc->sci_r3 = addr + 3;
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ncr_sc->sci_r4 = addr + 4;
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ncr_sc->sci_r5 = addr + 5;
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ncr_sc->sci_r6 = addr + 6;
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ncr_sc->sci_r7 = addr + 7;
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ncr_sc->sc_pio_in = ncr5380_pio_in;
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ncr_sc->sc_pio_out = ncr5380_pio_out;
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ncr_sc->sc_adapter.scsipi_cmd = ncr5380_scsi_cmd;
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ncr_sc->sc_adapter.scsipi_minphys = minphys;
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ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
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ncr_sc->sc_link.adapter_softc = sc;
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ncr_sc->sc_link.scsipi_scsi.adapter_target = 7;
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ncr_sc->sc_link.adapter = &ncr_sc->sc_adapter;
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ncr_sc->sc_link.device = &si_scsidev;
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ncr_sc->sc_link.type = BUS_SCSI;
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/* soft reset DMAC */
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sc->sc_regs = (void *)IIOV(DMAC_BASE);
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sc->sc_regs->ctl = DC_CTL_RST;
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ncr5380_init(ncr_sc);
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ncr5380_reset_scsibus(ncr_sc);
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config_found(&(ncr_sc->sc_dev), &(ncr_sc->sc_link), scsiprint);
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}
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int
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si_intr(unit)
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int unit;
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{
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struct si_softc *sc;
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extern struct cfdriver si_cd;
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if (unit >= si_cd.cd_ndevs)
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return 0;
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sc = si_cd.cd_devs[unit];
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(void)ncr5380_intr(&sc->ncr_sc);
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return 0;
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}
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/*
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* DMA routines for news1700 machines
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*/
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void
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si_dma_alloc(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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struct sci_req *sr = ncr_sc->sc_current;
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struct scsipi_xfer *xs = sr->sr_xs;
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struct si_dma_handle *dh;
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int xlen, i;
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#ifdef DIAGNOSTIC
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if (sr->sr_dma_hand != NULL)
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panic("si_dma_alloc: already have DMA handle");
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#endif
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/* Polled transfers shouldn't allocate a DMA handle. */
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if (sr->sr_flags & SR_IMMED)
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return;
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xlen = ncr_sc->sc_datalen;
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/* Make sure our caller checked sc_min_dma_len. */
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if (xlen < MIN_DMA_LEN)
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panic("si_dma_alloc: len=0x%x\n", xlen);
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/*
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* Find free DMA handle. Guaranteed to find one since we
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* have as many DMA handles as the driver has processes.
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* (instances?)
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*/
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for (i = 0; i < SCI_OPENINGS; i++) {
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if ((sc->ncr_dma[i].dh_flags & SIDH_BUSY) == 0)
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goto found;
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}
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panic("si_dma_alloc(): no free DMA handles");
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found:
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dh = &sc->ncr_dma[i];
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dh->dh_flags = SIDH_BUSY;
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dh->dh_addr = ncr_sc->sc_dataptr;
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dh->dh_len = xlen;
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/* Remember dest buffer parameters */
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if (xs->xs_control & XS_CTL_DATA_OUT)
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dh->dh_flags |= SIDH_OUT;
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sr->sr_dma_hand = dh;
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}
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void
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si_dma_free(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct sci_req *sr = ncr_sc->sc_current;
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struct si_dma_handle *dh = sr->sr_dma_hand;
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if (dh->dh_flags & SIDH_BUSY)
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dh->dh_flags = 0;
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else
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printf("si_dma_free: free'ing unused buffer\n");
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sr->sr_dma_hand = NULL;
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}
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void
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si_dma_setup(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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/* Do nothing here */
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}
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void
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si_dma_start(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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volatile struct dma_regs *dmac = sc->sc_regs;
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struct sci_req *sr = ncr_sc->sc_current;
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struct si_dma_handle *dh = sr->sr_dma_hand;
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u_int addr, offset, rest;
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long len;
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int i;
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/*
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* Set the news68k-specific registers.
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*/
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/* reset DMAC */
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dmac->ctl = DC_CTL_RST;
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dmac->ctl = 0;
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addr = (u_int)dh->dh_addr;
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offset = addr & DMAC_SEG_OFFSET;
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len = (u_int)dh->dh_len;
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/* set DMA transfer length and offset of first segment */
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dmac->tcnt = len;
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dmac->offset = offset;
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/* set first DMA segment address */
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dmac->tag = 0;
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dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT;
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rest = DMAC_SEG_SIZE - offset;
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addr += rest;
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len -= rest;
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/* set all the rest segments */
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for (i = 1; len > 0; i++) {
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dmac->tag = i;
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dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT;
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len -= DMAC_SEG_SIZE;
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addr += DMAC_SEG_SIZE;
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}
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/* terminate TAG */
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dmac->tag = 0;
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/*
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* Now from the 5380-internal DMA registers.
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*/
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if (dh->dh_flags & SIDH_OUT) {
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NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT);
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NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA);
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NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
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| SCI_MODE_DMA);
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/* set Dir */
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dmac->ctl = 0;
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/* start DMA */
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NCR5380_WRITE(ncr_sc, sci_dma_send, 0);
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dmac->ctl = DC_CTL_ENB;
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} else {
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NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN);
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NCR5380_WRITE(ncr_sc, sci_icmd, 0);
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NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
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| SCI_MODE_DMA);
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/* set Dir */
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dmac->ctl = DC_CTL_MOD;
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/* start DMA */
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NCR5380_WRITE(ncr_sc, sci_irecv, 0);
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dmac->ctl = DC_CTL_MOD | DC_CTL_ENB;
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}
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ncr_sc->sc_state |= NCR_DOINGDMA;
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}
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/*
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* When?
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*/
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void
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si_dma_poll(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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printf("si_dma_poll\n");
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}
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/*
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* news68k (probabry) does not use the EOP signal.
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*/
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void
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si_dma_eop(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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printf("si_dma_eop\n");
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}
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void
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si_dma_stop(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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volatile struct dma_regs *dmac = sc->sc_regs;
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struct sci_req *sr = ncr_sc->sc_current;
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struct si_dma_handle *dh = sr->sr_dma_hand;
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int resid, ntrans, i;
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/* check DMAC interrupt status */
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if ((dmac->stat & DC_ST_INT) == 0) {
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#ifdef DEBUG
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printf("si_dma_stop: no DMA interrupt");
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#endif
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return; /* XXX */
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}
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if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) {
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#ifdef DEBUG
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printf("si_dma_stop: dma not running\n");
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#endif
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return;
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}
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ncr_sc->sc_state &= ~NCR_DOINGDMA;
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/* OK, have either phase mis-match or end of DMA. */
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/* Set an impossible phase to prevent data movement? */
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NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_INVALID);
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/* Note that timeout may have set the error flag. */
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if (ncr_sc->sc_state & NCR_ABORTING)
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goto out;
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/*
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* Sometimes the FIFO buffer isn't drained when the
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* interrupt is posted. Just loop here and hope that
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* it will drain soon.
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*/
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for (i = 0; i < 200000; i++) { /* 2 sec */
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resid = dmac->tcnt;
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if (resid == 0)
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break;
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DELAY(10);
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}
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if (resid)
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printf("si_dma_stop: resid=0x%x\n", resid);
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ntrans = dh->dh_len - resid;
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ncr_sc->sc_dataptr += ntrans;
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ncr_sc->sc_datalen -= ntrans;
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if ((dh->dh_flags & SIDH_OUT) == 0) {
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PCIA();
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}
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out:
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NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) &
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~(SCI_MODE_DMA));
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NCR5380_WRITE(ncr_sc, sci_icmd, 0);
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}
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