397 lines
9.9 KiB
C
397 lines
9.9 KiB
C
/* $NetBSD: ims332.c,v 1.2 1996/04/08 00:57:37 jonathan Exp $ */
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/*-
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* Copyright (c) 1992, 1993, 1995
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* The Regents of the University of California. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)ims332.c 8.1 (Berkeley) 6/10/93
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*/
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/*
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* Routines for the Inmos IMS-G332 Colour video controller
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* Author: Alessandro Forin, Carnegie Mellon University
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <machine/fbio.h>
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#include <machine/fbvar.h>
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#include <machine/machConst.h>
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#include <pmax/dev/ims332.h>
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static u_int ims332_read_register (struct fbinfo *, int);
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static void ims332_write_register (struct fbinfo *, int, unsigned int);
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#define assert_ims332_reset_bit(r) *r &= ~0x40
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#define deassert_ims332_reset_bit(r) *r |= 0x40
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int
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ims332init(fi)
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struct fbinfo *fi;
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{
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int i;
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/*
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* Initialize the screen. (xcfb-specific)
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*/
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#ifdef notdef
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register u_int *reset = (u_int *)fi -> fi_base;
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assert_ims332_reset_bit(reset);
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DELAY(1); /* specs sez 50ns.. */
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deassert_ims332_reset_bit(reset);
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/* CLOCKIN appears to receive a 6.25 Mhz clock --> PLL 12 for
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75Mhz monitor */
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ims332_write_register (fi, IMS332_REG_BOOT,
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12 | IMS332_BOOT_CLOCK_PLL);
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/* initialize VTG */
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ims332_write_register (fi, IMS332_REG_CSR_A,
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IMS332_BPP_8 | IMS332_CSR_A_DISABLE_CURSOR);
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DELAY(50); /* spec does not say */
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/* datapath registers (values taken from prom's settings) */
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ims332_write_register (fi, IMS332_REG_HALF_SYNCH, 0x10);
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ims332_write_register (fi, IMS332_REG_BACK_PORCH, 0x21);
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ims332_write_register (fi, IMS332_REG_DISPLAY, 0x100);
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ims332_write_register (fi, IMS332_REG_SHORT_DIS, 0x5d);
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ims332_write_register (fi, IMS332_REG_BROAD_PULSE, 0x9f);
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ims332_write_register (fi, IMS332_REG_V_SYNC, 0xc);
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ims332_write_register (fi, IMS332_REG_V_PRE_EQUALIZE, 2);
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ims332_write_register (fi, IMS332_REG_V_POST_EQUALIZE, 2);
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ims332_write_register (fi, IMS332_REG_V_BLANK, 0x2a);
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ims332_write_register (fi, IMS332_REG_V_DISPLAY, 0x600);
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ims332_write_register (fi, IMS332_REG_LINE_TIME, 0x146);
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ims332_write_register (fi, IMS332_REG_LINE_START, 0x10);
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ims332_write_register (fi, IMS332_REG_MEM_INIT, 0xa);
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ims332_write_register (fi, IMS332_REG_XFER_DELAY, 0xa);
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ims332_write_register (fi, IMS332_REG_COLOR_MASK, 0xffffff);
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#endif /* notdef */
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/* Zero out the cursor RAM... */
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for (i = 0; i < 512; i++)
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ims332_write_register (fi, IMS332_REG_CURSOR_RAM + i, 0);
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/* Set up the color map... */
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ims332InitColorMap (fi);
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/* Enable display... */
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ims332_write_register (fi, IMS332_REG_CSR_A,
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IMS332_BPP_8
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| IMS332_CSR_A_DMA_DISABLE
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| IMS332_CSR_A_VTG_ENABLE);
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return (1);
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}
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static u_char cursor_RGB[6]; /* cursor color 2 & 3 */
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static u_int
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ims332_read_register(fi, regno)
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struct fbinfo *fi;
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int regno;
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{
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register u_char *regs = (u_char *)fi -> fi_vdac;
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unsigned char *rptr;
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register u_int val, v1;
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/* spec sez: */
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rptr = regs + 0x80000 + (regno << 4);
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val = *((volatile u_short *) rptr );
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v1 = *((volatile u_short *) regs );
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return (val & 0xffff) | ((v1 & 0xff00) << 8);
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}
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static void
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ims332_write_register(fi, regno, val)
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struct fbinfo *fi;
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int regno;
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register unsigned int val;
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{
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register u_char *regs = (u_char *)fi -> fi_vdac;
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u_char *wptr;
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/* spec sez: */
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wptr = regs + 0xa0000 + (regno << 4);
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*((volatile u_int *)(regs)) = (val >> 8) & 0xff00;
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*((volatile u_short *)(wptr)) = val;
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}
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void
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ims332InitColorMap(fi)
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struct fbinfo *fi;
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{
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u_char *cmap;
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int i;
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cmap = (u_char *)(fi -> fi_cmap_bits);
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ims332_write_register (fi, IMS332_REG_LUT_BASE, 0);
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cmap [0] = cmap [1] = cmap [2] = 0;
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for (i = 1; i < 256; i++) {
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ims332_write_register (fi, IMS332_REG_LUT_BASE + i, 0xffffff);
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cmap [i * 3] = cmap [i * 3 + 1] = cmap [i * 3 + 2] = 0xff;
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}
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for (i = 0; i < 3; i++) {
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cursor_RGB[i] = 0x00;
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cursor_RGB[i + 3] = 0xff;
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}
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ims332RestoreCursorColor (fi);
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}
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/* Load color map entry(s). */
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int
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ims332LoadColorMap(fi, bits, index, count)
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struct fbinfo *fi;
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caddr_t bits;
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int index, count;
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{
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u_char *cmap_bits;
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u_char *cmap;
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int i;
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if (index > 256 || index < 0 || index + count > 256)
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return EINVAL;
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cmap_bits = (u_char *)bits;
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cmap = (u_char *)(fi -> fi_cmap_bits) + index * 3;
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for (i = 0; i < count; i++) {
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ims332_write_register (fi,
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IMS332_REG_LUT_BASE + i,
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(cmap_bits [i * 3 + 1] << 16) |
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(cmap_bits [i * 3 + 1] << 8) |
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(cmap_bits [i * 3]));
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cmap [(i + index) * 3] = cmap_bits [i * 3];
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cmap [(i + index) * 3 + 1] = cmap_bits [i * 3 + 1];
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cmap [(i + index) * 3 + 2] = cmap_bits [i * 3 + 2];
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}
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return 0;
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}
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/* Get color map entry(s). */
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int
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ims332GetColorMap(fi, bits, index, count)
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struct fbinfo *fi;
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caddr_t bits;
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int index, count;
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{
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u_char *cmap_bits;
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u_char *cmap;
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if (index > 256 || index < 0 || index + count > 256)
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return EINVAL;
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cmap_bits = (u_char *)bits;
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cmap = (u_char *)(fi -> fi_cmap_bits) + index * 3;
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bcopy (cmap, cmap_bits, count * 3);
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return 0;
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}
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/*
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* Video on/off
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*
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* It is unfortunate that X11 goes backward with white@0
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* and black@1. So we must stash away the zero-th entry
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* and fix it while screen is off.
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*/
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int
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ims332_video_off(fi)
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struct fbinfo *fi;
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{
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u_int csr;
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u_char *cmap_bits;
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if (fi -> fi_blanked)
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return 0;
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cmap_bits = (u_char *)fi -> fi_cmap_bits;
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ims332_write_register (fi, IMS332_REG_LUT_BASE, 0);
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ims332_write_register (fi, IMS332_REG_COLOR_MASK, 0);
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/* cursor now */
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csr = ims332_read_register (fi, IMS332_REG_CSR_A);
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csr |= IMS332_CSR_A_DISABLE_CURSOR;
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ims332_write_register (fi, IMS332_REG_CSR_A, csr);
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fi -> fi_blanked = 1;
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return 0;
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}
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int
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ims332_video_on (fi)
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struct fbinfo *fi;
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{
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u_char *cmap;
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u_int csr;
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if (!fi -> fi_blanked)
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return 0;
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cmap = (u_char *)(fi -> fi_cmap_bits);
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ims332_write_register (fi, IMS332_REG_LUT_BASE,
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((unsigned)cmap [0] |
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((unsigned)cmap [1] << 8) |
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((unsigned)cmap [2] << 16)));
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ims332_write_register (fi, IMS332_REG_COLOR_MASK, 0xffffffff);
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/* cursor now */
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csr = ims332_read_register (fi, IMS332_REG_CSR_A);
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csr &= ~IMS332_CSR_A_DISABLE_CURSOR;
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ims332_write_register (fi, IMS332_REG_CSR_A, csr);
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fi -> fi_blanked = 0;
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return 0;
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}
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/*
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* Cursor
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*/
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void
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ims332PosCursor(fi, x, y)
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struct fbinfo *fi;
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int x, y;
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{
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if (y < 0)
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y = 0;
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else if (y > fi -> fi_type.fb_width - fi -> fi_cursor.width - 1)
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y = fi -> fi_type.fb_width - fi -> fi_cursor.width - 1;
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if (x < 0)
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x = 0;
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else if (x > fi -> fi_type.fb_height - fi -> fi_cursor.height - 1)
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x = fi -> fi_type.fb_height - fi -> fi_cursor.height - 1;
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fi -> fi_cursor.x = x;
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fi -> fi_cursor.y = y;
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ims332_write_register (fi, IMS332_REG_CURSOR_LOC,
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((x & 0xfff) << 12) | (y & 0xfff));
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}
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void
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ims332RestoreCursorColor (fi)
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struct fbinfo *fi;
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{
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/* Bg is color[0], Fg is color[1] */
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ims332_write_register (fi, IMS332_REG_CURSOR_LUT_0,
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(cursor_RGB[2] << 16) |
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(cursor_RGB[1] << 8) |
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(cursor_RGB[0]));
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ims332_write_register (fi, IMS332_REG_CURSOR_LUT_1, 0x7f0000);
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ims332_write_register (fi, IMS332_REG_CURSOR_LUT_2,
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(cursor_RGB[5] << 16) |
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(cursor_RGB[4] << 8) |
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(cursor_RGB[3]));
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}
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/* Set the color of the cursor. */
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void
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ims332CursorColor (fi, color)
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struct fbinfo *fi;
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unsigned int color[];
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{
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register int i;
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for (i = 0; i < 6; i++)
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cursor_RGB[i] = (u_char)(color[i] >> 8);
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ims332RestoreCursorColor(fi);
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}
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void
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ims332LoadCursor(fi, cursor)
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struct fbinfo *fi;
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u_short *cursor;
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{
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register int i, j, k, pos;
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register u_short ap, bp, out;
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/*
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* Fill in the cursor sprite using the A and B planes, as provided
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* for the pmax.
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* XXX This will have to change when the X server knows that this
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* is not a pmax display.
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*/
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pos = 0;
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for (k = 0; k < 16; k++) {
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ap = *cursor;
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bp = *(cursor + 16);
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j = 0;
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while (j < 2) {
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out = 0;
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for (i = 0; i < 8; i++) {
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out = ((out >> 2) & 0x3fff) |
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((ap & 0x1) << 15) |
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((bp & 0x1) << 14);
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ap >>= 1;
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bp >>= 1;
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}
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ims332_write_register (fi, IMS332_REG_CURSOR_RAM + pos,
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out);
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pos++;
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j++;
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}
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while (j < 8) {
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ims332_write_register (fi, IMS332_REG_CURSOR_RAM + pos,
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0);
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pos++;
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j++;
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}
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cursor++;
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}
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while (pos < 512) {
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ims332_write_register (fi, IMS332_REG_CURSOR_RAM + pos, 0);
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pos++;
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}
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}
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