262 lines
8.2 KiB
C
262 lines
8.2 KiB
C
/* $NetBSD: njs_cardbus.c,v 1.3 2005/12/11 12:21:15 christos Exp $ */
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/*-
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* Copyright (c) 2004 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by ITOH Yasufumi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: njs_cardbus.c,v 1.3 2005/12/11 12:21:15 christos Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/cardbus/cardbusvar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/ic/ninjascsi32reg.h>
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#include <dev/ic/ninjascsi32var.h>
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#define NJSC32_CARDBUS_BASEADDR_IO CARDBUS_BASE0_REG
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#define NJSC32_CARDBUS_BASEADDR_MEM CARDBUS_BASE1_REG
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struct njsc32_cardbus_softc {
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struct njsc32_softc sc_njsc32;
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/* CardBus-specific goo */
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cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
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int sc_intrline; /* our interrupt line */
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cardbustag_t sc_tag;
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bus_space_handle_t sc_regmaph;
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bus_size_t sc_regmap_size;
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};
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static int njs_cardbus_match(struct device *, struct cfdata *, void *);
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static void njs_cardbus_attach(struct device *, struct device *, void *);
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static int njs_cardbus_detach(struct device *, int);
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CFATTACH_DECL(njs_cardbus, sizeof(struct njsc32_cardbus_softc),
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njs_cardbus_match, njs_cardbus_attach, njs_cardbus_detach, NULL);
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static const struct njsc32_cardbus_product {
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cardbus_vendor_id_t p_vendor;
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cardbus_product_id_t p_product;
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njsc32_model_t p_model;
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int p_clk; /* one of NJSC32_CLK_* */
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} njsc32_cardbus_products[] = {
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{ PCI_VENDOR_IODATA, PCI_PRODUCT_IODATA_CBSCII,
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NJSC32_MODEL_32BI, NJSC32_CLK_40M },
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{ PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32BI,
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NJSC32_MODEL_32BI, NJSC32_CLK_40M },
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{ PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE,
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NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
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{ PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32BI_KME,
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NJSC32_MODEL_32BI, NJSC32_CLK_40M },
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{ 0, 0,
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NJSC32_MODEL_INVALID, 0 },
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};
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static const struct njsc32_cardbus_product *
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njs_cardbus_lookup(const struct cardbus_attach_args *ca)
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{
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const struct njsc32_cardbus_product *p;
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for (p = njsc32_cardbus_products;
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p->p_model != NJSC32_MODEL_INVALID; p++) {
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if (CARDBUS_VENDOR(ca->ca_id) == p->p_vendor &&
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CARDBUS_PRODUCT(ca->ca_id) == p->p_product)
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return p;
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}
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return NULL;
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}
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static int
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njs_cardbus_match(struct device *parent, struct cfdata *match, void *aux)
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{
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struct cardbus_attach_args *ca = aux;
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if (njs_cardbus_lookup(ca))
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return 1;
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return 0;
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}
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static void
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njs_cardbus_attach(struct device *parent, struct device *self, void *aux)
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{
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struct cardbus_attach_args *ca = aux;
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struct njsc32_cardbus_softc *csc = (void *) self;
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struct njsc32_softc *sc = &csc->sc_njsc32;
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const struct njsc32_cardbus_product *prod;
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cardbus_devfunc_t ct = ca->ca_ct;
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cardbus_chipset_tag_t cc = ct->ct_cc;
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cardbus_function_tag_t cf = ct->ct_cf;
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pcireg_t reg;
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int csr;
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u_int8_t latency = 0x20;
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if ((prod = njs_cardbus_lookup(ca)) == NULL)
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panic("njs_cardbus_attach");
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printf(": Workbit NinjaSCSI-32 SCSI adapter\n");
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sc->sc_model = prod->p_model;
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sc->sc_clk = prod->p_clk;
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csc->sc_ct = ct;
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csc->sc_tag = ca->ca_tag;
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csc->sc_intrline = ca->ca_intrline;
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/*
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* Map the device.
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*/
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csr = PCI_COMMAND_MASTER_ENABLE;
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/*
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* Map registers.
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* Try memory map first, and then try I/O.
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*/
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if (Cardbus_mapreg_map(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_MEM,
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PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
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&sc->sc_regt, &csc->sc_regmaph, NULL, &csc->sc_regmap_size) == 0) {
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if (bus_space_subregion(sc->sc_regt, csc->sc_regmaph,
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NJSC32_MEMOFFSET_REG, NJSC32_REGSIZE, &sc->sc_regh) != 0) {
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/* failed -- undo map and try I/O */
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Cardbus_mapreg_unmap(csc->sc_ct,
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NJSC32_CARDBUS_BASEADDR_MEM,
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sc->sc_regt, csc->sc_regmaph, csc->sc_regmap_size);
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goto try_io;
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}
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#ifdef NJSC32_DEBUG
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printf("%s: memory space mapped\n", sc->sc_dev.dv_xname);
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#endif
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csr |= PCI_COMMAND_MEM_ENABLE;
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sc->sc_flags = NJSC32_MEM_MAPPED;
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(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE);
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} else {
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try_io:
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if (Cardbus_mapreg_map(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_IO,
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PCI_MAPREG_TYPE_IO, 0, &sc->sc_regt, &sc->sc_regh,
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NULL, &csc->sc_regmap_size) == 0) {
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#ifdef NJSC32_DEBUG
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printf("%s: io space mapped\n", sc->sc_dev.dv_xname);
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#endif
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csr |= PCI_COMMAND_IO_ENABLE;
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sc->sc_flags = NJSC32_IO_MAPPED;
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(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_IO_ENABLE);
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} else {
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printf("%s: unable to map device registers\n",
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sc->sc_dev.dv_xname);
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return;
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}
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}
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/* Make sure the right access type is on the CardBus bridge. */
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(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
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/* Enable the appropriate bits in the PCI CSR. */
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reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG);
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reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
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reg |= csr;
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cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg);
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/*
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* Make sure the latency timer is set to some reasonable
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* value.
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*/
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reg = cardbus_conf_read(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG);
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if (CARDBUS_LATTIMER(reg) < latency) {
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reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT);
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reg |= (latency << CARDBUS_LATTIMER_SHIFT);
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cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG, reg);
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}
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sc->sc_dmat = ca->ca_dmat;
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/*
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* Establish the interrupt.
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*/
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sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO,
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njsc32_intr, sc);
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if (sc->sc_ih == NULL) {
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printf("%s: unable to establish interrupt at %d\n",
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sc->sc_dev.dv_xname, ca->ca_intrline);
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return;
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}
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printf("%s: interrupting at %d\n",
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sc->sc_dev.dv_xname, ca->ca_intrline);
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/* CardBus device cannot supply termination power. */
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sc->sc_flags |= NJSC32_CANNOT_SUPPLY_TERMPWR;
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/* attach */
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njsc32_attach(sc);
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}
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static int
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njs_cardbus_detach(struct device *self, int flags)
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{
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struct njsc32_cardbus_softc *csc = (void *) self;
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struct njsc32_softc *sc = &csc->sc_njsc32;
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int rv;
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rv = njsc32_detach(sc, flags);
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if (rv)
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return rv;
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if (sc->sc_ih)
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cardbus_intr_disestablish(csc->sc_ct->ct_cc,
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csc->sc_ct->ct_cf, sc->sc_ih);
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if (sc->sc_flags & NJSC32_IO_MAPPED)
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Cardbus_mapreg_unmap(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_IO,
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sc->sc_regt, sc->sc_regh, csc->sc_regmap_size);
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if (sc->sc_flags & NJSC32_MEM_MAPPED)
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Cardbus_mapreg_unmap(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_MEM,
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sc->sc_regt, csc->sc_regmaph, csc->sc_regmap_size);
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return 0;
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}
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