246 lines
7.2 KiB
C
246 lines
7.2 KiB
C
/* $NetBSD: chipsfb_ofbus.c,v 1.3 2012/08/22 21:15:17 macallan Exp $ */
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/*
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* Copyright (c) 2011 Michael Lorenz
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* C&T 6555x series.
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* ofbus attachment for chipsfb
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: chipsfb_ofbus.c,v 1.3 2012/08/22 21:15:17 macallan Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <uvm/uvm.h>
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#include <machine/intr.h>
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#include <machine/ofw.h>
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#include <machine/pmap.h>
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#include <dev/isa/isavar.h>
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#include <dev/wscons/wsdisplayvar.h>
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#include <dev/wscons/wsconsio.h>
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#include <dev/rasops/rasops.h>
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#include <dev/wscons/wsdisplay_vconsvar.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ic/ct65550reg.h>
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#include <dev/ic/ct65550var.h>
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#include <shark/ofw/igsfb_ofbusvar.h>
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static int chipsfb_ofbus_is_console(int);
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static int chipsfb_ofbus_console = 0;
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static int chipsfb_ofbus_phandle = 0;
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static int chipsfb_ofbus_match(device_t, struct cfdata *, void *);
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static void chipsfb_ofbus_attach(device_t, device_t, void *);
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static paddr_t chipsfb_ofbus_mmap(void *, void *, off_t, int);
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int chipsfb_ofbus_cnattach(bus_space_tag_t, bus_space_tag_t);
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CFATTACH_DECL_NEW(chipsfb_ofbus, sizeof(struct chipsfb_softc),
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chipsfb_ofbus_match, chipsfb_ofbus_attach, NULL, NULL);
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static const char const *compat_strings[] = { "CHPS,ct65550", NULL };
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vaddr_t chipsfb_mem_vaddr = 0, chipsfb_mmio_vaddr = 0;
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paddr_t chipsfb_mem_paddr;
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extern paddr_t isa_io_physaddr;
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struct bus_space chipsfb_memt, chipsfb_iot;
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#if (NCHIPSFB_OFBUS > 0) || (NVGA_OFBUS > 0)
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extern int console_ihandle;
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#endif
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int
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chipsfb_ofbus_cnattach(bus_space_tag_t iot, bus_space_tag_t memt)
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{
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int chosen_phandle, ct_node;
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int stdout_ihandle, stdout_phandle;
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uint32_t regs[16];
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stdout_phandle = 0;
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/* first find out if there's a ct65550 at all in this machine */
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ct_node = OF_finddevice("/vlbus/display");
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if (ct_node == -1)
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return ENXIO;
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if (of_compatible(ct_node, compat_strings) < 0)
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return ENXIO;
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/*
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* now we know there's a CyberPro in this machine so map it into
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* kernel space, even if it's not the console
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*/
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if (OF_getprop(ct_node, "reg", regs, sizeof(regs)) <= 0)
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return ENXIO;
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chipsfb_mem_paddr = be32toh(regs[10]);
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/* 2MB RAM aperture, bufferable and not cacheable */
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chipsfb_mem_vaddr = ofw_map(chipsfb_mem_paddr, 0x00200000, L2_B);
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/* 128kB MMIO registers */
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chipsfb_mmio_vaddr = ofw_map(chipsfb_mem_paddr + CT_OFF_BITBLT,
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0x00020000, 0);
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memcpy(&chipsfb_memt, memt, sizeof(struct bus_space));
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chipsfb_memt.bs_cookie = (void *)chipsfb_mem_vaddr;
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memcpy(&chipsfb_iot, iot, sizeof(struct bus_space));
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/*
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* check if the firmware output device is indeed the ct65550
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*/
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if ((chosen_phandle = OF_finddevice("/chosen")) == -1 ||
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OF_getprop(chosen_phandle, "stdout", &stdout_ihandle,
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sizeof(stdout_ihandle)) != sizeof(stdout_ihandle)) {
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return ENXIO;
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}
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stdout_ihandle = of_decode_int((void *)&stdout_ihandle);
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stdout_phandle = OF_instance_to_package(stdout_ihandle);
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if (stdout_phandle != ct_node)
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return ENXIO;
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chipsfb_ofbus_console = 1;
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chipsfb_ofbus_phandle = stdout_phandle;
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#if (NCHIPSFB_OFBUS > 0) || (NVGA_OFBUS > 0)
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console_ihandle = stdout_ihandle;
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#endif
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/* we're all set, now let's wait for chipsfb to attach */
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return 0;
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}
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static int
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chipsfb_ofbus_is_console(int phandle)
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{
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return chipsfb_ofbus_console && (phandle == chipsfb_ofbus_phandle);
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}
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static int
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chipsfb_ofbus_match(device_t parent, struct cfdata *match, void *aux)
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{
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struct ofbus_attach_args *oba = aux;
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if (of_compatible(oba->oba_phandle, compat_strings) < 0)
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return 0;
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return 10; /* beat vga etc. */
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}
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static void
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chipsfb_ofbus_attach(device_t parent, device_t self, void *aux)
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{
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struct chipsfb_softc *sc = device_private(self);
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struct ofbus_attach_args *oba = aux;
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prop_dictionary_t dict;
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int isconsole, width, height, linebytes, depth;
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printf(": Chips & Technologies 65550 at 0x%08x\n",
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(uint32_t)chipsfb_mem_paddr);
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sc->sc_dev = self;
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sc->sc_memt = &chipsfb_memt;
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sc->sc_iot = &chipsfb_iot;
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sc->sc_fb = chipsfb_mem_paddr;
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sc->sc_fbsize = 0x00800000; /* 8MB aperture */
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sc->sc_fbh = chipsfb_mem_vaddr;
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sc->sc_mmregh = chipsfb_mmio_vaddr;
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sc->sc_ioregh = isa_io_data_vaddr();
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sc->sc_mmap = chipsfb_ofbus_mmap;
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sc->sc_ioctl = NULL;
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sc->memsize = 0x00200000;
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dict = device_properties(sc->sc_dev);
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if (OF_getprop(oba->oba_phandle, "width", &width, sizeof(width)) == 4) {
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width = be32toh(width);
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} else
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width = 640;
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if (OF_getprop(oba->oba_phandle, "height", &height, sizeof(height))
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== 4) {
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height = be32toh(height);
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} else
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height = 480;
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if (OF_getprop(oba->oba_phandle, "depth", &depth, sizeof(depth)) == 4) {
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depth = be32toh(depth);
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} else
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depth = 8;
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if (OF_getprop(oba->oba_phandle, "linebytes", &linebytes,
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sizeof(linebytes)) == 4) {
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linebytes = be32toh(linebytes);
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} else
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linebytes = width * (depth >> 3);
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isconsole = chipsfb_ofbus_is_console(oba->oba_phandle);
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prop_dictionary_set_uint32(dict, "width", width);
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prop_dictionary_set_uint32(dict, "height", height);
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prop_dictionary_set_uint32(dict, "linebytes", linebytes);
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prop_dictionary_set_uint32(dict, "depth", depth);
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prop_dictionary_set_bool(dict, "is_console", isconsole);
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chipsfb_do_attach(sc);
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}
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static paddr_t
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chipsfb_ofbus_mmap(void *v, void *vs, off_t offset, int prot)
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{
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#ifdef PCI_MAGIC_IO_RANGE
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/* access to IO ports */
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if ((offset >= PCI_MAGIC_IO_RANGE) &&
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(offset < (PCI_MAGIC_IO_RANGE + 0x10000))) {
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paddr_t pa;
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pa = isa_io_physaddr + offset - PCI_MAGIC_IO_RANGE;
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return arm_btop(pa);
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}
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#endif
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if ((offset >= chipsfb_mem_paddr) &&
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(offset < (chipsfb_mem_paddr + CT_OFF_BITBLT))) {
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return (arm_btop(offset) | ARM32_MMAP_WRITECOMBINE);
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} else if ((offset >= (chipsfb_mem_paddr + CT_OFF_BITBLT)) &&
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(offset < (chipsfb_mem_paddr + 0x00800000))) {
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return arm_btop(offset);
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} else if ((offset >= 0xa0000) &&
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(offset < 0xbffff)) {
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return (arm_btop(offset) | ARM32_MMAP_WRITECOMBINE);
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}
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return -1;
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}
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