8c999651eb
Add a catch for DMA Error which show up on Intel 82443BX Host Bridge/Controller (rev. 0x03). This doesn't fix the problem, but reset the SCSI bus and reinitialize the host adapter Minor cosmetical changes Thanks a lot to Greg Oster and Andan Lauber
169 lines
5.4 KiB
C
169 lines
5.4 KiB
C
/* $NetBSD: adw.h,v 1.8 2000/05/10 21:22:34 dante Exp $ */
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/*
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* Generic driver definitions and exported functions for the Advanced
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* Systems Inc. SCSI controllers
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*
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* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Author: Baldassare Dante Profeta <dante@mclink.it>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ADVANSYS_WIDE_H_
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#define _ADVANSYS_WIDE_H_
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/******************************************************************************/
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typedef int (* ADW_ISR_CALLBACK) (ADW_SOFTC *, ADW_SCSI_REQ_Q *);
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typedef void (* ADW_ASYNC_CALLBACK) (ADW_SOFTC *, u_int8_t);
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/*
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* ADW_CARRIER must be exactly 16 BYTES
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* Every adw_carrier structure _MUST_ always be aligned on a 16 bytes boundary
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*/
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struct adw_carrier {
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/* ---------- the microcode wants the field below ---------- */
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u_int32_t carr_id; /* Carrier ID */
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u_int32_t carr_ba; /* Carrier Bus Address */
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u_int32_t areq_ba; /* ADW_SCSI_REQ_Q Bus Address */
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/*
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* next_vpa [31:4] Carrier Physical Next Pointer
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*
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* next_vpa [3:1] Reserved Bits
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* next_vpa [0] Done Flag set in Response Queue.
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*/
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u_int32_t next_ba; /* see next_ba flags below */
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/* ---------- ---------- */
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};
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typedef struct adw_carrier ADW_CARRIER;
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/*
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* next_ba flags
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*/
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#define ASC_RQ_DONE 0x00000001
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#define ASC_RQ_GOOD 0x00000002
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#define ASC_CQ_STOPPER 0x00000000
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/*
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* Mask used to eliminate low 4 bits of carrier 'next_vpa' field.
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*/
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#define ASC_NEXT_BA_MASK 0xFFFFFFF0
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#define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_BA_MASK)
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/*
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* per request scatter-gather element limit
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* We could have up to 256 SG lists.
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*/
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#define ADW_MAX_SG_LIST 255
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/*
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* Scatter-Gather Definitions per request.
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*/
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#define NO_OF_SG_PER_BLOCK 15
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/* Number of SG blocks needed. */
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#define ADW_NUM_SG_BLOCK \
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((ADW_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)
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struct adw_ccb {
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ADW_SCSI_REQ_Q scsiq;
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ADW_SG_BLOCK sg_block[ADW_NUM_SG_BLOCK];
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struct scsipi_sense_data scsi_sense;
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TAILQ_ENTRY(adw_ccb) chain;
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struct adw_ccb *nexthash;
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u_int32_t hashkey;
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struct scsipi_xfer *xs; /* the scsipi_xfer for this cmd */
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int flags; /* see below */
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int timeout;
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/*
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* This DMA map maps the buffer involved in the transfer.
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*/
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bus_dmamap_t dmamap_xfer;
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};
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typedef struct adw_ccb ADW_CCB;
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/* flags for ADW_CCB */
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#define CCB_ALLOC 0x01
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#define CCB_ABORTING 0x02
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#define CCB_ABORTED 0x04
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#define ADW_MAX_CARRIER 253 /* Max. number of host commands (253) */
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#define ADW_MAX_CCB 63 /* Max. number commands per device (63) */
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struct adw_control {
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ADW_CCB ccbs[ADW_MAX_CCB]; /* all our control blocks */
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ADW_CARRIER *carriers; /* all our carriers */
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};
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/*
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* Bus Address of a Carrier.
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* ba = base_ba + v_address - base_va
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*/
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#define ADW_CARRIER_BADDR(sc,x) ((sc)->sc_dmamap_carrier->dm_segs[0].ds_addr + \
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(((u_long)x) - ((u_long)(sc)->sc_control->carriers)))
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/*
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* Virtual Address of a Carrier.
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* va = base_va + bus_address - base_ba
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*/
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#define ADW_CARRIER_VADDR(sc,x) ((ADW_CARRIER *) \
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(((u_int8_t *)(sc)->sc_control->carriers) + \
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((u_long)x) - \
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(sc)->sc_dmamap_carrier->dm_segs[0].ds_addr))
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/*
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* Offset of a CCB from the beginning of the control DMA mapping.
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*/
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#define ADW_CCB_OFF(c) (offsetof(struct adw_control, ccbs[0]) + \
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(((u_long)(c)) - ((u_long)&sc->sc_control->ccbs[0])))
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/******************************************************************************/
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int adw_init __P((ADW_SOFTC *sc));
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void adw_attach __P((ADW_SOFTC *sc));
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int adw_intr __P((void *arg));
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ADW_CCB *adw_ccb_phys_kv __P((ADW_SOFTC *, u_int32_t));
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ADW_CARRIER *adw_carrier_phys_kv __P((ADW_SOFTC *, u_int32_t));
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/******************************************************************************/
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#endif /* _ADVANSYS_ADW_H_ */
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