5241ea94ce
etherH and etherM netslot interfaces.
74 lines
3.4 KiB
C
74 lines
3.4 KiB
C
/* $NetBSD: if_ne_pbusreg.h,v 1.1 1998/03/21 21:35:20 mark Exp $ */
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/*
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Mark Brinicombe of Causality Limited.
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*
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* EtherH code Copyright (c) 1998 Mike Pumford
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Register definitions for podulebus hosted ne2000 ethernet controllers
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*/
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/* EtherM netslot cards */
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#define EM_NIC_OFFSET 0x0800
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#define EM_NIC_SIZE (NE2000_NIC_NPORTS << EM_REGSHIFT)
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#define EM_ASIC_OFFSET (EM_NIC_OFFSET + (NE2000_ASIC_OFFSET << EM_REGSHIFT))
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#define EM_ASIC_SIZE (NE2000_ASIC_NPORTS << EM_REGSHIFT)
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#define EM_REGSHIFT 5
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/* EtherM interface has a special Diagnostic status register */
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#define EM_DSR_REG 0x0d /* Register number from ASIC base */
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/* Diagnostic status register */
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#define EM_DSR_20M (1 << 1) /* 20MHz VCO functioning */
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#define EM_DSR_TCOK (1 << 2) /* Transmit clock functioning */
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#define EM_DSR_POL (1 << 3) /* Polarity of UTP link */
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#define EM_DSR_JAB (1 << 4) /* Jabber state */
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#define EM_DSR_LNK (1 << 5) /* Link state */
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#define EM_DSR_LBK (1 << 6) /* Lookback mode */
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#define EM_DSR_UTP (1 << 7) /* Twisted pair selected */
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/* EtherLan 600 definitions */
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#define EH600_NIC_OFFSET 0x0800
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#define EH600_NIC_SIZE (NE2000_NIC_NPORTS << EH600_REGSHIFT)
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#define EH600_ASIC_OFFSET (EH600_NIC_OFFSET + (NE2000_ASIC_OFFSET \
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<< EH600_REGSHIFT))
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#define EH600_ASIC_SIZE (NE2000_ASIC_NPORTS << EH600_REGSHIFT)
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#define EH600_REGSHIFT 2
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#define EH600_MCRA 0x0a /* master control reg A */
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#define EH600_MCRB 0x0b /* master control reg B */
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#define EH600_10BTSEL 0 /* 10BaseT interface */
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#define EH600_10B2SEL 1 /* 10Base2 interface */
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