376 lines
9.7 KiB
C
376 lines
9.7 KiB
C
/* $NetBSD: iavc_pci.c,v 1.11 2009/05/12 08:23:00 cegger Exp $ */
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/*
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* Copyright (c) 2001-2003 Cubical Solutions Ltd.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* capi/iavc/iavc_pci.c
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* The AVM ISDN controllers' PCI bus attachment handling.
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*
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* $FreeBSD: src/sys/i4b/capi/iavc/iavc_pci.c,v 1.1.2.1 2001/08/10 14:08:34 obrien Exp $
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: iavc_pci.c,v 1.11 2009/05/12 08:23:00 cegger Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/callout.h>
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#include <sys/socket.h>
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#include <sys/device.h>
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#include <net/if.h>
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#include <sys/bus.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <netisdn/i4b_ioctl.h>
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#include <netisdn/i4b_l3l4.h>
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#include <netisdn/i4b_capi.h>
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#include <dev/ic/iavcvar.h>
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#include <dev/ic/iavcreg.h>
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struct iavc_pci_softc {
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struct iavc_softc sc_iavc;
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bus_addr_t mem_base;
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bus_size_t mem_size;
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bus_addr_t io_base;
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bus_size_t io_size;
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pci_chipset_tag_t sc_pc;
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void *sc_ih; /* interrupt handler */
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};
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#define IAVC_PCI_IOBA 0x14
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#define IAVC_PCI_MMBA 0x10
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/* PCI driver linkage */
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static const struct iavc_pci_product *find_cardname(struct pci_attach_args *);
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static int iavc_pci_probe(device_t, cfdata_t, void *);
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static void iavc_pci_attach(device_t, device_t, void *);
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int iavc_pci_intr(void *);
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CFATTACH_DECL(iavc_pci, sizeof(struct iavc_pci_softc),
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iavc_pci_probe, iavc_pci_attach, NULL, NULL);
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static const struct iavc_pci_product {
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pci_vendor_id_t npp_vendor;
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pci_product_id_t npp_product;
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const char *name;
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} iavc_pci_products[] = {
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{ PCI_VENDOR_AVM, PCI_PRODUCT_AVM_B1, "AVM B1 PCI" },
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{ PCI_VENDOR_AVM, PCI_PRODUCT_AVM_T1, "AVM T1 PCI" },
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{ 0, 0, NULL },
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};
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static const struct iavc_pci_product *
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find_cardname(struct pci_attach_args * pa)
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{
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const struct iavc_pci_product *pp = NULL;
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for (pp = iavc_pci_products; pp->npp_vendor; pp++) {
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if (PCI_VENDOR(pa->pa_id) == pp->npp_vendor &&
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PCI_PRODUCT(pa->pa_id) == pp->npp_product)
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return pp;
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}
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return NULL;
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}
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static int
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iavc_pci_probe(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (find_cardname(pa))
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return 1;
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return 0;
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}
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static void
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iavc_pci_attach(device_t parent, device_t self, void *aux)
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{
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struct iavc_pci_softc *psc = device_private(self);
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struct iavc_softc *sc = &psc->sc_iavc;
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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const struct iavc_pci_product *pp;
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pci_intr_handle_t ih;
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const char *intrstr;
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int ret;
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pp = find_cardname(pa);
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if (pp == NULL)
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return;
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sc->sc_t1 = 0;
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sc->sc_dma = 0;
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sc->dmat = pa->pa_dmat;
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iavc_b1dma_reset(sc);
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if (pci_mapreg_map(pa, IAVC_PCI_IOBA, PCI_MAPREG_TYPE_IO, 0,
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&sc->sc_io_bt, &sc->sc_io_bh, &psc->io_base, &psc->io_size)) {
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aprint_error(": unable to map i/o registers\n");
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return;
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}
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if (pci_mapreg_map(pa, IAVC_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0,
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&sc->sc_mem_bt, &sc->sc_mem_bh, &psc->mem_base, &psc->mem_size)) {
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aprint_error(": unable to map mem registers\n");
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return;
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}
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aprint_normal(": %s\n", pp->name);
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if (pp->npp_product == PCI_PRODUCT_AVM_T1) {
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aprint_error_dev(&sc->sc_dev, "sorry, PRI not yet supported\n");
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return;
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#if 0
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sc->sc_capi.card_type = CARD_TYPEC_AVM_T1_PCI;
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sc->sc_capi.sc_nbch = NBCH_PRI;
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ret = iavc_t1_detect(sc);
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if (ret) {
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if (ret < 6) {
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aprint_error_dev(&sc->sc_dev, "no card detected?\n");
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} else {
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aprint_error_dev(&sc->sc_dev, "black box not on\n");
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}
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return;
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} else {
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sc->sc_dma = 1;
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sc->sc_t1 = 1;
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}
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#endif
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} else if (pp->npp_product == PCI_PRODUCT_AVM_B1) {
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sc->sc_capi.card_type = CARD_TYPEC_AVM_B1_PCI;
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sc->sc_capi.sc_nbch = NBCH_BRI;
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ret = iavc_b1dma_detect(sc);
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if (ret) {
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ret = iavc_b1_detect(sc);
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if (ret) {
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aprint_error_dev(&sc->sc_dev, "no card detected?\n");
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return;
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}
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} else {
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sc->sc_dma = 1;
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}
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}
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if (sc->sc_dma)
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iavc_b1dma_reset(sc);
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#if 0
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/*
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* XXX: should really be done this way, but this freezes the card
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*/
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if (sc->sc_t1)
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iavc_t1_reset(sc);
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else
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iavc_b1_reset(sc);
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#endif
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if (pci_intr_map(pa, &ih)) {
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aprint_error_dev(&sc->sc_dev, "couldn't map interrupt\n");
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return;
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}
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intrstr = pci_intr_string(pc, ih);
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psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, iavc_pci_intr, psc);
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if (psc->sc_ih == NULL) {
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aprint_error_dev(&sc->sc_dev, "couldn't establish interrupt");
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if (intrstr != NULL)
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aprint_normal(" at %s", intrstr);
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aprint_normal("\n");
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return;
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}
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psc->sc_pc = pc;
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aprint_normal("%s: interrupting at %s\n", device_xname(&sc->sc_dev), intrstr);
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memset(&sc->sc_txq, 0, sizeof(struct ifqueue));
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sc->sc_txq.ifq_maxlen = sc->sc_capi.sc_nbch * 4;
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sc->sc_intr = 0;
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sc->sc_state = IAVC_DOWN;
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sc->sc_blocked = 0;
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/* setup capi link */
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sc->sc_capi.load = iavc_load;
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sc->sc_capi.reg_appl = iavc_register;
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sc->sc_capi.rel_appl = iavc_release;
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sc->sc_capi.send = iavc_send;
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sc->sc_capi.ctx = (void *) sc;
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/* lock & load DMA for TX */
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if ((ret = bus_dmamem_alloc(sc->dmat, IAVC_DMA_SIZE, PAGE_SIZE, 0,
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&sc->txseg, 1, &sc->ntxsegs, BUS_DMA_ALLOCNOW)) != 0) {
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aprint_error_dev(&sc->sc_dev, "can't allocate tx DMA memory, error = %d\n",
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ret);
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goto fail1;
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}
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if ((ret = bus_dmamem_map(sc->dmat, &sc->txseg, sc->ntxsegs,
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IAVC_DMA_SIZE, &sc->sc_sendbuf, BUS_DMA_NOWAIT)) != 0) {
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aprint_error_dev(&sc->sc_dev, "can't map tx DMA memory, error = %d\n",
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ret);
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goto fail2;
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}
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if ((ret = bus_dmamap_create(sc->dmat, IAVC_DMA_SIZE, 1,
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IAVC_DMA_SIZE, 0, BUS_DMA_ALLOCNOW | BUS_DMA_NOWAIT,
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&sc->tx_map)) != 0) {
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aprint_error_dev(&sc->sc_dev, "can't create tx DMA map, error = %d\n",
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ret);
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goto fail3;
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}
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if ((ret = bus_dmamap_load(sc->dmat, sc->tx_map, sc->sc_sendbuf,
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IAVC_DMA_SIZE, NULL, BUS_DMA_WRITE | BUS_DMA_NOWAIT)) != 0) {
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aprint_error_dev(&sc->sc_dev, "can't load tx DMA map, error = %d\n",
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ret);
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goto fail4;
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}
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/* do the same for RX */
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if ((ret = bus_dmamem_alloc(sc->dmat, IAVC_DMA_SIZE, PAGE_SIZE, 0,
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&sc->rxseg, 1, &sc->nrxsegs, BUS_DMA_ALLOCNOW)) != 0) {
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aprint_error_dev(&sc->sc_dev, "can't allocate rx DMA memory, error = %d\n",
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ret);
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goto fail5;
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}
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if ((ret = bus_dmamem_map(sc->dmat, &sc->rxseg, sc->nrxsegs,
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IAVC_DMA_SIZE, &sc->sc_recvbuf, BUS_DMA_NOWAIT)) != 0) {
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aprint_error_dev(&sc->sc_dev, "can't map rx DMA memory, error = %d\n",
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ret);
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goto fail6;
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}
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if ((ret = bus_dmamap_create(sc->dmat, IAVC_DMA_SIZE, 1, IAVC_DMA_SIZE,
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0, BUS_DMA_ALLOCNOW | BUS_DMA_NOWAIT, &sc->rx_map)) != 0) {
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aprint_error_dev(&sc->sc_dev, "can't create rx DMA map, error = %d\n",
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ret);
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goto fail7;
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}
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if ((ret = bus_dmamap_load(sc->dmat, sc->rx_map, sc->sc_recvbuf,
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IAVC_DMA_SIZE, NULL, BUS_DMA_READ | BUS_DMA_NOWAIT)) != 0) {
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aprint_error_dev(&sc->sc_dev, "can't load rx DMA map, error = %d\n",
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ret);
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goto fail8;
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}
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if (capi_ll_attach(&sc->sc_capi, device_xname(&sc->sc_dev), pp->name)) {
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aprint_error_dev(&sc->sc_dev, "capi attach failed\n");
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goto fail9;
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}
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return;
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/* release resources in case of failed attach */
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fail9:
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bus_dmamap_unload(sc->dmat, sc->rx_map);
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fail8:
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bus_dmamap_destroy(sc->dmat, sc->rx_map);
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fail7:
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bus_dmamem_unmap(sc->dmat, sc->sc_recvbuf, IAVC_DMA_SIZE);
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fail6:
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bus_dmamem_free(sc->dmat, &sc->rxseg, sc->nrxsegs);
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fail5:
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bus_dmamap_unload(sc->dmat, sc->tx_map);
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fail4:
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bus_dmamap_destroy(sc->dmat, sc->tx_map);
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fail3:
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bus_dmamem_unmap(sc->dmat, sc->sc_sendbuf, IAVC_DMA_SIZE);
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fail2:
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bus_dmamem_free(sc->dmat, &sc->txseg, sc->ntxsegs);
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fail1:
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pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
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return;
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}
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int
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iavc_pci_intr(void *arg)
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{
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struct iavc_softc *sc = arg;
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return iavc_handle_intr(sc);
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}
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#if 0
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static int
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iavc_pci_detach(device_t self, int flags)
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{
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struct iavc_pci_softc *psc = device_private(self);
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bus_space_unmap(psc->sc_iavc.sc_mem_bt, psc->sc_iavc.sc_mem_bh,
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psc->mem_size);
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bus_space_free(psc->sc_iavc.sc_mem_bt, psc->sc_iavc.sc_mem_bh,
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psc->mem_size);
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bus_space_unmap(psc->sc_iavc.sc_io_bt, psc->sc_iavc.sc_io_bh,
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psc->io_size);
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bus_space_free(psc->sc_iavc.sc_io_bt, psc->sc_iavc.sc_io_bh,
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psc->io_size);
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pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
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/* XXX: capi detach?!? */
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return 0;
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}
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static int
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iavc_pci_activate(device_t self, enum devact act)
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{
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struct iavc_softc *psc = device_private(self);
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int error, s;
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error = 0;
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s = splnet();
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switch (act) {
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case DVACT_ACTIVATE:
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error = EOPNOTSUPP;
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break;
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case DVACT_DEACTIVATE:
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/* XXX */
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break;
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}
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splx(s);
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return error;
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}
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#endif
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