74 lines
2.6 KiB
C
74 lines
2.6 KiB
C
/* $NetBSD: sa11x1_pcicreg.h,v 1.2 2008/04/28 20:23:14 martin Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by IWAMOTO Toshihiro.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* Register locations */
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#define SACPCIC_CR 0x1800
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#define SACPCIC_SSR 0x1804
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#define SACPCIC_SR 0x1808
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/* Control register */
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#define CR_S0_RST 0x01 /* 1 = Assert reset */
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#define CR_S1_RST 0x02
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#define CR_S0_FLT 0x04 /* 0 = Float all S0 control lines */
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#define CR_S1_FLT 0x08
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#define CR_S0_PWAITEN 0x10 /* S0_nPWAIT enable */
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#define CR_S1_PWAITEN 0x20
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#define CR_S0_PSE 0x40 /* 0 = 3V card */
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#define CR_S1_PSE 0x80
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/* Sleep state register */
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#define SSR_S0 0x01
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#define SSR_S1 0x02
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/* Status register */
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#define SR_S0_READY 0x0001
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#define SR_S1_READY 0x0002
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#define SR_S0_CARDDETECT 0x0004
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#define SR_S1_CARDDETECT 0x0008
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#define SR_S0_VS1 0x0010
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#define SR_S0_VS2 0x0020
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#define SR_S1_VS1 0x0040
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#define SR_S1_VS2 0x0080
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#define SR_S0_WP 0x0100
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#define SR_S1_WP 0x0200
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#define SR_S0_BVD1 0x0400
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#define SR_S0_BVD2 0x0800
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#define SR_S1_BVD1 0x1000
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#define SR_S1_BVD2 0x2000
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/* IRQ numbers */
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#define IRQ_S0_READY 49
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#define IRQ_S1_READY 50
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#define IRQ_S0_CDVALID 51
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#define IRQ_S1_CDVALID 52
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#define IRQ_S0_BVD1 53
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#define IRQ_S1_BVD1 54
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